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2021-10-15 09:18:37 +00:00
#+OPTIONS: toc:nil num:nil <:nil \n:nil ::nil timestamp:nil *:nil ':nil
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Initial commit
2021-10-15 08:17:02 +00:00
#+title: ocpu
Add styles
2021-10-15 09:18:37 +00:00
* GRU ocpu - yet another cpu design
** Features
Initial commit
2021-10-15 08:17:02 +00:00
- little endian
Register names fix
2021-10-19 15:35:26 +00:00
- 16-bit
Initial commit
2021-10-15 08:17:02 +00:00
** Registers
Updated info about PC and SP
2021-10-19 18:07:09 +00:00
|----------+----------+-------------------------|
| Register | Category | Description |
|----------+----------+-------------------------|
| AL | General | 0xA0, 8-bit |
|----------+----------+-------------------------|
| AH | General | 0xA1, 8-bit |
|----------+----------+-------------------------|
Changed hex numbers for 16bit registers
2021-10-26 16:49:55 +00:00
| A | General | 0x0A, 16-bit |
Updated info about PC and SP
2021-10-19 18:07:09 +00:00
|----------+----------+-------------------------|
| BL | General | 0xB0, 8-bit |
|----------+----------+-------------------------|
| BH | General | 0xB1, 8-bit |
|----------+----------+-------------------------|
Changed hex numbers for 16bit registers
2021-10-26 16:49:55 +00:00
| B | General | 0x0B, 16-bit |
Updated info about PC and SP
2021-10-19 18:07:09 +00:00
|----------+----------+-------------------------|
| CL | General | 0xC0, 8-bit |
|----------+----------+-------------------------|
| CH | General | 0xC1, 8-bit |
|----------+----------+-------------------------|
Changed hex numbers for 16bit registers
2021-10-26 16:49:55 +00:00
| C | General | 0x0C, 16-bit |
Updated info about PC and SP
2021-10-19 18:07:09 +00:00
|----------+----------+-------------------------|
Fix
2021-10-19 18:08:50 +00:00
| DL | | 0xD0, 8-bit |
Updated info about PC and SP
2021-10-19 18:07:09 +00:00
|----------+----------+-------------------------|
| DH | | 0xD1, 8-bit |
|----------+----------+-------------------------|
Changed hex numbers for 16bit registers
2021-10-26 16:49:55 +00:00
| D | | 0x0D, 16-bit |
Updated info about PC and SP
2021-10-19 18:07:09 +00:00
|----------+----------+-------------------------|
| EL | | 0xE0, 8-bit |
|----------+----------+-------------------------|
| EH | | 0xE1, 8-bit |
|----------+----------+-------------------------|
Changed hex numbers for 16bit registers
2021-10-26 16:49:55 +00:00
| E | | 0x0E, 16-bit |
Updated info about PC and SP
2021-10-19 18:07:09 +00:00
|----------+----------+-------------------------|
| FL | | 0xF0, 8-bit |
|----------+----------+-------------------------|
| FH | | 0xF1, 8-bit |
|----------+----------+-------------------------|
Changed hex numbers for 16bit registers
2021-10-26 16:49:55 +00:00
| F | | 0x0F, 16-bit |
Updated info about PC and SP
2021-10-19 18:07:09 +00:00
|----------+----------+-------------------------|
| PC | Pointer | Program Counter, 16-bit |
|----------+----------+-------------------------|
Add SEC and CLC - carry flag manipulation commands
2022-04-19 14:27:01 +00:00
| SP | Pointer | Stack Pointer, 16-bit |
Updated info about PC and SP
2021-10-19 18:07:09 +00:00
|----------+----------+-------------------------|
| ZF | Flag | Zero Flag |
|----------+----------+-------------------------|
| NF | Flag | Negative Flag |
|----------+----------+-------------------------|
| CF | Flag | Carry Flag |
| | | |
|----------+----------+-------------------------|
| OF | Flag | Overflow Flag |
Initial commit
2021-10-15 08:17:02 +00:00
** Instuctions
Fixed CMP
2022-04-20 14:47:28 +00:00
|-----------------+--------+-------------------------------------------|
| Instructions | Opcode | Description |
|-----------------+--------+-------------------------------------------|
| MOV reg, imm16 | 0x01 | Place value to register. |
| MOV reg, reg | 0xA1 | Takes 2 bytes as arguments: |
| | | 1 - Opcode of register |
| | | 2 - Value or register |
| | | |
|-----------------+--------+-------------------------------------------|
| ADD reg, imm16 | 0x10 | Add |
| ADD reg, reg | 0xB0 | |
|-----------------+--------+-------------------------------------------|
| ADC reg, imm16 | 0x11 | Add with carry |
| ADC reg, reg | 0xB1 | |
|-----------------+--------+-------------------------------------------|
| SUB reg, imm16 | 0x12 | Subtract |
| SUB reg, reg | 0xB2 | |
|-----------------+--------+-------------------------------------------|
| MUL reg, imm16 | 0x13 | Multiply |
| MUL reg, reg | 0xB3 | |
|-----------------+--------+-------------------------------------------|
| DIV reg, imm16 | 0x14 | Divide |
| DIV reg, reg | 0xB4 | |
|-----------------+--------+-------------------------------------------|
| INC reg | 0x15 | Increment |
| | | |
|-----------------+--------+-------------------------------------------|
| DEC reg | 0x16 | Decrement |
|-----------------+--------+-------------------------------------------|
| NOT reg | 0x20 | Logical NOT |
|-----------------+--------+-------------------------------------------|
| AND reg, imm16 | 0x21 | Logical AND |
| AND reg, reg | 0xC1 | |
|-----------------+--------+-------------------------------------------|
| OR reg, imm16 | 0x22 | Logical OR |
| OR reg, reg | 0xC2 | |
|-----------------+--------+-------------------------------------------|
| NOR reg, imm16 | 0x23 | Logical NOR |
| NOR reg, reg | 0xC3 | |
|-----------------+--------+-------------------------------------------|
| XOR reg, imm16 | 0x24 | Logical XOR |
| XOR reg, reg | 0xC4 | |
|-----------------+--------+-------------------------------------------|
| NAND reg, imm16 | 0x25 | Logical NAND |
| NAND reg, reg | 0xC5 | |
|-----------------+--------+-------------------------------------------|
| CMP reg, imm16 | 0x26 | Compare |
| CMP reg, reg | 0xC6 | |
|-----------------+--------+-------------------------------------------|
| PUSH imm16 | 0x30 | Push to stack |
|-----------------+--------+-------------------------------------------|
| POP | 0x31 | Pop to stack |
|-----------------+--------+-------------------------------------------|
| JMP imm16 | 0x40 | Jump |
|-----------------+--------+-------------------------------------------|
| JSR imm16 | 0x41 | Jump to subroutine |
|-----------------+--------+-------------------------------------------|
| JC imm16 | 0x42 | Jump with carry |
|-----------------+--------+-------------------------------------------|
| JNC imm16 | 0x43 | Jump without carry |
|-----------------+--------+-------------------------------------------|
| JZ imm16 | 0x44 | Jump if zero |
|-----------------+--------+-------------------------------------------|
| JNZ imm16 | 0x45 | Jump if non-zero |
|-----------------+--------+-------------------------------------------|
| JE imm16 | 0x46 | Jump if equal |
|-----------------+--------+-------------------------------------------|
| JL imm16 | 0x47 | Jump if lower |
|-----------------+--------+-------------------------------------------|
| JH imm16 | 0x48 | Jump if higher |
|-----------------+--------+-------------------------------------------|
| RTS | 0x49 | Return from subroutine |
|-----------------+--------+-------------------------------------------|
| INB imm16 | 0x50 | Copies value from I/O port to destination |
|-----------------+--------+-------------------------------------------|
| OUTB imm16 | 0x51 | Copies value from operand to I/O port |
|-----------------+--------+-------------------------------------------|
| NOP | 0x90 | No operation |
|-----------------+--------+-------------------------------------------|
| SEC | 0x61 | Set carry flag |
|-----------------+--------+-------------------------------------------|
| CLC | 0x62 | Clear carry flag |
Initial commit
2021-10-15 08:17:02 +00:00
0x0* - MOV instructions (maybe it will for LDA or something)
Add styles
2021-10-15 09:18:37 +00:00
Initial commit
2021-10-15 08:17:02 +00:00
0x1* - Arithmetic (ADD, SUB and others)
Add styles
2021-10-15 09:18:37 +00:00
Initial commit
2021-10-15 08:17:02 +00:00
0x2* - Logic (AND, OR and others)
Add styles
2021-10-15 09:18:37 +00:00
Initial commit
2021-10-15 08:17:02 +00:00
0x3* - Stack Operations (PUSH, POP)
Add styles
2021-10-15 09:18:37 +00:00
Initial commit
2021-10-15 08:17:02 +00:00
0x4* - Jumps
Add styles
2021-10-15 09:18:37 +00:00
Initial commit
2021-10-15 08:17:02 +00:00
0x5* - Ports Operations
Add SEC and CLC - carry flag manipulation commands
2022-04-19 14:27:01 +00:00
0x6* - Flags Operations
Initial commit
2021-10-15 08:17:02 +00:00
0x90 - NOP
Add styles
2021-10-15 09:18:37 +00:00
Initial commit
2021-10-15 08:17:02 +00:00
TODO: add interrupts
Add styles
2021-10-15 09:18:37 +00:00
Initial commit
2021-10-15 08:17:02 +00:00
TODO: add HLT
Add styles
2021-10-15 09:18:37 +00:00
Add some description about commands operands
2021-10-25 16:32:07 +00:00
TODO: add instructions for memory use
Add Low and High registers (8-bit)
2021-10-17 11:11:46 +00:00
TODO: add more description