Kernel: add IDT (for interrupts) and fixed GDT - now can be loaded from grub
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f46798410a
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04b9ba01e8
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@ -43,16 +43,98 @@ _start:
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.global gdt_flush
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gdt_flush:
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cli
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mov 0x4(%esp),%eax
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sgdtl (%eax)
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lgdt (%eax)
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mov $0x10,%ax
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mov %ax,%ds
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mov %ax,%es
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mov %ax,%fs
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mov %ax,%gs
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mov %ax,%ss
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jmp $0x8,$.flush
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.flush:
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ret
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// IDT
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.global idt_flush
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idt_flush:
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mov 0x4(%esp),%eax
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lidt (%eax)
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ret
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// Interrupt Service Routine
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.macro ISR_NOERRCODE num
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.global isr\num
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isr\num:
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cli
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push $0x0
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push $0x\num
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jmp isr_common_stub
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.endm
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.macro ISR_ERRCODE num
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.global isr\num
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isr\num:
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cli
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push $0x\num
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jmp isr_common_stub
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.endm
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ISR_NOERRCODE 0 // Divide by sero
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ISR_NOERRCODE 1 // Debug
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ISR_NOERRCODE 2 // Non-maskable Interrupt
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ISR_NOERRCODE 3 // Breakpoint
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ISR_NOERRCODE 4 // Overflow
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ISR_NOERRCODE 5 // Bound Range Exceeded
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ISR_NOERRCODE 6 // Invalid Opcode
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ISR_NOERRCODE 7 // Device Not Avalible
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ISR_ERRCODE 8 // Double Fault
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ISR_NOERRCODE 9 // Coprocessor Segment Overrun
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ISR_ERRCODE 10 // Invalid TSS
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ISR_ERRCODE 11
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ISR_ERRCODE 12
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ISR_ERRCODE 13
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ISR_ERRCODE 14
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ISR_NOERRCODE 15
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ISR_NOERRCODE 16
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ISR_ERRCODE 17
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ISR_NOERRCODE 18
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ISR_NOERRCODE 19
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ISR_NOERRCODE 20
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ISR_NOERRCODE 21
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ISR_NOERRCODE 22
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ISR_NOERRCODE 23
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ISR_NOERRCODE 24
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ISR_NOERRCODE 25
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ISR_NOERRCODE 26
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ISR_NOERRCODE 27
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ISR_NOERRCODE 28
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ISR_NOERRCODE 29
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ISR_ERRCODE 30
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ISR_NOERRCODE 31
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isr_common_stub:
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pusha
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mov %ds,%ax
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push %eax
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mov $0x10,%ax
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mov %eax,%ds
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mov %eax,%es
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mov %eax,%fs
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mov %eax,%gs
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mov %eax,%ss
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ljmp $0x8,$.flush
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.flush:
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ret
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call isr_handler
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pop %eax
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mov %eax,%ds
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mov %eax,%es
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mov %eax,%fs
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mov %eax,%gs
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popa
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add $0x8,%esp
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sti
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iret
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@ -3,10 +3,15 @@
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#include <kernel/tty.h>
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#include "serial.h"
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#include "gdt.c"
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#include "interrupts.c"
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void kernel_early_main(void) {
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gdt_init();
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terminal_initialize();
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init_serial();
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serial_printf("gdt initialized!\n");
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idt_init();
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serial_printf("idt initialized!\n");
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//asm volatile("int $0x3");
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//asm volatile("int $0x4");
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terminal_initialize();
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}
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@ -1,54 +1,7 @@
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// Used for creating GDT segment descriptors in 64-bit integer form.
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#include <stdio.h>
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#include <stdint.h>
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// Each define here is for a specific flag in the descriptor.
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// Refer to the intel documentation for a description of what each one does.
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#define SEG_DESCTYPE(x) ((x) << 0x04) // Descriptor type (0 for system, 1 for code/data)
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#define SEG_PRES(x) ((x) << 0x07) // Present
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#define SEG_SAVL(x) ((x) << 0x0C) // Available for system use
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#define SEG_LONG(x) ((x) << 0x0D) // Long mode
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#define SEG_SIZE(x) ((x) << 0x0E) // Size (0 for 16-bit, 1 for 32)
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#define SEG_GRAN(x) ((x) << 0x0F) // Granularity (0 for 1B - 1MB, 1 for 4KB - 4GB)
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#define SEG_PRIV(x) (((x) & 0x03) << 0x05) // Set privilege level (0 - 3)
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#define SEG_DATA_RD 0x00 // Read-Only
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#define SEG_DATA_RDA 0x01 // Read-Only, accessed
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#define SEG_DATA_RDWR 0x02 // Read/Write
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#define SEG_DATA_RDWRA 0x03 // Read/Write, accessed
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#define SEG_DATA_RDEXPD 0x04 // Read-Only, expand-down
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#define SEG_DATA_RDEXPDA 0x05 // Read-Only, expand-down, accessed
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#define SEG_DATA_RDWREXPD 0x06 // Read/Write, expand-down
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#define SEG_DATA_RDWREXPDA 0x07 // Read/Write, expand-down, accessed
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#define SEG_CODE_EX 0x08 // Execute-Only
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#define SEG_CODE_EXA 0x09 // Execute-Only, accessed
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#define SEG_CODE_EXRD 0x0A // Execute/Read
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#define SEG_CODE_EXRDA 0x0B // Execute/Read, accessed
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#define SEG_CODE_EXC 0x0C // Execute-Only, conforming
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#define SEG_CODE_EXCA 0x0D // Execute-Only, conforming, accessed
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#define SEG_CODE_EXRDC 0x0E // Execute/Read, conforming
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#define SEG_CODE_EXRDCA 0x0F // Execute/Read, conforming, accessed
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#define GDT_CODE_PL0 SEG_DESCTYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \
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SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \
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SEG_PRIV(0) | SEG_CODE_EXRD
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#define GDT_DATA_PL0 SEG_DESCTYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \
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SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \
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SEG_PRIV(0) | SEG_DATA_RDWR
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#define GDT_CODE_PL3 SEG_DESCTYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \
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SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \
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SEG_PRIV(3) | SEG_CODE_EXRD
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#define GDT_DATA_PL3 SEG_DESCTYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \
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SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \
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SEG_PRIV(3) | SEG_DATA_RDWR
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#define GDT_MAX_DESCRIPTORS 3
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struct gdt_entry {
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struct gdt_entry_struct {
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uint16_t limit_low;
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uint16_t base_low;
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uint8_t base_middle;
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@ -56,53 +9,40 @@ struct gdt_entry {
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uint8_t granularity;
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uint8_t base_high;
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}__attribute__((packed));
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typedef struct gdt_entry_struct gdt_entry_t;
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struct gdt_ptr {
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struct gdt_ptr_struct {
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uint16_t limit;
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uint32_t base;
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}__attribute__((packed));
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typedef struct gdt_ptr_struct gdt_ptr_t;
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struct gdt_entry gdt[GDT_MAX_DESCRIPTORS];
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struct gdt_ptr gp;
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gdt_entry_t gdt_entries[5];
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gdt_ptr_t gdt_ptr;
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extern void gdt_flush(struct gdt_ptr* gdt_ptr_addr);
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void
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create_descriptor(uint32_t base, uint32_t limit, uint16_t flag)
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static void gdt_set_gate(int32_t num, uint32_t base, uint32_t limit, uint8_t access, uint8_t gran)
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{
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uint64_t descriptor;
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gdt_entries[num].base_low = (base & 0xFFFF);
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gdt_entries[num].base_middle = (base >> 16) & 0xFF;
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gdt_entries[num].base_high = (base >> 24) & 0xFF;
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gdt_entries[num].limit_low = (limit & 0xFFFF);
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gdt_entries[num].granularity = (limit >> 16) & 0x0F;
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// Create the high 32 bit segment
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descriptor = limit & 0x000F0000; // set limit bits 19:16
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descriptor |= (flag << 8) & 0x00F0FF00; // set type, p, dpl, s, g, d/b, l and avl fields
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descriptor |= (base >> 16) & 0x000000FF; // set base bits 23:16
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descriptor |= base & 0xFF000000; // set base bits 31:24
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// Shift by 32 to allow for low part of segment
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descriptor <<= 32;
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// Create the low 32 bit segment
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descriptor |= base << 16; // set base bits 15:0
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descriptor |= limit & 0x0000FFFF; // set limit bits 15:0
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printf("0x%.16llX\n", descriptor);
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gdt_entries[num].granularity |= gran & 0xF0;
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gdt_entries[num].access = access;
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}
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void gdt_init() {
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gp.limit = (sizeof(struct gdt_entry) * GDT_MAX_DESCRIPTORS) - 1;
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gp.base = (uint32_t) &gdt;
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create_descriptor(0, 0, 0);
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create_descriptor(0, 0x000FFFFF, (GDT_CODE_PL0));
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create_descriptor(0, 0x000FFFFF, (GDT_DATA_PL0));
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create_descriptor(0, 0x000FFFFF, (GDT_CODE_PL3));
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create_descriptor(0, 0x000FFFFF, (GDT_DATA_PL3));
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/*
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gdt_ptr.limit = (sizeof(gdt_entry_t) * 5) - 1;
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gdt_ptr.base = (uint32_t)&gdt_entries;
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gdt_set_gate(0, 0, 0, 0, 0);
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gdt_set_gate(1, 0, 0xFFFFFFFF, 0x9A, 0xCF);
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gdt_set_gate(2, 0, 0xFFFFFFFF, 0x92, 0xCF);
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*/
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gdt_flush(&gp);
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gdt_flush((uint32_t)&gdt_ptr);
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}
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@ -0,0 +1,116 @@
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struct idt_entry_struct
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{
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uint16_t base_lo; // The lower 16 bits of the ISR's address
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uint16_t sel; // The GDT segment selector that the CPU will load into CS before calling the ISR
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uint8_t always0; // Always set to zero
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uint8_t flags; // Type and attributes
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uint16_t base_hi; // The higher 16 bits of the ISR's address
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} __attribute__((packed));
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typedef struct idt_entry_struct idt_entry_t;
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struct idt_ptr_struct {
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uint16_t limit;
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uint32_t base;
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} __attribute__((packed));
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typedef struct idt_ptr_struct idt_ptr_t;
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idt_entry_t idt_entries[256];
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idt_ptr_t idt_ptr;
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void idt_set_gate(uint8_t num, uint32_t base, uint16_t sel, uint8_t flags) {
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idt_entries[num].base_lo = base & 0xFFFF;
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idt_entries[num].base_hi = (base >> 16) & 0xFFFF;
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idt_entries[num].sel = sel;
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idt_entries[num].always0 = 0;
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idt_entries[num].flags = flags;
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}
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void idt_init(void);
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void idt_init() {
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idt_ptr.base = (uintptr_t)&idt_entries;
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idt_ptr.limit = (uint16_t)sizeof(idt_entry_t) * 256 - 1;
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memset(&idt_entries, 0, sizeof(idt_entry_t)*256);
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extern isr0;
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extern isr1;
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extern isr2;
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extern isr3;
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extern isr4;
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extern isr5;
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extern isr6;
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extern isr7;
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extern isr8;
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extern isr9;
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extern isr10;
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extern isr11;
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extern isr12;
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extern isr13;
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extern isr14;
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extern isr15;
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extern isr16;
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extern isr17;
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extern isr18;
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extern isr19;
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extern isr20;
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extern isr21;
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extern isr22;
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extern isr23;
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extern isr24;
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extern isr25;
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extern isr26;
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extern isr27;
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extern isr28;
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extern isr29;
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extern isr30;
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extern isr31;
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idt_set_gate(0, (uint32_t)isr0, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr1, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr2, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr3, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr4, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr5, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr6, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr7, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr8, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr9, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr10, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr11, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr12, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr13, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr14, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr15, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr16, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr17, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr18, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr19, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr20, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr21, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr22, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr23, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr24, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr25, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr26, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr27, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr28, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr29, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr30, 0x08, 0x8E);
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idt_set_gate(0, (uint32_t)isr31, 0x08, 0x8E);
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//__asm__ volatile ("lidt %0" : : "memory"(idt_ptr)); // load the new IDT
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//__asm__ volatile ("sti"); // set the interrupt flag
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extern void idt_flush(uint32);
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idt_flush((uint32_t)&idt_ptr);
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}
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void isr_handler()
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{
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serial_printf("Received interrupt\n");
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}
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@ -6,6 +6,6 @@ void kernel_main(void) {
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serial_printf("Test is success!\n");
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serial_printf("Newline test\n");
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char * test_string = "test";
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serial_printf("This is string from variable: %s", test_string);
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serial_printf("This is string from variable: %s\n", test_string);
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printf("Test finished success!\n");
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}
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