From 99be8b1568ed5886ac6120ffcc22cc4c60633f41 Mon Sep 17 00:00:00 2001
From: g1n <g1n@ttm.sh>
Date: Mon, 11 Oct 2021 20:48:12 +0300
Subject: [PATCH] Add TSX, TXA and TXS instructions

---
 src/6502/6502.h   |  3 +++
 src/6502/main.c   | 20 +++++++++++++++++++-
 src/6502/test.bin |  2 +-
 3 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/src/6502/6502.h b/src/6502/6502.h
index 04a60bd..5b10157 100644
--- a/src/6502/6502.h
+++ b/src/6502/6502.h
@@ -28,6 +28,9 @@ typedef unsigned short word; // 16 bit
 
 #define INS_TAX 0xAA // TAX Implied
 #define INS_TAY 0xA8 // TAY Implied
+#define INS_TSX 0xBA // TSX Implied
+#define INS_TXA 0x8A // TXA Implied
+#define INS_TXS 0x9A // TXS Implied
 
 #define INS_JSR 0x20 // JSR
 #define INS_RTS 0x60 // RTS
diff --git a/src/6502/main.c b/src/6502/main.c
index a0fd182..19f354d 100644
--- a/src/6502/main.c
+++ b/src/6502/main.c
@@ -127,6 +127,7 @@ void execute() {
 				cpu.Z = (cpu.Y == 0);
 				cpu.N = (cpu.Y & 0b1000000) > 0;
 				break;
+				
 		        case INS_TAX:
 			        cpu.X = cpu.A;
 				cpu.Z = (cpu.X == 0);
@@ -139,7 +140,24 @@ void execute() {
 				cpu.N = (cpu.Y & 0b1000000) > 0;
 				cpu.PC++;
 			        break;
-			case INS_JSR:
+
+		        case INS_TSX:
+			        cpu.X = cpu.SP;
+			        cpu.Z = (cpu.X == 0);
+				cpu.N = (cpu.X & 0b1000000) > 0;
+				cpu.PC++;
+			        break;
+          		case INS_TXA:
+			        cpu.A = cpu.X;
+				cpu.Z = (cpu.A == 0);
+				cpu.N = (cpu.A & 0b1000000) > 0;
+				cpu.PC++;
+			        break;
+		        case INS_TXS:
+			        cpu.SP = cpu.X;
+				cpu.PC++;
+			        break;
+	   		case INS_JSR:
 				word jsr_addr = fetch_word();
 				write_word(cpu.PC - 1, cpu.SP);
 				cpu.SP++;
diff --git a/src/6502/test.bin b/src/6502/test.bin
index ec61b4f..ff9b4b5 100644
--- a/src/6502/test.bin
+++ b/src/6502/test.bin
@@ -1 +1 @@
-ê©U¨
\ No newline at end of file
+¢Bš
\ No newline at end of file