Clean up trace levels everywhere in SubX.
This commit is contained in:
Kartik Agaram 2018-07-27 11:55:47 -07:00
parent 7c22499166
commit 069ed1c879
11 changed files with 93 additions and 93 deletions

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@ -70,7 +70,7 @@ SF = ZF = OF = false;
/* arg1 and arg2 must be signed */ \
int64_t tmp = arg1 op arg2; \
arg1 = arg1 op arg2; \
trace(2, "run") << "storing 0x" << HEXWORD << arg1 << end(); \
trace(90, "run") << "storing 0x" << HEXWORD << arg1 << end(); \
SF = (arg1 < 0); \
ZF = (arg1 == 0); \
OF = (arg1 != tmp); \
@ -81,7 +81,7 @@ SF = ZF = OF = false;
#define BINARY_BITWISE_OP(op, arg1, arg2) { \
/* arg1 and arg2 must be unsigned */ \
arg1 = arg1 op arg2; \
trace(2, "run") << "storing 0x" << HEXWORD << arg1 << end(); \
trace(90, "run") << "storing 0x" << HEXWORD << arg1 << end(); \
SF = (arg1 >> 31); \
ZF = (arg1 == 0); \
OF = false; \
@ -146,7 +146,7 @@ inline void write_mem_i32(uint32_t addr, int32_t val) {
// skeleton of how x86 instructions are decoded
void run_one_instruction() {
uint8_t op=0, op2=0, op3=0;
trace(2, "run") << "inst: 0x" << HEXWORD << EIP << end();
trace(90, "run") << "inst: 0x" << HEXWORD << EIP << end();
//? cerr << "inst: 0x" << EIP << '\n';
switch (op = next()) {
case 0xf4: // hlt

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@ -237,7 +237,7 @@ put(name, "05", "add imm32 to R0 (EAX)");
:(before "End Single-Byte Opcodes")
case 0x05: { // add imm32 to EAX
int32_t arg2 = imm32();
trace(2, "run") << "add imm32 0x" << HEXWORD << arg2 << " to reg EAX" << end();
trace(90, "run") << "add imm32 0x" << HEXWORD << arg2 << " to reg EAX" << end();
BINARY_ARITHMETIC_OP(+, Reg[EAX].i, arg2);
break;
}

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@ -18,7 +18,7 @@ put(name, "01", "add r32 to rm32");
case 0x01: { // add r32 to r/m32
uint8_t modrm = next();
uint8_t arg2 = (modrm>>3)&0x7;
trace(2, "run") << "add " << rname(arg2) << " to r/m32" << end();
trace(90, "run") << "add " << rname(arg2) << " to r/m32" << end();
int32_t* arg1 = effective_address(modrm);
BINARY_ARITHMETIC_OP(+, *arg1, Reg[arg2].i);
break;
@ -36,7 +36,7 @@ int32_t* effective_address(uint8_t modrm) {
switch (mod) {
case 3:
// mod 3 is just register direct addressing
trace(2, "run") << "r/m32 is " << rname(rm) << end();
trace(90, "run") << "r/m32 is " << rname(rm) << end();
return &Reg[rm].i;
// End Mod Special-cases(addr)
default:
@ -81,7 +81,7 @@ put(name, "29", "subtract r32 from rm32");
case 0x29: { // subtract r32 from r/m32
uint8_t modrm = next();
uint8_t arg2 = (modrm>>3)&0x7;
trace(2, "run") << "subtract " << rname(arg2) << " from r/m32" << end();
trace(90, "run") << "subtract " << rname(arg2) << " from r/m32" << end();
int32_t* arg1 = effective_address(modrm);
BINARY_ARITHMETIC_OP(-, *arg1, Reg[arg2].i);
break;
@ -107,7 +107,7 @@ put(name, "21", "rm32 = bitwise AND of r32 with rm32");
case 0x21: { // and r32 with r/m32
uint8_t modrm = next();
uint8_t arg2 = (modrm>>3)&0x7;
trace(2, "run") << "and " << rname(arg2) << " with r/m32" << end();
trace(90, "run") << "and " << rname(arg2) << " with r/m32" << end();
int32_t* arg1 = effective_address(modrm);
BINARY_BITWISE_OP(&, *arg1, Reg[arg2].u);
break;
@ -133,7 +133,7 @@ put(name, "09", "rm32 = bitwise OR of r32 with rm32");
case 0x09: { // or r32 with r/m32
uint8_t modrm = next();
uint8_t arg2 = (modrm>>3)&0x7;
trace(2, "run") << "or " << rname(arg2) << " with r/m32" << end();
trace(90, "run") << "or " << rname(arg2) << " with r/m32" << end();
int32_t* arg1 = effective_address(modrm);
BINARY_BITWISE_OP(|, *arg1, Reg[arg2].u);
break;
@ -159,7 +159,7 @@ put(name, "31", "rm32 = bitwise XOR of r32 with rm32");
case 0x31: { // xor r32 with r/m32
uint8_t modrm = next();
uint8_t arg2 = (modrm>>3)&0x7;
trace(2, "run") << "xor " << rname(arg2) << " with r/m32" << end();
trace(90, "run") << "xor " << rname(arg2) << " with r/m32" << end();
int32_t* arg1 = effective_address(modrm);
BINARY_BITWISE_OP(^, *arg1, Reg[arg2].u);
break;
@ -183,10 +183,10 @@ put(name, "f7", "bitwise complement of rm32");
:(before "End Single-Byte Opcodes")
case 0xf7: { // xor r32 with r/m32
uint8_t modrm = next();
trace(2, "run") << "'not' of r/m32" << end();
trace(90, "run") << "'not' of r/m32" << end();
int32_t* arg1 = effective_address(modrm);
*arg1 = ~(*arg1);
trace(2, "run") << "storing 0x" << HEXWORD << *arg1 << end();
trace(90, "run") << "storing 0x" << HEXWORD << *arg1 << end();
SF = (*arg1 >> 31);
ZF = (*arg1 == 0);
OF = false;
@ -213,7 +213,7 @@ put(name, "39", "set SF if rm32 < r32");
case 0x39: { // set SF if r/m32 < r32
uint8_t modrm = next();
uint8_t reg2 = (modrm>>3)&0x7;
trace(2, "run") << "compare " << rname(reg2) << " with r/m32" << end();
trace(90, "run") << "compare " << rname(reg2) << " with r/m32" << end();
int32_t* arg1 = effective_address(modrm);
int32_t arg2 = Reg[reg2].i;
int32_t tmp1 = *arg1 - arg2;
@ -221,7 +221,7 @@ case 0x39: { // set SF if r/m32 < r32
ZF = (tmp1 == 0);
int64_t tmp2 = *arg1 - arg2;
OF = (tmp1 != tmp2);
trace(2, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
break;
}
@ -266,10 +266,10 @@ put(name, "89", "copy r32 to rm32");
case 0x89: { // copy r32 to r/m32
uint8_t modrm = next();
uint8_t reg2 = (modrm>>3)&0x7;
trace(2, "run") << "copy " << rname(reg2) << " to r/m32" << end();
trace(90, "run") << "copy " << rname(reg2) << " to r/m32" << end();
int32_t* arg1 = effective_address(modrm);
*arg1 = Reg[reg2].i;
trace(2, "run") << "storing 0x" << HEXWORD << *arg1 << end();
trace(90, "run") << "storing 0x" << HEXWORD << *arg1 << end();
break;
}
@ -294,13 +294,13 @@ put(name, "87", "swap the contents of r32 and rm32");
case 0x87: { // exchange r32 with r/m32
uint8_t modrm = next();
uint8_t reg2 = (modrm>>3)&0x7;
trace(2, "run") << "exchange " << rname(reg2) << " with r/m32" << end();
trace(90, "run") << "exchange " << rname(reg2) << " with r/m32" << end();
int32_t* arg1 = effective_address(modrm);
int32_t tmp = *arg1;
*arg1 = Reg[reg2].i;
Reg[reg2].i = tmp;
trace(2, "run") << "storing 0x" << HEXWORD << *arg1 << " in r/m32" << end();
trace(2, "run") << "storing 0x" << HEXWORD << Reg[reg2].i << " in " << rname(reg2) << end();
trace(90, "run") << "storing 0x" << HEXWORD << *arg1 << " in r/m32" << end();
trace(90, "run") << "storing 0x" << HEXWORD << Reg[reg2].i << " in " << rname(reg2) << end();
break;
}
@ -336,15 +336,15 @@ case 0x55:
case 0x56:
case 0x57: { // push r32 to stack
uint8_t reg = op & 0x7;
trace(2, "run") << "push " << rname(reg) << end();
trace(90, "run") << "push " << rname(reg) << end();
push(Reg[reg].u);
break;
}
:(code)
void push(uint32_t val) {
Reg[ESP].u -= 4;
trace(2, "run") << "decrementing ESP to 0x" << HEXWORD << Reg[ESP].u << end();
trace(2, "run") << "pushing value 0x" << HEXWORD << val << end();
trace(90, "run") << "decrementing ESP to 0x" << HEXWORD << Reg[ESP].u << end();
trace(90, "run") << "pushing value 0x" << HEXWORD << val << end();
write_mem_u32(Reg[ESP].u, val);
}
@ -382,15 +382,15 @@ case 0x5d:
case 0x5e:
case 0x5f: { // pop stack into r32
uint8_t reg = op & 0x7;
trace(2, "run") << "pop into " << rname(reg) << end();
trace(90, "run") << "pop into " << rname(reg) << end();
Reg[reg].u = pop();
break;
}
:(code)
uint32_t pop() {
uint32_t result = read_mem_u32(Reg[ESP].u);
trace(2, "run") << "popping value 0x" << HEXWORD << result << end();
trace(90, "run") << "popping value 0x" << HEXWORD << result << end();
Reg[ESP].u += 4;
trace(2, "run") << "incrementing ESP to 0x" << HEXWORD << Reg[ESP].u << end();
trace(90, "run") << "incrementing ESP to 0x" << HEXWORD << Reg[ESP].u << end();
return result;
}

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@ -18,7 +18,7 @@
case 0: // indirect addressing
switch (rm) {
default: // address in register
trace(2, "run") << "effective address is 0x" << std::hex << Reg[rm].u << " (" << rname(rm) << ")" << end();
trace(90, "run") << "effective address is 0x" << std::hex << Reg[rm].u << " (" << rname(rm) << ")" << end();
addr = Reg[rm].u;
break;
// End Mod 0 Special-cases(addr)
@ -47,7 +47,7 @@ put(name, "03", "add rm32 to r32");
case 0x03: { // add r/m32 to r32
uint8_t modrm = next();
uint8_t arg1 = (modrm>>3)&0x7;
trace(2, "run") << "add r/m32 to " << rname(arg1) << end();
trace(90, "run") << "add r/m32 to " << rname(arg1) << end();
const int32_t* arg2 = effective_address(modrm);
BINARY_ARITHMETIC_OP(+, Reg[arg1].i, *arg2);
break;
@ -90,7 +90,7 @@ put(name, "2b", "subtract rm32 from r32");
case 0x2b: { // subtract r/m32 from r32
uint8_t modrm = next();
uint8_t arg1 = (modrm>>3)&0x7;
trace(2, "run") << "subtract r/m32 from " << rname(arg1) << end();
trace(90, "run") << "subtract r/m32 from " << rname(arg1) << end();
const int32_t* arg2 = effective_address(modrm);
BINARY_ARITHMETIC_OP(-, Reg[arg1].i, *arg2);
break;
@ -133,7 +133,7 @@ ff 00 00 00 # 0xff
case 0x23: { // and r/m32 with r32
uint8_t modrm = next();
uint8_t arg1 = (modrm>>3)&0x7;
trace(2, "run") << "and r/m32 with " << rname(arg1) << end();
trace(90, "run") << "and r/m32 with " << rname(arg1) << end();
const int32_t* arg2 = effective_address(modrm);
BINARY_BITWISE_OP(&, Reg[arg1].u, *arg2);
break;
@ -176,7 +176,7 @@ put(name, "0b", "r32 = bitwise OR of r32 with rm32");
case 0x0b: { // or r/m32 with r32
uint8_t modrm = next();
uint8_t arg1 = (modrm>>3)&0x7;
trace(2, "run") << "or r/m32 with " << rname(arg1) << end();
trace(90, "run") << "or r/m32 with " << rname(arg1) << end();
const int32_t* arg2 = effective_address(modrm);
BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
break;
@ -219,7 +219,7 @@ put(name, "33", "r32 = bitwise XOR of r32 with rm32");
case 0x33: { // xor r/m32 with r32
uint8_t modrm = next();
uint8_t arg1 = (modrm>>3)&0x7;
trace(2, "run") << "xor r/m32 with " << rname(arg1) << end();
trace(90, "run") << "xor r/m32 with " << rname(arg1) << end();
const int32_t* arg2 = effective_address(modrm);
BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
break;
@ -302,7 +302,7 @@ put(name, "3b", "set SF if rm32 > r32");
case 0x3b: { // set SF if r32 < r/m32
uint8_t modrm = next();
uint8_t reg1 = (modrm>>3)&0x7;
trace(2, "run") << "compare r/m32 with " << rname(reg1) << end();
trace(90, "run") << "compare r/m32 with " << rname(reg1) << end();
int32_t arg1 = Reg[reg1].i;
int32_t* arg2 = effective_address(modrm);
int32_t tmp1 = arg1 - *arg2;
@ -310,7 +310,7 @@ case 0x3b: { // set SF if r32 < r/m32
ZF = (tmp1 == 0);
int64_t tmp2 = arg1 - *arg2;
OF = (tmp1 != tmp2);
trace(2, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
break;
}
@ -374,10 +374,10 @@ af 00 00 00 # 0xaf
case 0x8b: { // copy r32 to r/m32
uint8_t modrm = next();
uint8_t reg1 = (modrm>>3)&0x7;
trace(2, "run") << "copy r/m32 to " << rname(reg1) << end();
trace(90, "run") << "copy r/m32 to " << rname(reg1) << end();
int32_t* arg2 = effective_address(modrm);
Reg[reg1].i = *arg2;
trace(2, "run") << "storing 0x" << HEXWORD << *arg2 << end();
trace(90, "run") << "storing 0x" << HEXWORD << *arg2 << end();
break;
}
@ -409,10 +409,10 @@ case 0xff: {
uint8_t subop = (modrm>>3)&0x7; // middle 3 'reg opcode' bits
switch (subop) {
case 4: { // jump to r/m32
trace(2, "run") << "jump to r/m32" << end();
trace(90, "run") << "jump to r/m32" << end();
int32_t* arg2 = effective_address(modrm);
EIP = *arg2;
trace(2, "run") << "jumping to 0x" << HEXWORD << EIP << end();
trace(90, "run") << "jumping to 0x" << HEXWORD << EIP << end();
break;
}
// End Op ff Subops
@ -438,7 +438,7 @@ af 00 00 00 # 0xaf
:(before "End Op ff Subops")
case 6: { // push r/m32 to stack
trace(2, "run") << "push r/m32" << end();
trace(90, "run") << "push r/m32" << end();
const int32_t* val = effective_address(modrm);
push(*val);
break;
@ -469,7 +469,7 @@ case 0x8f: { // pop stack into r/m32
uint8_t subop = (modrm>>3)&0x7;
switch (subop) {
case 0: {
trace(2, "run") << "pop into r/m32" << end();
trace(90, "run") << "pop into r/m32" << end();
int32_t* dest = effective_address(modrm);
*dest = pop();
break;
@ -495,7 +495,7 @@ case 0x8f: { // pop stack into r/m32
:(before "End Mod 0 Special-cases(addr)")
case 5: // exception: mod 0b00 rm 0b101 => incoming disp32
addr = imm32();
trace(2, "run") << "effective address is 0x" << std::hex << addr << " (disp32)" << end();
trace(90, "run") << "effective address is 0x" << std::hex << addr << " (disp32)" << end();
break;
//:
@ -519,13 +519,13 @@ case 1: // indirect + disp8 addressing
switch (rm) {
default:
addr = Reg[rm].u;
trace(2, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(rm) << ")" << end();
trace(90, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(rm) << ")" << end();
break;
// End Mod 1 Special-cases(addr)
}
if (addr > 0) {
addr += static_cast<int8_t>(next());
trace(2, "run") << "effective address is 0x" << std::hex << addr << " (after adding disp8)" << end();
trace(90, "run") << "effective address is 0x" << std::hex << addr << " (after adding disp8)" << end();
}
break;
@ -564,13 +564,13 @@ case 2: // indirect + disp32 addressing
switch (rm) {
default:
addr = Reg[rm].u;
trace(2, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(rm) << ")" << end();
trace(90, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(rm) << ")" << end();
break;
// End Mod 2 Special-cases(addr)
}
if (addr > 0) {
addr += imm32();
trace(2, "run") << "effective address is 0x" << std::hex << addr << " (after adding disp32)" << end();
trace(90, "run") << "effective address is 0x" << std::hex << addr << " (after adding disp32)" << end();
}
break;

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@ -18,12 +18,12 @@ put(name, "81", "combine rm32 with imm32 based on subop");
case 0x81: { // combine imm32 with r/m32
uint8_t modrm = next();
int32_t arg2 = imm32();
trace(2, "run") << "combine imm32 0x" << HEXWORD << arg2 << " with r/m32" << end();
trace(90, "run") << "combine imm32 0x" << HEXWORD << arg2 << " with r/m32" << end();
int32_t* arg1 = effective_address(modrm);
uint8_t subop = (modrm>>3)&0x7; // middle 3 'reg opcode' bits
switch (subop) {
case 0:
trace(2, "run") << "subop add" << end();
trace(90, "run") << "subop add" << end();
BINARY_ARITHMETIC_OP(+, *arg1, arg2);
break;
// End Op 81 Subops
@ -65,7 +65,7 @@ put(name, "2d", "subtract imm32 from R0 (EAX)");
:(before "End Single-Byte Opcodes")
case 0x2d: { // subtract imm32 from EAX
int32_t arg2 = imm32();
trace(2, "run") << "subtract imm32 0x" << HEXWORD << arg2 << " from EAX" << end();
trace(90, "run") << "subtract imm32 0x" << HEXWORD << arg2 << " from EAX" << end();
BINARY_ARITHMETIC_OP(-, Reg[EAX].i, arg2);
break;
}
@ -87,7 +87,7 @@ case 0x2d: { // subtract imm32 from EAX
:(before "End Op 81 Subops")
case 5: {
trace(2, "run") << "subop subtract" << end();
trace(90, "run") << "subop subtract" << end();
BINARY_ARITHMETIC_OP(-, *arg1, arg2);
break;
}
@ -121,7 +121,7 @@ put(name, "25", "R0 = bitwise AND of imm32 with R0 (EAX)");
:(before "End Single-Byte Opcodes")
case 0x25: { // and imm32 with EAX
int32_t arg2 = imm32();
trace(2, "run") << "and imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
trace(90, "run") << "and imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
BINARY_BITWISE_OP(&, Reg[EAX].i, arg2);
break;
}
@ -143,7 +143,7 @@ ff 00 00 00 # 0xff
:(before "End Op 81 Subops")
case 4: {
trace(2, "run") << "subop and" << end();
trace(90, "run") << "subop and" << end();
BINARY_BITWISE_OP(&, *arg1, arg2);
break;
}
@ -177,7 +177,7 @@ put(name, "0d", "R0 = bitwise OR of imm32 with R0 (EAX)");
:(before "End Single-Byte Opcodes")
case 0x0d: { // or imm32 with EAX
int32_t arg2 = imm32();
trace(2, "run") << "or imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
trace(90, "run") << "or imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
BINARY_BITWISE_OP(|, Reg[EAX].i, arg2);
break;
}
@ -199,7 +199,7 @@ a0 b0 c0 d0 # 0xd0c0b0a0
:(before "End Op 81 Subops")
case 1: {
trace(2, "run") << "subop or" << end();
trace(90, "run") << "subop or" << end();
BINARY_BITWISE_OP(|, *arg1, arg2);
break;
}
@ -231,7 +231,7 @@ put(name, "35", "R0 = bitwise XOR of imm32 with R0 (EAX)");
:(before "End Single-Byte Opcodes")
case 0x35: { // xor imm32 with EAX
int32_t arg2 = imm32();
trace(2, "run") << "xor imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
trace(90, "run") << "xor imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
BINARY_BITWISE_OP(^, Reg[EAX].i, arg2);
break;
}
@ -253,7 +253,7 @@ a0 b0 c0 d0 # 0xd0c0b0a0
:(before "End Op 81 Subops")
case 6: {
trace(2, "run") << "subop xor" << end();
trace(90, "run") << "subop xor" << end();
BINARY_BITWISE_OP(^, *arg1, arg2);
break;
}
@ -286,13 +286,13 @@ put(name, "3d", "subtract imm32 from R0 (EAX)");
case 0x3d: { // subtract imm32 from EAX
int32_t arg1 = Reg[EAX].i;
int32_t arg2 = imm32();
trace(2, "run") << "compare EAX and imm32 0x" << HEXWORD << arg2 << end();
trace(90, "run") << "compare EAX and imm32 0x" << HEXWORD << arg2 << end();
int32_t tmp1 = arg1 - arg2;
SF = (tmp1 < 0);
ZF = (tmp1 == 0);
int64_t tmp2 = arg1 - arg2;
OF = (tmp1 != tmp2);
trace(2, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
break;
}
@ -326,13 +326,13 @@ case 0x3d: { // subtract imm32 from EAX
:(before "End Op 81 Subops")
case 7: {
trace(2, "run") << "subop compare" << end();
trace(90, "run") << "subop compare" << end();
int32_t tmp1 = *arg1 - arg2;
SF = (tmp1 < 0);
ZF = (tmp1 == 0);
int64_t tmp2 = *arg1 - arg2;
OF = (tmp1 != tmp2);
trace(2, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
break;
}
@ -422,7 +422,7 @@ case 0xbe:
case 0xbf: { // copy imm32 to r32
uint8_t reg1 = op & 0x7;
int32_t arg2 = imm32();
trace(2, "run") << "copy imm32 0x" << HEXWORD << arg2 << " to " << rname(reg1) << end();
trace(90, "run") << "copy imm32 0x" << HEXWORD << arg2 << " to " << rname(reg1) << end();
Reg[reg1].i = arg2;
break;
}
@ -445,7 +445,7 @@ put(name, "c7", "copy imm32 to rm32");
case 0xc7: { // copy imm32 to r32
uint8_t modrm = next();
int32_t arg2 = imm32();
trace(2, "run") << "copy imm32 0x" << HEXWORD << arg2 << " to r/m32" << end();
trace(90, "run") << "copy imm32 0x" << HEXWORD << arg2 << " to r/m32" << end();
int32_t* arg1 = effective_address(modrm);
*arg1 = arg2;
break;
@ -468,10 +468,10 @@ put(name, "68", "push imm32 to stack");
:(before "End Single-Byte Opcodes")
case 0x68: {
int32_t val = imm32();
trace(2, "run") << "push imm32 0x" << HEXWORD << val << end();
trace(90, "run") << "push imm32 0x" << HEXWORD << val << end();
Reg[ESP].u -= 4;
write_mem_i32(Reg[ESP].u, val);
trace(2, "run") << "ESP is now 0x" << HEXWORD << Reg[ESP].u << end();
trace(2, "run") << "contents at ESP: 0x" << HEXWORD << read_mem_u32(Reg[ESP].u) << end();
trace(90, "run") << "ESP is now 0x" << HEXWORD << Reg[ESP].u << end();
trace(90, "run") << "contents at ESP: 0x" << HEXWORD << read_mem_u32(Reg[ESP].u) << end();
break;
}

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@ -26,22 +26,22 @@ uint32_t effective_address_from_sib(uint8_t mod) {
uint32_t addr = 0;
if (base != EBP || mod != 0) {
addr = Reg[base].u;
trace(2, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(base) << ")" << end();
trace(90, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(base) << ")" << end();
}
else {
// base == EBP && mod == 0
addr = imm32(); // ignore base
trace(2, "run") << "effective address is initially 0x" << std::hex << addr << " (disp32)" << end();
trace(90, "run") << "effective address is initially 0x" << std::hex << addr << " (disp32)" << end();
}
uint8_t index = (sib>>3)&0x7;
if (index == ESP) {
// ignore index and scale
trace(2, "run") << "effective address is 0x" << std::hex << addr << end();
trace(90, "run") << "effective address is 0x" << std::hex << addr << end();
}
else {
uint8_t scale = (1 << (sib>>6));
addr += Reg[index].i*scale; // treat index register as signed. Maybe base as well? But we'll always ensure it's non-negative.
trace(2, "run") << "effective address is 0x" << std::hex << addr << " (after adding " << rname(index) << "*" << NUM(scale) << ")" << end();
trace(90, "run") << "effective address is 0x" << std::hex << addr << " (after adding " << rname(index) << "*" << NUM(scale) << ")" << end();
}
return addr;
}

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@ -19,7 +19,7 @@ put(name, "eb", "jump disp8 bytes away");
:(before "End Single-Byte Opcodes")
case 0xeb: { // jump rel8
int8_t offset = static_cast<int>(next());
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
break;
}
@ -45,7 +45,7 @@ put(name, "74", "jump disp8 bytes away if ZF is set");
case 0x74: { // jump rel8 if ZF
int8_t offset = static_cast<int>(next());
if (ZF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -84,7 +84,7 @@ put(name, "75", "jump disp8 bytes away if ZF is not set");
case 0x75: { // jump rel8 unless ZF
int8_t offset = static_cast<int>(next());
if (!ZF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -125,7 +125,7 @@ put(name, "7f", "jump disp8 bytes away if greater (ZF is unset, SF == OF)");
case 0x7f: { // jump rel8 if !SF and !ZF
int8_t offset = static_cast<int>(next());
if (!ZF && SF == OF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -167,7 +167,7 @@ put(name, "7d", "jump disp8 bytes away if greater or equal (SF == OF)");
case 0x7d: { // jump rel8 if !SF
int8_t offset = static_cast<int>(next());
if (SF == OF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -209,7 +209,7 @@ put(name, "7c", "jump disp8 bytes away if lesser (SF != OF)");
case 0x7c: { // jump rel8 if SF and !ZF
int8_t offset = static_cast<int>(next());
if (SF != OF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -266,7 +266,7 @@ put(name, "7e", "jump disp8 bytes away if lesser or equal (ZF is set or SF != OF
case 0x7e: { // jump rel8 if SF or ZF
int8_t offset = static_cast<int>(next());
if (ZF || SF != OF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;

View File

@ -19,7 +19,7 @@ put(name, "e9", "jump disp16 bytes away");
:(before "End Single-Byte Opcodes")
case 0xe9: { // jump rel8
int16_t offset = imm16();
trace(2, "run") << "jump " << offset << end();
trace(90, "run") << "jump " << offset << end();
EIP += offset;
break;
}
@ -51,7 +51,7 @@ put(name_0f, "84", "jump disp16 bytes away if ZF is set");
case 0x84: { // jump rel16 if ZF
int8_t offset = imm16();
if (ZF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -90,7 +90,7 @@ put(name_0f, "85", "jump disp16 bytes away if ZF is not set");
case 0x85: { // jump rel16 unless ZF
int8_t offset = imm16();
if (!ZF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -131,7 +131,7 @@ put(name_0f, "8f", "jump disp16 bytes away if greater (ZF is unset, SF == OF)");
case 0x8f: { // jump rel16 if !SF and !ZF
int8_t offset = imm16();
if (!ZF && SF == OF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -173,7 +173,7 @@ put(name_0f, "8d", "jump disp16 bytes away if greater or equal (SF == OF)");
case 0x8d: { // jump rel16 if !SF
int8_t offset = imm16();
if (SF == OF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -215,7 +215,7 @@ put(name_0f, "8c", "jump disp16 bytes away if lesser (SF != OF)");
case 0x8c: { // jump rel16 if SF and !ZF
int8_t offset = imm16();
if (SF != OF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;
@ -272,7 +272,7 @@ put(name_0f, "8e", "jump disp16 bytes away if lesser or equal (ZF is set or SF !
case 0x8e: { // jump rel16 if SF or ZF
int8_t offset = imm16();
if (ZF || SF != OF) {
trace(2, "run") << "jump " << NUM(offset) << end();
trace(90, "run") << "jump " << NUM(offset) << end();
EIP += offset;
}
break;

View File

@ -17,10 +17,10 @@ put(name, "e8", "call disp32");
:(before "End Single-Byte Opcodes")
case 0xe8: { // call disp32 relative to next EIP
int32_t offset = imm32();
trace(2, "run") << "call imm32 0x" << HEXWORD << offset << end();
trace(90, "run") << "call imm32 0x" << HEXWORD << offset << end();
push(EIP);
EIP += offset;
trace(2, "run") << "jumping to 0x" << HEXWORD << EIP << end();
trace(90, "run") << "jumping to 0x" << HEXWORD << EIP << end();
break;
}
@ -41,11 +41,11 @@ case 0xe8: { // call disp32 relative to next EIP
:(before "End Op ff Subops")
case 2: { // call function pointer at r/m32
trace(2, "run") << "call to r/m32" << end();
trace(90, "run") << "call to r/m32" << end();
int32_t* offset = effective_address(modrm);
push(EIP);
EIP += *offset;
trace(2, "run") << "jumping to 0x" << HEXWORD << EIP << end();
trace(90, "run") << "jumping to 0x" << HEXWORD << EIP << end();
break;
}
@ -82,8 +82,8 @@ put(name, "c3", "return from most recent unfinished call");
:(before "End Single-Byte Opcodes")
case 0xc3: { // return from a call
trace(2, "run") << "return" << end();
trace(90, "run") << "return" << end();
EIP = pop();
trace(2, "run") << "jumping to 0x" << HEXWORD << EIP << end();
trace(90, "run") << "jumping to 0x" << HEXWORD << EIP << end();
break;
}

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@ -3,7 +3,7 @@ put(name, "cd", "software interrupt");
:(before "End Single-Byte Opcodes")
case 0xcd: { // int imm8 (software interrupt)
trace(2, "run") << "syscall" << end();
trace(90, "run") << "syscall" << end();
uint8_t code = next();
if (code != 0x80) {
raise << "Unimplemented interrupt code " << HEXBYTE << code << '\n' << end();

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@ -9,7 +9,7 @@
# 1-3 bytes 3 bits 2 bits 3 bits 3 bits 3 bits 2 bits 2 bits 0/1/2/4 bytes 0/1/2/4 bytes
loop:
05 0x0d0c0b0a/imm32 # add to EAX
+label: label 'loop' is at address 1
+translate: label 'loop' is at address 1
:(before "End One-time Setup")
Transform.push_back(replace_labels);
@ -53,7 +53,7 @@ void compute_addresses_for_labels(const segment& code, map<string, uint32_t> add
raise << "'" << to_string(inst) << "': labels can only be the first word in a line.\n" << end();
string label = curr.data.substr(0, SIZE(curr.data)-1);
put(address, label, current_byte);
trace(99, "label") << "label '" << label << "' is at address " << (current_byte+code.start) << end();
trace(99, "translate") << "label '" << label << "' is at address " << (current_byte+code.start) << end();
// no modifying current_byte; label definitions won't be in the final binary
}
}
@ -90,6 +90,6 @@ loop2:
05 0x0d0c0b0a/imm32 # add to EAX
loop3:
f
+label: label 'loop' is at address 1
+label: label 'loop2' is at address 1
+label: label 'loop3' is at address 6
+translate: label 'loop' is at address 1
+translate: label 'loop2' is at address 1
+translate: label 'loop3' is at address 6