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@ -28,19 +28,21 @@ int32_t* effective_address(uint8_t modrm) {
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uint8_t mod = (modrm>>6);
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uint8_t mod = (modrm>>6);
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// ignore middle 3 'reg opcode' bits
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// ignore middle 3 'reg opcode' bits
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uint8_t rm = modrm & 0x7;
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uint8_t rm = modrm & 0x7;
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int32_t* result = 0;
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uint32_t addr = 0;
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switch (mod) {
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switch (mod) {
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case 3:
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case 3:
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// mod 3 is just register direct addressing
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// mod 3 is just register direct addressing
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trace(2, "run") << "r/m32 is " << rname(rm) << end();
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trace(2, "run") << "r/m32 is " << rname(rm) << end();
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result = &Reg[rm].i;
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return &Reg[rm].i;
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break;
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// End Mod Special-cases(addr)
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// End Mod Special-cases
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default:
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default:
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cerr << "unrecognized mod bits: " << NUM(mod) << '\n';
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cerr << "unrecognized mod bits: " << NUM(mod) << '\n';
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exit(1);
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exit(1);
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}
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}
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return result;
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//: other mods are indirect, and they'll set addr appropriately
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assert(addr > 0);
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assert(addr + sizeof(int32_t) <= Mem.size());
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return reinterpret_cast<int32_t*>(&Mem.at(addr)); // rely on the host itself being in little-endian order
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}
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}
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//:: subtract
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//:: subtract
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@ -11,15 +11,14 @@
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+run: effective address is 0x60 (EAX)
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+run: effective address is 0x60 (EAX)
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+run: storing 0x00000011
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+run: storing 0x00000011
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:(before "End Mod Special-cases")
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:(before "End Mod Special-cases(addr)")
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case 0: // indirect addressing
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case 0: // indirect addressing
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switch (rm) {
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switch (rm) {
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default: // address in register
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default: // address in register
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trace(2, "run") << "effective address is 0x" << std::hex << Reg[rm].u << " (" << rname(rm) << ")" << end();
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trace(2, "run") << "effective address is 0x" << std::hex << Reg[rm].u << " (" << rname(rm) << ")" << end();
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assert(Reg[rm].u + sizeof(int32_t) <= Mem.size());
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addr = Reg[rm].u;
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result = reinterpret_cast<int32_t*>(&Mem.at(Reg[rm].u)); // rely on the host itself being in little-endian order
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break;
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break;
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// End Mod 0 Special-cases
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// End Mod 0 Special-cases(addr)
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}
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}
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break;
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break;
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@ -422,12 +421,10 @@ case 0x8f: { // pop stack into r/m32
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+run: storing 0x00000011
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+run: storing 0x00000011
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:(before "End Mod 0 Special-cases")
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:(before "End Mod 0 Special-cases")
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case 5: { // exception: mod 0b00 rm 0b101 => incoming disp32
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case 5: // exception: mod 0b00 rm 0b101 => incoming disp32
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uint32_t addr = imm32();
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addr = imm32();
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result = reinterpret_cast<int32_t*>(&Mem.at(addr));
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trace(2, "run") << "effective address is 0x" << std::hex << addr << " (disp32)" << end();
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trace(2, "run") << "effective address is 0x" << std::hex << addr << " (disp32)" << end();
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break;
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break;
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}
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//:
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//:
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@ -442,18 +439,16 @@ case 5: { // exception: mod 0b00 rm 0b101 => incoming disp32
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+run: effective address is 0x60 (EAX+disp8)
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+run: effective address is 0x60 (EAX+disp8)
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+run: storing 0x00000011
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+run: storing 0x00000011
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:(before "End Mod Special-cases")
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:(before "End Mod Special-cases(addr)")
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case 1: // indirect + disp8 addressing
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case 1: // indirect + disp8 addressing
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switch (rm) {
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switch (rm) {
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default: {
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default: {
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int8_t disp = next();
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int8_t disp = next();
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uint32_t addr = Reg[rm].u + disp;
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addr = Reg[rm].u + disp;
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trace(2, "run") << "effective address is 0x" << std::hex << addr << " (" << rname(rm) << "+disp8)" << end();
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trace(2, "run") << "effective address is 0x" << std::hex << addr << " (" << rname(rm) << "+disp8)" << end();
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assert(addr + sizeof(int32_t) <= Mem.size());
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result = reinterpret_cast<int32_t*>(&Mem.at(addr)); // rely on the host itself being in little-endian order
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break;
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break;
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}
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}
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// End Mod 1 Special-cases
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// End Mod 1 Special-cases(addr)
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}
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}
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break;
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break;
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@ -481,18 +476,16 @@ case 1: // indirect + disp8 addressing
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+run: effective address is 0x60 (EAX+disp32)
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+run: effective address is 0x60 (EAX+disp32)
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+run: storing 0x00000011
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+run: storing 0x00000011
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:(before "End Mod Special-cases")
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:(before "End Mod Special-cases(addr)")
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case 2: // indirect + disp32 addressing
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case 2: // indirect + disp32 addressing
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switch (rm) {
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switch (rm) {
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default: {
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default: {
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int32_t disp = imm32();
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int32_t disp = imm32();
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uint32_t addr = Reg[rm].u + disp;
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addr = Reg[rm].u + disp;
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trace(2, "run") << "effective address is 0x" << std::hex << addr << " (" << rname(rm) << "+disp32)" << end();
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trace(2, "run") << "effective address is 0x" << std::hex << addr << " (" << rname(rm) << "+disp32)" << end();
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assert(addr + sizeof(int32_t) <= Mem.size());
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result = reinterpret_cast<int32_t*>(&Mem.at(addr)); // rely on the host itself being in little-endian order
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break;
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break;
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}
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}
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// End Mod 2 Special-cases
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// End Mod 2 Special-cases(addr)
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}
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}
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break;
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break;
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@ -14,12 +14,9 @@
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+run: storing 0x00000011
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+run: storing 0x00000011
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:(before "End Mod 0 Special-cases")
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:(before "End Mod 0 Special-cases")
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case 4: { // exception: mod 0b00 rm 0b100 => incoming SIB (scale-index-base) byte
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case 4: // exception: mod 0b00 rm 0b100 => incoming SIB (scale-index-base) byte
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uint32_t addr = effective_address_from_sib(mod);
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addr = effective_address_from_sib(mod);
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if (addr == 0) break;
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result = reinterpret_cast<int32_t*>(&Mem.at(addr));
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break;
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break;
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}
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:(code)
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:(code)
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uint32_t effective_address_from_sib(uint8_t mod) {
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uint32_t effective_address_from_sib(uint8_t mod) {
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uint8_t sib = next();
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uint8_t sib = next();
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