4064
This commit is contained in:
Kartik K. Agaram
parent
f603d9f2d3
commit
0cb3c774b2
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@ -143,7 +143,7 @@ if ('onhashchange' in window) {
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<span id="L80" class="LineNr"> 80 </span><span class="Comment">//: yadda-yadda. Instead use this macro below to perform an unsafe cast to</span>
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<span id="L81" class="LineNr"> 81 </span><span class="Comment">//: signed. We'll just give up immediately if a container's ever too large.</span>
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<span id="L82" class="LineNr"> 82 </span><span class="Comment">//: Basically, Mu is not concerned about this being a little slower than it</span>
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<span id="L83" class="LineNr"> 83 </span><span class="Comment">//: could be. (<a href="https://gist.github.com/rygorous/e0f055bfb74e3d5f0af20690759de5a7)">https://gist.github.com/rygorous/e0f055bfb74e3d5f0af20690759de5a7)</a></span>
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<span id="L83" class="LineNr"> 83 </span><span class="Comment">//: could be. (<a href="https://gist.github.com/rygorous/e0f055bfb74e3d5f0af20690759de5a7">https://gist.github.com/rygorous/e0f055bfb74e3d5f0af20690759de5a7</a>)</span>
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<span id="L84" class="LineNr"> 84 </span><span class="Comment">//:</span>
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<span id="L85" class="LineNr"> 85 </span><span class="Comment">//: Addendum to corollary: We're going to uniformly use int everywhere, to</span>
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<span id="L86" class="LineNr"> 86 </span><span class="Comment">//: indicate that we're oblivious to number size, and since Clang on 32-bit</span>
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@ -155,7 +155,7 @@ if ('onhashchange' in window) {
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<span id="L92" class="LineNr"> 92 </span>
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<span id="L93" class="LineNr"> 93 </span><span class="Comment">//: 5. Integer overflow is guarded against at runtime using the -ftrapv flag</span>
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<span id="L94" class="LineNr"> 94 </span><span class="Comment">//: to the compiler, supported by Clang (GCC version only works sometimes:</span>
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<span id="L95" class="LineNr"> 95 </span><span class="Comment">//: <a href="http://stackoverflow.com/questions/20851061/how-to-make-gcc-ftrapv-work).">http://stackoverflow.com/questions/20851061/how-to-make-gcc-ftrapv-work).</a></span>
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<span id="L95" class="LineNr"> 95 </span><span class="Comment">//: <a href="http://stackoverflow.com/questions/20851061/how-to-make-gcc-ftrapv-work">http://stackoverflow.com/questions/20851061/how-to-make-gcc-ftrapv-work</a>).</span>
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<span id="L96" class="LineNr"> 96 </span><span class="Delimiter">:(before "atexit(reset)")</span>
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<span id="L97" class="LineNr"> 97 </span><a href='001help.cc.html#L102'>initialize_signal_handlers</a><span class="Delimiter">();</span> <span class="Comment">// not always necessary, but doesn't hurt</span>
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<span id="L98" class="LineNr"> 98 </span><span class="CommentedCode">//? cerr << INT_MAX+1 << '\n'; // test overflow</span>
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@ -106,7 +106,7 @@ if ('onhashchange' in window) {
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<span id="L45" class="LineNr"> 45 </span><span class="Comment">//:</span>
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<span id="L46" class="LineNr"> 46 </span><span class="Comment">//: Between layers and domain-driven testing, programming starts to look like a</span>
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<span id="L47" class="LineNr"> 47 </span><span class="Comment">//: fundamentally different activity. Instead of a) superficial, b) local rules</span>
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<span id="L48" class="LineNr"> 48 </span><span class="Comment">//: on c) code [like say <a href="http://blog.bbv.ch/2013/06/05/clean-code-cheat-sheet],">http://blog.bbv.ch/2013/06/05/clean-code-cheat-sheet],</a></span>
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<span id="L48" class="LineNr"> 48 </span><span class="Comment">//: on c) code [like say <a href="http://blog.bbv.ch/2013/06/05/clean-code-cheat-sheet">http://blog.bbv.ch/2013/06/05/clean-code-cheat-sheet</a>],</span>
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<span id="L49" class="LineNr"> 49 </span><span class="Comment">//: we allow programmers to engage with the a) deep, b) global structure of the</span>
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<span id="L50" class="LineNr"> 50 </span><span class="Comment">//: c) domain. If you can systematically track discontinuities in the domain,</span>
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<span id="L51" class="LineNr"> 51 </span><span class="Comment">//: you don't care if the code used gotos as long as it passed the tests. If</span>
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@ -126,7 +126,7 @@ if ('onhashchange' in window) {
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<span id="L65" class="LineNr"> 65 </span><span class="Comment">//:</span>
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<span id="L66" class="LineNr"> 66 </span><span class="Comment">//: "Programming properly should be regarded as an activity by which</span>
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<span id="L67" class="LineNr"> 67 </span><span class="Comment">//: programmers form a mental model, rather than as production of a program."</span>
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<span id="L68" class="LineNr"> 68 </span><span class="Comment">//: -- Peter Naur (<a href="http://alistair.cockburn.us/ASD+book+extract%3A+%22Naur,+Ehn,+Musashi%22)">http://alistair.cockburn.us/ASD+book+extract%3A+%22Naur,+Ehn,+Musashi%22)</a></span>
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<span id="L68" class="LineNr"> 68 </span><span class="Comment">//: -- Peter Naur (<a href="http://alistair.cockburn.us/ASD+book+extract%3A+%22Naur,+Ehn,+Musashi%22">http://alistair.cockburn.us/ASD+book+extract%3A+%22Naur,+Ehn,+Musashi%22</a>)</span>
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<span id="L69" class="LineNr"> 69 </span>
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<span id="L70" class="LineNr"> 70 </span><span class="Delimiter">:(before "End Types")</span>
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<span id="L71" class="LineNr"> 71 </span><span class="Normal">struct</span> trace_line <span class="Delimiter">{</span>
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@ -105,7 +105,7 @@ if ('onhashchange' in window) {
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<span id="L42" class="LineNr"> 42 </span><span class="PreProc"> </span><span class="Comment">/*</span><span class="Comment"> arg1 and arg2 must be signed </span><span class="Comment">*/</span><span class="PreProc"> \</span>
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<span id="L43" class="LineNr"> 43 </span><span class="PreProc"> </span><span class="Normal">int64_t</span><span class="PreProc"> tmp = arg1 op arg2</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L44" class="LineNr"> 44 </span><span class="PreProc"> arg1 = arg1 op arg2</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L45" class="LineNr"> 45 </span><span class="PreProc"> trace(</span><span class="Constant">2</span><span class="Delimiter">,</span><span class="PreProc"> </span><span class="Constant">"run"</span><span class="PreProc">) << </span><span class="Constant">"storing 0x"</span><span class="PreProc"> << <a href='010core.cc.html#L222'>HEXWORD</a> << arg1 << end()</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L45" class="LineNr"> 45 </span><span class="PreProc"> trace(</span><span class="Constant">2</span><span class="Delimiter">,</span><span class="PreProc"> </span><span class="Constant">"run"</span><span class="PreProc">) << </span><span class="Constant">"storing 0x"</span><span class="PreProc"> << <a href='010core.cc.html#L226'>HEXWORD</a> << arg1 << end()</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L46" class="LineNr"> 46 </span><span class="PreProc"> SF = (arg1 < </span><span class="Constant">0</span><span class="PreProc">)</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L47" class="LineNr"> 47 </span><span class="PreProc"> <a href='010core.cc.html#L30'>ZF</a> = (arg1 == </span><span class="Constant">0</span><span class="PreProc">)</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L48" class="LineNr"> 48 </span><span class="PreProc"> <a href='010core.cc.html#L31'>OF</a> = (arg1 != tmp)</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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@ -116,7 +116,7 @@ if ('onhashchange' in window) {
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<span id="L53" class="LineNr"> 53 </span><span class="PreProc">#define BINARY_BITWISE_OP(op</span><span class="Delimiter">,</span><span class="PreProc"> arg1</span><span class="Delimiter">,</span><span class="PreProc"> arg2) </span><span class="Delimiter">{</span><span class="PreProc"> \</span>
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<span id="L54" class="LineNr"> 54 </span><span class="PreProc"> </span><span class="Comment">/*</span><span class="Comment"> arg1 and arg2 must be unsigned </span><span class="Comment">*/</span><span class="PreProc"> \</span>
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<span id="L55" class="LineNr"> 55 </span><span class="PreProc"> arg1 = arg1 op arg2</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L56" class="LineNr"> 56 </span><span class="PreProc"> trace(</span><span class="Constant">2</span><span class="Delimiter">,</span><span class="PreProc"> </span><span class="Constant">"run"</span><span class="PreProc">) << </span><span class="Constant">"storing 0x"</span><span class="PreProc"> << <a href='010core.cc.html#L222'>HEXWORD</a> << arg1 << end()</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L56" class="LineNr"> 56 </span><span class="PreProc"> trace(</span><span class="Constant">2</span><span class="Delimiter">,</span><span class="PreProc"> </span><span class="Constant">"run"</span><span class="PreProc">) << </span><span class="Constant">"storing 0x"</span><span class="PreProc"> << <a href='010core.cc.html#L226'>HEXWORD</a> << arg1 << end()</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L57" class="LineNr"> 57 </span><span class="PreProc"> SF = (arg1 >> </span><span class="Constant">31</span><span class="PreProc">)</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L58" class="LineNr"> 58 </span><span class="PreProc"> <a href='010core.cc.html#L30'>ZF</a> = (arg1 == </span><span class="Constant">0</span><span class="PreProc">)</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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<span id="L59" class="LineNr"> 59 </span><span class="PreProc"> <a href='010core.cc.html#L31'>OF</a> = </span><span class="Constant">false</span><span class="Delimiter">;</span><span class="PreProc"> \</span>
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@ -131,161 +131,165 @@ if ('onhashchange' in window) {
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<span id="L68" class="LineNr"> 68 </span><a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>clear<span class="Delimiter">();</span>
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<span id="L69" class="LineNr"> 69 </span><a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>resize<span class="Delimiter">(</span><span class="Constant">1024</span><span class="Delimiter">);</span>
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<span id="L70" class="LineNr"> 70 </span><a href='010core.cc.html#L66'>End_of_program</a> = <span class="Constant">0</span><span class="Delimiter">;</span>
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<span id="L71" class="LineNr"> 71 </span>
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<span id="L72" class="LineNr"> 72 </span><span class="SalientComment">//:: core interpreter loop</span>
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<span id="L73" class="LineNr"> 73 </span>
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<span id="L74" class="LineNr"> 74 </span><span class="Delimiter">:(scenario add_imm32_to_eax)</span>
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<span id="L75" class="LineNr"> 75 </span><span class="Comment"># In scenarios, programs are a series of hex bytes, each (variable-length)</span>
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<span id="L76" class="LineNr"> 76 </span><span class="Comment"># instruction on one line.</span>
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<span id="L77" class="LineNr"> 77 </span>#
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<span id="L78" class="LineNr"> 78 </span><span class="Comment"># x86 instructions consist of the following parts (see cheatsheet.pdf):</span>
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<span id="L79" class="LineNr"> 79 </span><span class="Comment"># opcode ModR/M SIB displacement immediate</span>
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<span id="L80" class="LineNr"> 80 </span><span class="Comment"># instruction mod, reg, Reg/Mem bits scale, index, base</span>
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<span id="L81" class="LineNr"> 81 </span><span class="Comment"># 1-3 bytes 0/1 byte 0/1 byte 0/1/2/4 bytes 0/1/2/4 bytes</span>
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<span id="L82" class="LineNr"> 82 </span> <span class="Conceal">¦</span> <span class="PreProc">0</span><span class="Constant">5</span> 0a 0b 0c 0d <span class="Comment"># add 0x0d0c0b0a to EAX</span>
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<span id="L83" class="LineNr"> 83 </span><span class="Comment"># All hex bytes must be exactly 2 characters each. No '0x' prefixes.</span>
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<span id="L84" class="LineNr"> 84 </span><span class="traceContains">+load: 1 -> 05</span>
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<span id="L85" class="LineNr"> 85 </span><span class="traceContains">+load: 2 -> 0a</span>
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<span id="L86" class="LineNr"> 86 </span><span class="traceContains">+load: 3 -> 0b</span>
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<span id="L87" class="LineNr"> 87 </span><span class="traceContains">+load: 4 -> 0c</span>
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<span id="L88" class="LineNr"> 88 </span><span class="traceContains">+load: 5 -> 0d</span>
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<span id="L89" class="LineNr"> 89 </span><span class="traceContains">+run: add <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a to <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
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<span id="L90" class="LineNr"> 90 </span><span class="traceContains">+run: storing 0x0d0c0b0a</span>
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<span id="L91" class="LineNr"> 91 </span>
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<span id="L92" class="LineNr"> 92 </span><span class="Delimiter">:(code)</span>
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<span id="L93" class="LineNr"> 93 </span><span class="Comment">// helper for tests: load a program into memory from a textual representation</span>
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<span id="L94" class="LineNr"> 94 </span><span class="Comment">// of its bytes, and run it</span>
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<span id="L95" class="LineNr"> 95 </span><span class="Normal">void</span> <a href='010core.cc.html#L95'>run</a><span class="Delimiter">(</span><span class="Normal">const</span> string& text_bytes<span class="Delimiter">)</span> <span class="Delimiter">{</span>
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<span id="L96" class="LineNr"> 96 </span> <a href='010core.cc.html#L147'>load_program</a><span class="Delimiter">(</span>text_bytes<span class="Delimiter">);</span>
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<span id="L97" class="LineNr"> 97 </span> <a href='010core.cc.html#L21'>EIP</a> = <span class="Constant">1</span><span class="Delimiter">;</span> <span class="Comment">// preserve null pointer</span>
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<span id="L98" class="LineNr"> 98 </span> <span class="Normal">while</span> <span class="Delimiter">(</span><a href='010core.cc.html#L21'>EIP</a> < <a href='010core.cc.html#L66'>End_of_program</a><span class="Delimiter">)</span>
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<span id="L99" class="LineNr"> 99 </span> <span class="Conceal">¦</span> <a href='010core.cc.html#L103'>run_one_instruction</a><span class="Delimiter">();</span>
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<span id="L100" class="LineNr">100 </span><span class="Delimiter">}</span>
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<span id="L101" class="LineNr">101 </span>
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<span id="L102" class="LineNr">102 </span><span class="Comment">// skeleton of how x86 instructions are decoded</span>
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<span id="L103" class="LineNr">103 </span><span class="Normal">void</span> <a href='010core.cc.html#L103'>run_one_instruction</a><span class="Delimiter">()</span> <span class="Delimiter">{</span>
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<span id="L104" class="LineNr">104 </span> <span class="Normal">uint8_t</span> op=<span class="Constant">0</span><span class="Delimiter">,</span> op2=<span class="Constant">0</span><span class="Delimiter">,</span> op3=<span class="Constant">0</span><span class="Delimiter">;</span>
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<span id="L105" class="LineNr">105 </span> <span class="Normal">switch</span> <span class="Delimiter">(</span>op = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">())</span> <span class="Delimiter">{</span>
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<span id="L106" class="LineNr">106 </span> <span class="Normal">case</span> <span class="Constant">0xf4</span>: <span class="Comment">// hlt</span>
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<span id="L107" class="LineNr">107 </span> <span class="Conceal">¦</span> <a href='010core.cc.html#L21'>EIP</a> = <a href='010core.cc.html#L66'>End_of_program</a><span class="Delimiter">;</span>
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<span id="L108" class="LineNr">108 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
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<span id="L109" class="LineNr">109 </span> <span class="Comment">// our first opcode</span>
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<span id="L110" class="LineNr">110 </span> <span class="Normal">case</span> <span class="Constant">0x05</span>: <span class="Delimiter">{</span> <span class="Comment">// add imm32 to EAX</span>
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<span id="L111" class="LineNr">111 </span> <span class="Conceal">¦</span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L211'>imm32</a><span class="Delimiter">();</span>
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<span id="L112" class="LineNr">112 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"add <a href='010core.cc.html#L211'>imm32</a> 0x"</span> << <a href='010core.cc.html#L222'>HEXWORD</a> << arg2 << <span class="Constant">" to <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
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<span id="L113" class="LineNr">113 </span> <span class="Conceal">¦</span> <a href='010core.cc.html#L41'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>+<span class="Delimiter">,</span> Reg[EAX]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
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<span id="L114" class="LineNr">114 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
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<span id="L115" class="LineNr">115 </span> <span class="Delimiter">}</span>
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<span id="L116" class="LineNr">116 </span> <span class="Comment">// End Single-Byte Opcodes</span>
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<span id="L117" class="LineNr">117 </span> <span class="Normal">case</span> <span class="Constant">0x0f</span>:
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<span id="L118" class="LineNr">118 </span> <span class="Conceal">¦</span> <span class="Normal">switch</span><span class="Delimiter">(</span>op2 = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">())</span> <span class="Delimiter">{</span>
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<span id="L119" class="LineNr">119 </span> <span class="Conceal">¦</span> <span class="Comment">// End Two-Byte Opcodes Starting With 0f</span>
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<span id="L120" class="LineNr">120 </span> <span class="Conceal">¦</span> <span class="Normal">default</span>:
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<span id="L121" class="LineNr">121 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized second opcode after 0f: "</span> << <a href='010core.cc.html#L221'>HEXBYTE</a> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>op2<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
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<span id="L122" class="LineNr">122 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
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<span id="L123" class="LineNr">123 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
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<span id="L124" class="LineNr">124 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
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<span id="L125" class="LineNr">125 </span> <span class="Normal">case</span> <span class="Constant">0xf3</span>:
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<span id="L126" class="LineNr">126 </span> <span class="Conceal">¦</span> <span class="Normal">switch</span><span class="Delimiter">(</span>op2 = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">())</span> <span class="Delimiter">{</span>
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<span id="L127" class="LineNr">127 </span> <span class="Conceal">¦</span> <span class="Comment">// End Two-Byte Opcodes Starting With f3</span>
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<span id="L128" class="LineNr">128 </span> <span class="Conceal">¦</span> <span class="Normal">case</span> <span class="Constant">0x0f</span>:
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<span id="L129" class="LineNr">129 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Normal">switch</span><span class="Delimiter">(</span>op3 = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">())</span> <span class="Delimiter">{</span>
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<span id="L130" class="LineNr">130 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Comment">// End Three-Byte Opcodes Starting With f3 0f</span>
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<span id="L131" class="LineNr">131 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Normal">default</span>:
|
||||
<span id="L132" class="LineNr">132 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized third opcode after f3 0f: "</span> << <a href='010core.cc.html#L221'>HEXBYTE</a> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>op3<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L133" class="LineNr">133 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
|
||||
<span id="L134" class="LineNr">134 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L135" class="LineNr">135 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L136" class="LineNr">136 </span> <span class="Conceal">¦</span> <span class="Normal">default</span>:
|
||||
<span id="L137" class="LineNr">137 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized second opcode after f3: "</span> << <a href='010core.cc.html#L221'>HEXBYTE</a> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>op2<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L138" class="LineNr">138 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
|
||||
<span id="L139" class="LineNr">139 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L140" class="LineNr">140 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L141" class="LineNr">141 </span> <span class="Normal">default</span>:
|
||||
<span id="L142" class="LineNr">142 </span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized opcode: "</span> << <a href='010core.cc.html#L221'>HEXBYTE</a> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>op<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L143" class="LineNr">143 </span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
|
||||
<span id="L144" class="LineNr">144 </span> <span class="Delimiter">}</span>
|
||||
<span id="L145" class="LineNr">145 </span><span class="Delimiter">}</span>
|
||||
<span id="L146" class="LineNr">146 </span>
|
||||
<span id="L147" class="LineNr">147 </span><span class="Normal">void</span> <a href='010core.cc.html#L147'>load_program</a><span class="Delimiter">(</span><span class="Normal">const</span> string& text_bytes<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L148" class="LineNr">148 </span> <span class="Normal">uint32_t</span> addr = <span class="Constant">1</span><span class="Delimiter">;</span>
|
||||
<span id="L149" class="LineNr">149 </span> istringstream in<span class="Delimiter">(</span>text_bytes<span class="Delimiter">);</span>
|
||||
<span id="L150" class="LineNr">150 </span> in >> std::noskipws<span class="Delimiter">;</span>
|
||||
<span id="L151" class="LineNr">151 </span> <span class="Normal">while</span> <span class="Delimiter">(</span><a href='001help.cc.html#L188'>has_data</a><span class="Delimiter">(</span>in<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L152" class="LineNr">152 </span> <span class="Conceal">¦</span> <span class="Normal">char</span> c1 = <a href='010core.cc.html#L170'>next_hex_byte</a><span class="Delimiter">(</span>in<span class="Delimiter">);</span>
|
||||
<span id="L153" class="LineNr">153 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c1 == <span class="cSpecial">'\0'</span><span class="Delimiter">)</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L154" class="LineNr">154 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>!has_data<span class="Delimiter">(</span>in<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L155" class="LineNr">155 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L167'>raise</a> << <span class="Constant">"input program truncated mid-byte</span><span class="cSpecial">\n</span><span class="Constant">"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L156" class="LineNr">156 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">return</span><span class="Delimiter">;</span>
|
||||
<span id="L157" class="LineNr">157 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L158" class="LineNr">158 </span> <span class="Conceal">¦</span> <span class="Normal">char</span> c2 = <a href='010core.cc.html#L170'>next_hex_byte</a><span class="Delimiter">(</span>in<span class="Delimiter">);</span>
|
||||
<span id="L159" class="LineNr">159 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c2 == <span class="cSpecial">'\0'</span><span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L160" class="LineNr">160 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L167'>raise</a> << <span class="Constant">"input program truncated mid-byte</span><span class="cSpecial">\n</span><span class="Constant">"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L161" class="LineNr">161 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">return</span><span class="Delimiter">;</span>
|
||||
<span id="L162" class="LineNr">162 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L163" class="LineNr">163 </span> <span class="Conceal">¦</span> <a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>at<span class="Delimiter">(</span>addr<span class="Delimiter">)</span> = <a href='010core.cc.html#L196'>to_byte</a><span class="Delimiter">(</span>c1<span class="Delimiter">,</span> c2<span class="Delimiter">);</span>
|
||||
<span id="L164" class="LineNr">164 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">99</span><span class="Delimiter">,</span> <span class="Constant">"load"</span><span class="Delimiter">)</span> << addr << <span class="Constant">" -> "</span> << <a href='010core.cc.html#L221'>HEXBYTE</a> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span><a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>at<span class="Delimiter">(</span>addr<span class="Delimiter">))</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L165" class="LineNr">165 </span> <span class="Conceal">¦</span> addr++<span class="Delimiter">;</span>
|
||||
<span id="L166" class="LineNr">166 </span> <span class="Delimiter">}</span>
|
||||
<span id="L167" class="LineNr">167 </span> <a href='010core.cc.html#L66'>End_of_program</a> = addr<span class="Delimiter">;</span>
|
||||
<span id="L168" class="LineNr">168 </span><span class="Delimiter">}</span>
|
||||
<span id="L169" class="LineNr">169 </span>
|
||||
<span id="L170" class="LineNr">170 </span><span class="Normal">char</span> <a href='010core.cc.html#L170'>next_hex_byte</a><span class="Delimiter">(</span>istream& in<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L171" class="LineNr">171 </span> <span class="Normal">while</span> <span class="Delimiter">(</span><a href='001help.cc.html#L188'>has_data</a><span class="Delimiter">(</span>in<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L172" class="LineNr">172 </span> <span class="Conceal">¦</span> <span class="Normal">char</span> c = <span class="cSpecial">'\0'</span><span class="Delimiter">;</span>
|
||||
<span id="L173" class="LineNr">173 </span> <span class="Conceal">¦</span> in >> c<span class="Delimiter">;</span>
|
||||
<span id="L174" class="LineNr">174 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c == <span class="Constant">' '</span> || c == <span class="cSpecial">'\n'</span><span class="Delimiter">)</span> <span class="Identifier">continue</span><span class="Delimiter">;</span>
|
||||
<span id="L175" class="LineNr">175 </span> <span class="Conceal">¦</span> <span class="Normal">while</span> <span class="Delimiter">(</span>c == <span class="Constant">'#'</span><span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L176" class="LineNr">176 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Normal">while</span> <span class="Delimiter">(</span><a href='001help.cc.html#L188'>has_data</a><span class="Delimiter">(</span>in<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L177" class="LineNr">177 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> in >> c<span class="Delimiter">;</span>
|
||||
<span id="L178" class="LineNr">178 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c == <span class="cSpecial">'\n'</span><span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L179" class="LineNr">179 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> in >> c<span class="Delimiter">;</span>
|
||||
<span id="L180" class="LineNr">180 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L181" class="LineNr">181 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L182" class="LineNr">182 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L183" class="LineNr">183 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L184" class="LineNr">184 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'0'</span> && c <= <span class="Constant">'9'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> c<span class="Delimiter">;</span>
|
||||
<span id="L185" class="LineNr">185 </span> <span class="Conceal">¦</span> <span class="Normal">else</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'a'</span> && c <= <span class="Constant">'f'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> c<span class="Delimiter">;</span>
|
||||
<span id="L186" class="LineNr">186 </span> <span class="Conceal">¦</span> <span class="Normal">else</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'A'</span> && c <= <span class="Constant">'F'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> tolower<span class="Delimiter">(</span>c<span class="Delimiter">);</span>
|
||||
<span id="L187" class="LineNr">187 </span> <span class="Conceal">¦</span> <span class="Comment">// disallow any non-hex characters, including a '0x' prefix</span>
|
||||
<span id="L188" class="LineNr">188 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>!isspace<span class="Delimiter">(</span>c<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L189" class="LineNr">189 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L167'>raise</a> << <span class="Constant">"invalid non-hex character '"</span> << c << <span class="Constant">"'</span><span class="cSpecial">\n</span><span class="Constant">"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L190" class="LineNr">190 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L191" class="LineNr">191 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L192" class="LineNr">192 </span> <span class="Delimiter">}</span>
|
||||
<span id="L193" class="LineNr">193 </span> <span class="Identifier">return</span> <span class="cSpecial">'\0'</span><span class="Delimiter">;</span>
|
||||
<span id="L194" class="LineNr">194 </span><span class="Delimiter">}</span>
|
||||
<span id="L195" class="LineNr">195 </span>
|
||||
<span id="L196" class="LineNr">196 </span><span class="Normal">uint8_t</span> <a href='010core.cc.html#L196'>to_byte</a><span class="Delimiter">(</span><span class="Normal">char</span> hex_byte1<span class="Delimiter">,</span> <span class="Normal">char</span> hex_byte2<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L197" class="LineNr">197 </span> <span class="Identifier">return</span> <a href='010core.cc.html#L199'>to_hex_num</a><span class="Delimiter">(</span>hex_byte1<span class="Delimiter">)</span>*<span class="Constant">16</span> + <a href='010core.cc.html#L199'>to_hex_num</a><span class="Delimiter">(</span>hex_byte2<span class="Delimiter">);</span>
|
||||
<span id="L71" class="LineNr"> 71 </span><span class="Delimiter">:(before "End Includes")</span>
|
||||
<span id="L72" class="LineNr"> 72 </span><span class="Comment">// depends on Mem being laid out contiguously (so you can't use a map, etc.)</span>
|
||||
<span id="L73" class="LineNr"> 73 </span><span class="Comment">// and on the host also being little-endian</span>
|
||||
<span id="L74" class="LineNr"> 74 </span><span class="PreProc">#define SET_WORD_IN_MEM(addr</span><span class="Delimiter">,</span><span class="PreProc"> val) *</span><span class="Normal">reinterpret_cast</span><span class="PreProc"><</span><span class="Normal">int32_t</span><span class="PreProc">*>(&Mem</span><span class="Delimiter">.</span><span class="PreProc">at(addr)) = val</span><span class="Delimiter">;</span>
|
||||
<span id="L75" class="LineNr"> 75 </span>
|
||||
<span id="L76" class="LineNr"> 76 </span><span class="SalientComment">//:: core interpreter loop</span>
|
||||
<span id="L77" class="LineNr"> 77 </span>
|
||||
<span id="L78" class="LineNr"> 78 </span><span class="Delimiter">:(scenario add_imm32_to_eax)</span>
|
||||
<span id="L79" class="LineNr"> 79 </span><span class="Comment"># In scenarios, programs are a series of hex bytes, each (variable-length)</span>
|
||||
<span id="L80" class="LineNr"> 80 </span><span class="Comment"># instruction on one line.</span>
|
||||
<span id="L81" class="LineNr"> 81 </span>#
|
||||
<span id="L82" class="LineNr"> 82 </span><span class="Comment"># x86 instructions consist of the following parts (see cheatsheet.pdf):</span>
|
||||
<span id="L83" class="LineNr"> 83 </span><span class="Comment"># opcode ModR/M SIB displacement immediate</span>
|
||||
<span id="L84" class="LineNr"> 84 </span><span class="Comment"># instruction mod, reg, Reg/Mem bits scale, index, base</span>
|
||||
<span id="L85" class="LineNr"> 85 </span><span class="Comment"># 1-3 bytes 0/1 byte 0/1 byte 0/1/2/4 bytes 0/1/2/4 bytes</span>
|
||||
<span id="L86" class="LineNr"> 86 </span> <span class="Conceal">¦</span> <span class="PreProc">0</span><span class="Constant">5</span> 0a 0b 0c 0d <span class="Comment"># add 0x0d0c0b0a to EAX</span>
|
||||
<span id="L87" class="LineNr"> 87 </span><span class="Comment"># All hex bytes must be exactly 2 characters each. No '0x' prefixes.</span>
|
||||
<span id="L88" class="LineNr"> 88 </span><span class="traceContains">+load: 1 -> 05</span>
|
||||
<span id="L89" class="LineNr"> 89 </span><span class="traceContains">+load: 2 -> 0a</span>
|
||||
<span id="L90" class="LineNr"> 90 </span><span class="traceContains">+load: 3 -> 0b</span>
|
||||
<span id="L91" class="LineNr"> 91 </span><span class="traceContains">+load: 4 -> 0c</span>
|
||||
<span id="L92" class="LineNr"> 92 </span><span class="traceContains">+load: 5 -> 0d</span>
|
||||
<span id="L93" class="LineNr"> 93 </span><span class="traceContains">+run: add <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a to <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
|
||||
<span id="L94" class="LineNr"> 94 </span><span class="traceContains">+run: storing 0x0d0c0b0a</span>
|
||||
<span id="L95" class="LineNr"> 95 </span>
|
||||
<span id="L96" class="LineNr"> 96 </span><span class="Delimiter">:(code)</span>
|
||||
<span id="L97" class="LineNr"> 97 </span><span class="Comment">// helper for tests: load a program into memory from a textual representation</span>
|
||||
<span id="L98" class="LineNr"> 98 </span><span class="Comment">// of its bytes, and run it</span>
|
||||
<span id="L99" class="LineNr"> 99 </span><span class="Normal">void</span> <a href='010core.cc.html#L99'>run</a><span class="Delimiter">(</span><span class="Normal">const</span> string& text_bytes<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L100" class="LineNr">100 </span> <a href='010core.cc.html#L151'>load_program</a><span class="Delimiter">(</span>text_bytes<span class="Delimiter">);</span>
|
||||
<span id="L101" class="LineNr">101 </span> <a href='010core.cc.html#L21'>EIP</a> = <span class="Constant">1</span><span class="Delimiter">;</span> <span class="Comment">// preserve null pointer</span>
|
||||
<span id="L102" class="LineNr">102 </span> <span class="Normal">while</span> <span class="Delimiter">(</span><a href='010core.cc.html#L21'>EIP</a> < <a href='010core.cc.html#L66'>End_of_program</a><span class="Delimiter">)</span>
|
||||
<span id="L103" class="LineNr">103 </span> <span class="Conceal">¦</span> <a href='010core.cc.html#L107'>run_one_instruction</a><span class="Delimiter">();</span>
|
||||
<span id="L104" class="LineNr">104 </span><span class="Delimiter">}</span>
|
||||
<span id="L105" class="LineNr">105 </span>
|
||||
<span id="L106" class="LineNr">106 </span><span class="Comment">// skeleton of how x86 instructions are decoded</span>
|
||||
<span id="L107" class="LineNr">107 </span><span class="Normal">void</span> <a href='010core.cc.html#L107'>run_one_instruction</a><span class="Delimiter">()</span> <span class="Delimiter">{</span>
|
||||
<span id="L108" class="LineNr">108 </span> <span class="Normal">uint8_t</span> op=<span class="Constant">0</span><span class="Delimiter">,</span> op2=<span class="Constant">0</span><span class="Delimiter">,</span> op3=<span class="Constant">0</span><span class="Delimiter">;</span>
|
||||
<span id="L109" class="LineNr">109 </span> <span class="Normal">switch</span> <span class="Delimiter">(</span>op = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">())</span> <span class="Delimiter">{</span>
|
||||
<span id="L110" class="LineNr">110 </span> <span class="Normal">case</span> <span class="Constant">0xf4</span>: <span class="Comment">// hlt</span>
|
||||
<span id="L111" class="LineNr">111 </span> <span class="Conceal">¦</span> <a href='010core.cc.html#L21'>EIP</a> = <a href='010core.cc.html#L66'>End_of_program</a><span class="Delimiter">;</span>
|
||||
<span id="L112" class="LineNr">112 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L113" class="LineNr">113 </span> <span class="Comment">// our first opcode</span>
|
||||
<span id="L114" class="LineNr">114 </span> <span class="Normal">case</span> <span class="Constant">0x05</span>: <span class="Delimiter">{</span> <span class="Comment">// add imm32 to EAX</span>
|
||||
<span id="L115" class="LineNr">115 </span> <span class="Conceal">¦</span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L215'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L116" class="LineNr">116 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"add <a href='010core.cc.html#L215'>imm32</a> 0x"</span> << <a href='010core.cc.html#L226'>HEXWORD</a> << arg2 << <span class="Constant">" to <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L117" class="LineNr">117 </span> <span class="Conceal">¦</span> <a href='010core.cc.html#L41'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>+<span class="Delimiter">,</span> Reg[EAX]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L118" class="LineNr">118 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L119" class="LineNr">119 </span> <span class="Delimiter">}</span>
|
||||
<span id="L120" class="LineNr">120 </span> <span class="Comment">// End Single-Byte Opcodes</span>
|
||||
<span id="L121" class="LineNr">121 </span> <span class="Normal">case</span> <span class="Constant">0x0f</span>:
|
||||
<span id="L122" class="LineNr">122 </span> <span class="Conceal">¦</span> <span class="Normal">switch</span><span class="Delimiter">(</span>op2 = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">())</span> <span class="Delimiter">{</span>
|
||||
<span id="L123" class="LineNr">123 </span> <span class="Conceal">¦</span> <span class="Comment">// End Two-Byte Opcodes Starting With 0f</span>
|
||||
<span id="L124" class="LineNr">124 </span> <span class="Conceal">¦</span> <span class="Normal">default</span>:
|
||||
<span id="L125" class="LineNr">125 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized second opcode after 0f: "</span> << <a href='010core.cc.html#L225'>HEXBYTE</a> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>op2<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L126" class="LineNr">126 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
|
||||
<span id="L127" class="LineNr">127 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L128" class="LineNr">128 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L129" class="LineNr">129 </span> <span class="Normal">case</span> <span class="Constant">0xf3</span>:
|
||||
<span id="L130" class="LineNr">130 </span> <span class="Conceal">¦</span> <span class="Normal">switch</span><span class="Delimiter">(</span>op2 = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">())</span> <span class="Delimiter">{</span>
|
||||
<span id="L131" class="LineNr">131 </span> <span class="Conceal">¦</span> <span class="Comment">// End Two-Byte Opcodes Starting With f3</span>
|
||||
<span id="L132" class="LineNr">132 </span> <span class="Conceal">¦</span> <span class="Normal">case</span> <span class="Constant">0x0f</span>:
|
||||
<span id="L133" class="LineNr">133 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Normal">switch</span><span class="Delimiter">(</span>op3 = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">())</span> <span class="Delimiter">{</span>
|
||||
<span id="L134" class="LineNr">134 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Comment">// End Three-Byte Opcodes Starting With f3 0f</span>
|
||||
<span id="L135" class="LineNr">135 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Normal">default</span>:
|
||||
<span id="L136" class="LineNr">136 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized third opcode after f3 0f: "</span> << <a href='010core.cc.html#L225'>HEXBYTE</a> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>op3<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L137" class="LineNr">137 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
|
||||
<span id="L138" class="LineNr">138 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L139" class="LineNr">139 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L140" class="LineNr">140 </span> <span class="Conceal">¦</span> <span class="Normal">default</span>:
|
||||
<span id="L141" class="LineNr">141 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized second opcode after f3: "</span> << <a href='010core.cc.html#L225'>HEXBYTE</a> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>op2<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L142" class="LineNr">142 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
|
||||
<span id="L143" class="LineNr">143 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L144" class="LineNr">144 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L145" class="LineNr">145 </span> <span class="Normal">default</span>:
|
||||
<span id="L146" class="LineNr">146 </span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized opcode: "</span> << <a href='010core.cc.html#L225'>HEXBYTE</a> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>op<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L147" class="LineNr">147 </span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
|
||||
<span id="L148" class="LineNr">148 </span> <span class="Delimiter">}</span>
|
||||
<span id="L149" class="LineNr">149 </span><span class="Delimiter">}</span>
|
||||
<span id="L150" class="LineNr">150 </span>
|
||||
<span id="L151" class="LineNr">151 </span><span class="Normal">void</span> <a href='010core.cc.html#L151'>load_program</a><span class="Delimiter">(</span><span class="Normal">const</span> string& text_bytes<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L152" class="LineNr">152 </span> <span class="Normal">uint32_t</span> addr = <span class="Constant">1</span><span class="Delimiter">;</span>
|
||||
<span id="L153" class="LineNr">153 </span> istringstream in<span class="Delimiter">(</span>text_bytes<span class="Delimiter">);</span>
|
||||
<span id="L154" class="LineNr">154 </span> in >> std::noskipws<span class="Delimiter">;</span>
|
||||
<span id="L155" class="LineNr">155 </span> <span class="Normal">while</span> <span class="Delimiter">(</span><a href='001help.cc.html#L188'>has_data</a><span class="Delimiter">(</span>in<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L156" class="LineNr">156 </span> <span class="Conceal">¦</span> <span class="Normal">char</span> c1 = <a href='010core.cc.html#L174'>next_hex_byte</a><span class="Delimiter">(</span>in<span class="Delimiter">);</span>
|
||||
<span id="L157" class="LineNr">157 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c1 == <span class="cSpecial">'\0'</span><span class="Delimiter">)</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L158" class="LineNr">158 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>!has_data<span class="Delimiter">(</span>in<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L159" class="LineNr">159 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L167'>raise</a> << <span class="Constant">"input program truncated mid-byte</span><span class="cSpecial">\n</span><span class="Constant">"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L160" class="LineNr">160 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">return</span><span class="Delimiter">;</span>
|
||||
<span id="L161" class="LineNr">161 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L162" class="LineNr">162 </span> <span class="Conceal">¦</span> <span class="Normal">char</span> c2 = <a href='010core.cc.html#L174'>next_hex_byte</a><span class="Delimiter">(</span>in<span class="Delimiter">);</span>
|
||||
<span id="L163" class="LineNr">163 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c2 == <span class="cSpecial">'\0'</span><span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L164" class="LineNr">164 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L167'>raise</a> << <span class="Constant">"input program truncated mid-byte</span><span class="cSpecial">\n</span><span class="Constant">"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L165" class="LineNr">165 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">return</span><span class="Delimiter">;</span>
|
||||
<span id="L166" class="LineNr">166 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L167" class="LineNr">167 </span> <span class="Conceal">¦</span> <a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>at<span class="Delimiter">(</span>addr<span class="Delimiter">)</span> = <a href='010core.cc.html#L200'>to_byte</a><span class="Delimiter">(</span>c1<span class="Delimiter">,</span> c2<span class="Delimiter">);</span>
|
||||
<span id="L168" class="LineNr">168 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">99</span><span class="Delimiter">,</span> <span class="Constant">"load"</span><span class="Delimiter">)</span> << addr << <span class="Constant">" -> "</span> << <a href='010core.cc.html#L225'>HEXBYTE</a> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span><a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>at<span class="Delimiter">(</span>addr<span class="Delimiter">))</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L169" class="LineNr">169 </span> <span class="Conceal">¦</span> addr++<span class="Delimiter">;</span>
|
||||
<span id="L170" class="LineNr">170 </span> <span class="Delimiter">}</span>
|
||||
<span id="L171" class="LineNr">171 </span> <a href='010core.cc.html#L66'>End_of_program</a> = addr<span class="Delimiter">;</span>
|
||||
<span id="L172" class="LineNr">172 </span><span class="Delimiter">}</span>
|
||||
<span id="L173" class="LineNr">173 </span>
|
||||
<span id="L174" class="LineNr">174 </span><span class="Normal">char</span> <a href='010core.cc.html#L174'>next_hex_byte</a><span class="Delimiter">(</span>istream& in<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L175" class="LineNr">175 </span> <span class="Normal">while</span> <span class="Delimiter">(</span><a href='001help.cc.html#L188'>has_data</a><span class="Delimiter">(</span>in<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L176" class="LineNr">176 </span> <span class="Conceal">¦</span> <span class="Normal">char</span> c = <span class="cSpecial">'\0'</span><span class="Delimiter">;</span>
|
||||
<span id="L177" class="LineNr">177 </span> <span class="Conceal">¦</span> in >> c<span class="Delimiter">;</span>
|
||||
<span id="L178" class="LineNr">178 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c == <span class="Constant">' '</span> || c == <span class="cSpecial">'\n'</span><span class="Delimiter">)</span> <span class="Identifier">continue</span><span class="Delimiter">;</span>
|
||||
<span id="L179" class="LineNr">179 </span> <span class="Conceal">¦</span> <span class="Normal">while</span> <span class="Delimiter">(</span>c == <span class="Constant">'#'</span><span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L180" class="LineNr">180 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Normal">while</span> <span class="Delimiter">(</span><a href='001help.cc.html#L188'>has_data</a><span class="Delimiter">(</span>in<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L181" class="LineNr">181 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> in >> c<span class="Delimiter">;</span>
|
||||
<span id="L182" class="LineNr">182 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c == <span class="cSpecial">'\n'</span><span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L183" class="LineNr">183 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> in >> c<span class="Delimiter">;</span>
|
||||
<span id="L184" class="LineNr">184 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L185" class="LineNr">185 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L186" class="LineNr">186 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L187" class="LineNr">187 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L188" class="LineNr">188 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'0'</span> && c <= <span class="Constant">'9'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> c<span class="Delimiter">;</span>
|
||||
<span id="L189" class="LineNr">189 </span> <span class="Conceal">¦</span> <span class="Normal">else</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'a'</span> && c <= <span class="Constant">'f'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> c<span class="Delimiter">;</span>
|
||||
<span id="L190" class="LineNr">190 </span> <span class="Conceal">¦</span> <span class="Normal">else</span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'A'</span> && c <= <span class="Constant">'F'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> tolower<span class="Delimiter">(</span>c<span class="Delimiter">);</span>
|
||||
<span id="L191" class="LineNr">191 </span> <span class="Conceal">¦</span> <span class="Comment">// disallow any non-hex characters, including a '0x' prefix</span>
|
||||
<span id="L192" class="LineNr">192 </span> <span class="Conceal">¦</span> <span class="Normal">if</span> <span class="Delimiter">(</span>!isspace<span class="Delimiter">(</span>c<span class="Delimiter">))</span> <span class="Delimiter">{</span>
|
||||
<span id="L193" class="LineNr">193 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L167'>raise</a> << <span class="Constant">"invalid non-hex character '"</span> << c << <span class="Constant">"'</span><span class="cSpecial">\n</span><span class="Constant">"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L194" class="LineNr">194 </span> <span class="Conceal">¦</span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L195" class="LineNr">195 </span> <span class="Conceal">¦</span> <span class="Delimiter">}</span>
|
||||
<span id="L196" class="LineNr">196 </span> <span class="Delimiter">}</span>
|
||||
<span id="L197" class="LineNr">197 </span> <span class="Identifier">return</span> <span class="cSpecial">'\0'</span><span class="Delimiter">;</span>
|
||||
<span id="L198" class="LineNr">198 </span><span class="Delimiter">}</span>
|
||||
<span id="L199" class="LineNr">199 </span><span class="Normal">uint8_t</span> <a href='010core.cc.html#L199'>to_hex_num</a><span class="Delimiter">(</span><span class="Normal">char</span> c<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L200" class="LineNr">200 </span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'0'</span> && c <= <span class="Constant">'9'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> c - <span class="Constant">'0'</span><span class="Delimiter">;</span>
|
||||
<span id="L201" class="LineNr">201 </span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'a'</span> && c <= <span class="Constant">'f'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> c - <span class="Constant">'a'</span> + <span class="Constant">10</span><span class="Delimiter">;</span>
|
||||
<span id="L202" class="LineNr">202 </span> assert<span class="Delimiter">(</span><span class="Constant">false</span><span class="Delimiter">);</span>
|
||||
<span id="L203" class="LineNr">203 </span> <span class="Identifier">return</span> <span class="Constant">0</span><span class="Delimiter">;</span>
|
||||
<span id="L204" class="LineNr">204 </span><span class="Delimiter">}</span>
|
||||
<span id="L205" class="LineNr">205 </span>
|
||||
<span id="L206" class="LineNr">206 </span><span class="Normal">inline</span> <span class="Normal">uint8_t</span> <a href='010core.cc.html#L206'>next</a><span class="Delimiter">()</span> <span class="Delimiter">{</span>
|
||||
<span id="L207" class="LineNr">207 </span> <span class="Identifier">return</span> <a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>at<span class="Delimiter">(</span>EIP++<span class="Delimiter">);</span>
|
||||
<span id="L199" class="LineNr">199 </span>
|
||||
<span id="L200" class="LineNr">200 </span><span class="Normal">uint8_t</span> <a href='010core.cc.html#L200'>to_byte</a><span class="Delimiter">(</span><span class="Normal">char</span> hex_byte1<span class="Delimiter">,</span> <span class="Normal">char</span> hex_byte2<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L201" class="LineNr">201 </span> <span class="Identifier">return</span> <a href='010core.cc.html#L203'>to_hex_num</a><span class="Delimiter">(</span>hex_byte1<span class="Delimiter">)</span>*<span class="Constant">16</span> + <a href='010core.cc.html#L203'>to_hex_num</a><span class="Delimiter">(</span>hex_byte2<span class="Delimiter">);</span>
|
||||
<span id="L202" class="LineNr">202 </span><span class="Delimiter">}</span>
|
||||
<span id="L203" class="LineNr">203 </span><span class="Normal">uint8_t</span> <a href='010core.cc.html#L203'>to_hex_num</a><span class="Delimiter">(</span><span class="Normal">char</span> c<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L204" class="LineNr">204 </span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'0'</span> && c <= <span class="Constant">'9'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> c - <span class="Constant">'0'</span><span class="Delimiter">;</span>
|
||||
<span id="L205" class="LineNr">205 </span> <span class="Normal">if</span> <span class="Delimiter">(</span>c >= <span class="Constant">'a'</span> && c <= <span class="Constant">'f'</span><span class="Delimiter">)</span> <span class="Identifier">return</span> c - <span class="Constant">'a'</span> + <span class="Constant">10</span><span class="Delimiter">;</span>
|
||||
<span id="L206" class="LineNr">206 </span> assert<span class="Delimiter">(</span><span class="Constant">false</span><span class="Delimiter">);</span>
|
||||
<span id="L207" class="LineNr">207 </span> <span class="Identifier">return</span> <span class="Constant">0</span><span class="Delimiter">;</span>
|
||||
<span id="L208" class="LineNr">208 </span><span class="Delimiter">}</span>
|
||||
<span id="L209" class="LineNr">209 </span>
|
||||
<span id="L210" class="LineNr">210 </span><span class="Comment">// read a 32-bit immediate in little-endian order from the instruction stream</span>
|
||||
<span id="L211" class="LineNr">211 </span><span class="Normal">int32_t</span> <a href='010core.cc.html#L211'>imm32</a><span class="Delimiter">()</span> <span class="Delimiter">{</span>
|
||||
<span id="L212" class="LineNr">212 </span> <span class="Normal">int32_t</span> result = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L213" class="LineNr">213 </span> result |= <span class="Delimiter">(</span><a href='010core.cc.html#L206'>next</a><span class="Delimiter">()</span><<<span class="Constant">8</span><span class="Delimiter">);</span>
|
||||
<span id="L214" class="LineNr">214 </span> result |= <span class="Delimiter">(</span><a href='010core.cc.html#L206'>next</a><span class="Delimiter">()</span><<<span class="Constant">16</span><span class="Delimiter">);</span>
|
||||
<span id="L215" class="LineNr">215 </span> result |= <span class="Delimiter">(</span><a href='010core.cc.html#L206'>next</a><span class="Delimiter">()</span><<<span class="Constant">24</span><span class="Delimiter">);</span>
|
||||
<span id="L216" class="LineNr">216 </span> <span class="Identifier">return</span> result<span class="Delimiter">;</span>
|
||||
<span id="L217" class="LineNr">217 </span><span class="Delimiter">}</span>
|
||||
<span id="L218" class="LineNr">218 </span>
|
||||
<span id="L219" class="LineNr">219 </span><span class="Delimiter">:(before "End Includes")</span>
|
||||
<span id="L220" class="LineNr">220 </span><span class="PreProc">#include </span><span class="Constant"><iomanip></span>
|
||||
<span id="L221" class="LineNr">221 </span><span class="PreProc">#define HEXBYTE std::hex << std::setw(</span><span class="Constant">2</span><span class="PreProc">) << std::setfill(</span><span class="Constant">'0'</span><span class="PreProc">)</span>
|
||||
<span id="L222" class="LineNr">222 </span><span class="PreProc">#define HEXWORD std::hex << std::setw(</span><span class="Constant">8</span><span class="PreProc">) << std::setfill(</span><span class="Constant">'0'</span><span class="PreProc">)</span>
|
||||
<span id="L223" class="LineNr">223 </span><span class="Comment">// ugly that iostream doesn't print uint8_t as an integer</span>
|
||||
<span id="L224" class="LineNr">224 </span><span class="PreProc">#define NUM(X) </span><span class="Normal">static_cast</span><span class="PreProc"><</span><span class="Normal">int</span><span class="PreProc">>(X)</span>
|
||||
<span id="L225" class="LineNr">225 </span><span class="PreProc">#include </span><span class="Constant"><stdint.h></span>
|
||||
<span id="L210" class="LineNr">210 </span><span class="Normal">inline</span> <span class="Normal">uint8_t</span> <a href='010core.cc.html#L210'>next</a><span class="Delimiter">()</span> <span class="Delimiter">{</span>
|
||||
<span id="L211" class="LineNr">211 </span> <span class="Identifier">return</span> <a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>at<span class="Delimiter">(</span>EIP++<span class="Delimiter">);</span>
|
||||
<span id="L212" class="LineNr">212 </span><span class="Delimiter">}</span>
|
||||
<span id="L213" class="LineNr">213 </span>
|
||||
<span id="L214" class="LineNr">214 </span><span class="Comment">// read a 32-bit immediate in little-endian order from the instruction stream</span>
|
||||
<span id="L215" class="LineNr">215 </span><span class="Normal">int32_t</span> <a href='010core.cc.html#L215'>imm32</a><span class="Delimiter">()</span> <span class="Delimiter">{</span>
|
||||
<span id="L216" class="LineNr">216 </span> <span class="Normal">int32_t</span> result = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L217" class="LineNr">217 </span> result |= <span class="Delimiter">(</span><a href='010core.cc.html#L210'>next</a><span class="Delimiter">()</span><<<span class="Constant">8</span><span class="Delimiter">);</span>
|
||||
<span id="L218" class="LineNr">218 </span> result |= <span class="Delimiter">(</span><a href='010core.cc.html#L210'>next</a><span class="Delimiter">()</span><<<span class="Constant">16</span><span class="Delimiter">);</span>
|
||||
<span id="L219" class="LineNr">219 </span> result |= <span class="Delimiter">(</span><a href='010core.cc.html#L210'>next</a><span class="Delimiter">()</span><<<span class="Constant">24</span><span class="Delimiter">);</span>
|
||||
<span id="L220" class="LineNr">220 </span> <span class="Identifier">return</span> result<span class="Delimiter">;</span>
|
||||
<span id="L221" class="LineNr">221 </span><span class="Delimiter">}</span>
|
||||
<span id="L222" class="LineNr">222 </span>
|
||||
<span id="L223" class="LineNr">223 </span><span class="Delimiter">:(before "End Includes")</span>
|
||||
<span id="L224" class="LineNr">224 </span><span class="PreProc">#include </span><span class="Constant"><iomanip></span>
|
||||
<span id="L225" class="LineNr">225 </span><span class="PreProc">#define HEXBYTE std::hex << std::setw(</span><span class="Constant">2</span><span class="PreProc">) << std::setfill(</span><span class="Constant">'0'</span><span class="PreProc">)</span>
|
||||
<span id="L226" class="LineNr">226 </span><span class="PreProc">#define HEXWORD std::hex << std::setw(</span><span class="Constant">8</span><span class="PreProc">) << std::setfill(</span><span class="Constant">'0'</span><span class="PreProc">)</span>
|
||||
<span id="L227" class="LineNr">227 </span><span class="Comment">// ugly that iostream doesn't print uint8_t as an integer</span>
|
||||
<span id="L228" class="LineNr">228 </span><span class="PreProc">#define NUM(X) </span><span class="Normal">static_cast</span><span class="PreProc"><</span><span class="Normal">int</span><span class="PreProc">>(X)</span>
|
||||
<span id="L229" class="LineNr">229 </span><span class="PreProc">#include </span><span class="Constant"><stdint.h></span>
|
||||
</pre>
|
||||
</body>
|
||||
</html>
|
||||
|
|
|
|||
|
|
@ -76,9 +76,9 @@ if ('onhashchange' in window) {
|
|||
<span id="L11" class="LineNr"> 11 </span>
|
||||
<span id="L12" class="LineNr"> 12 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L13" class="LineNr"> 13 </span><span class="Normal">case</span> <span class="Constant">0x01</span>: <span class="Delimiter">{</span> <span class="Comment">// add r32 to r/m32</span>
|
||||
<span id="L14" class="LineNr"> 14 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L14" class="LineNr"> 14 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L15" class="LineNr"> 15 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L16" class="LineNr"> 16 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"add <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" to effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L16" class="LineNr"> 16 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"add <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" to effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L17" class="LineNr"> 17 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L18" class="LineNr"> 18 </span> <a href='010core.cc.html#L41'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>+<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">);</span>
|
||||
<span id="L19" class="LineNr"> 19 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
|
|
@ -96,12 +96,12 @@ if ('onhashchange' in window) {
|
|||
<span id="L31" class="LineNr"> 31 </span> <span class="Normal">switch</span> <span class="Delimiter">(</span>mod<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L32" class="LineNr"> 32 </span> <span class="Normal">case</span> <span class="Constant">3</span>:
|
||||
<span id="L33" class="LineNr"> 33 </span> <span class="Conceal">¦</span> <span class="Comment">// mod 3 is just register direct addressing</span>
|
||||
<span id="L34" class="LineNr"> 34 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>rm<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L34" class="LineNr"> 34 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>rm<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L35" class="LineNr"> 35 </span> <span class="Conceal">¦</span> result = &Reg[rm]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">;</span>
|
||||
<span id="L36" class="LineNr"> 36 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L37" class="LineNr"> 37 </span> <span class="Comment">// End Mod Special-cases</span>
|
||||
<span id="L38" class="LineNr"> 38 </span> <span class="Normal">default</span>:
|
||||
<span id="L39" class="LineNr"> 39 </span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized mod bits: "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>mod<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L39" class="LineNr"> 39 </span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized mod bits: "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>mod<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L40" class="LineNr"> 40 </span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
|
||||
<span id="L41" class="LineNr"> 41 </span> <span class="Delimiter">}</span>
|
||||
<span id="L42" class="LineNr"> 42 </span> <span class="Identifier">return</span> result<span class="Delimiter">;</span>
|
||||
|
|
@ -120,9 +120,9 @@ if ('onhashchange' in window) {
|
|||
<span id="L55" class="LineNr"> 55 </span>
|
||||
<span id="L56" class="LineNr"> 56 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L57" class="LineNr"> 57 </span><span class="Normal">case</span> <span class="Constant">0x29</span>: <span class="Delimiter">{</span> <span class="Comment">// subtract r32 from r/m32</span>
|
||||
<span id="L58" class="LineNr"> 58 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L58" class="LineNr"> 58 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L59" class="LineNr"> 59 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L60" class="LineNr"> 60 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subtract <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" from effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L60" class="LineNr"> 60 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subtract <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" from effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L61" class="LineNr"> 61 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L62" class="LineNr"> 62 </span> <a href='010core.cc.html#L41'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>-<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">);</span>
|
||||
<span id="L63" class="LineNr"> 63 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
|
|
@ -141,9 +141,9 @@ if ('onhashchange' in window) {
|
|||
<span id="L76" class="LineNr"> 76 </span>
|
||||
<span id="L77" class="LineNr"> 77 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L78" class="LineNr"> 78 </span><span class="Normal">case</span> <span class="Constant">0x21</span>: <span class="Delimiter">{</span> <span class="Comment">// and r32 with r/m32</span>
|
||||
<span id="L79" class="LineNr"> 79 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L79" class="LineNr"> 79 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L80" class="LineNr"> 80 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L81" class="LineNr"> 81 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"and <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L81" class="LineNr"> 81 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"and <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L82" class="LineNr"> 82 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L83" class="LineNr"> 83 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>&<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">);</span>
|
||||
<span id="L84" class="LineNr"> 84 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
|
|
@ -162,9 +162,9 @@ if ('onhashchange' in window) {
|
|||
<span id="L97" class="LineNr"> 97 </span>
|
||||
<span id="L98" class="LineNr"> 98 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L99" class="LineNr"> 99 </span><span class="Normal">case</span> <span class="Constant">0x09</span>: <span class="Delimiter">{</span> <span class="Comment">// or r32 with r/m32</span>
|
||||
<span id="L100" class="LineNr">100 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L100" class="LineNr">100 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L101" class="LineNr">101 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L102" class="LineNr">102 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"or <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L102" class="LineNr">102 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"or <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L103" class="LineNr">103 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L104" class="LineNr">104 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">);</span>
|
||||
<span id="L105" class="LineNr">105 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
|
|
@ -183,9 +183,9 @@ if ('onhashchange' in window) {
|
|||
<span id="L118" class="LineNr">118 </span>
|
||||
<span id="L119" class="LineNr">119 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L120" class="LineNr">120 </span><span class="Normal">case</span> <span class="Constant">0x31</span>: <span class="Delimiter">{</span> <span class="Comment">// xor r32 with r/m32</span>
|
||||
<span id="L121" class="LineNr">121 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L121" class="LineNr">121 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L122" class="LineNr">122 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L123" class="LineNr">123 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"xor <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L123" class="LineNr">123 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"xor <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L124" class="LineNr">124 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L125" class="LineNr">125 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">);</span>
|
||||
<span id="L126" class="LineNr">126 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
|
|
@ -203,11 +203,11 @@ if ('onhashchange' in window) {
|
|||
<span id="L138" class="LineNr">138 </span>
|
||||
<span id="L139" class="LineNr">139 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L140" class="LineNr">140 </span><span class="Normal">case</span> <span class="Constant">0xf7</span>: <span class="Delimiter">{</span> <span class="Comment">// xor r32 with r/m32</span>
|
||||
<span id="L141" class="LineNr">141 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L141" class="LineNr">141 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L142" class="LineNr">142 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"'not' of effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L143" class="LineNr">143 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L144" class="LineNr">144 </span> *arg1 = ~<span class="Delimiter">(</span>*arg1<span class="Delimiter">);</span>
|
||||
<span id="L145" class="LineNr">145 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"storing 0x"</span> << <a href='010core.cc.html#L222'>HEXWORD</a> << *arg1 << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L145" class="LineNr">145 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"storing 0x"</span> << <a href='010core.cc.html#L226'>HEXWORD</a> << *arg1 << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L146" class="LineNr">146 </span> SF = <span class="Delimiter">(</span>*arg1 >> <span class="Constant">31</span><span class="Delimiter">);</span>
|
||||
<span id="L147" class="LineNr">147 </span> <a href='010core.cc.html#L30'>ZF</a> = <span class="Delimiter">(</span>*arg1 == <span class="Constant">0</span><span class="Delimiter">);</span>
|
||||
<span id="L148" class="LineNr">148 </span> <a href='010core.cc.html#L31'>OF</a> = <span class="Constant">false</span><span class="Delimiter">;</span>
|
||||
|
|
|
|||
|
|
@ -67,214 +67,195 @@ if ('onhashchange' in window) {
|
|||
<span id="L3" class="LineNr"> 3 </span><span class="Delimiter">:(scenario add_r32_to_mem_at_r32)</span>
|
||||
<span id="L4" class="LineNr"> 4 </span><span class="Special">% Reg[3].i = 0x10;</span>
|
||||
<span id="L5" class="LineNr"> 5 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L6" class="LineNr"> 6 </span><span class="Comment"># word in addresses 0x60-0x63 has value 1</span>
|
||||
<span id="L7" class="LineNr"> 7 </span><span class="Special">% Mem.at(0x60) = 1;</span>
|
||||
<span id="L8" class="LineNr"> 8 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L9" class="LineNr"> 9 </span> <span class="PreProc">0</span><span class="Constant">1</span> <span class="Constant">18</span> <span class="Comment"># add EBX (reg 3) to *EAX (reg 0)</span>
|
||||
<span id="L10" class="LineNr"> 10 </span><span class="traceContains">+run: add <a href='010core.cc.html#L15'>reg</a> 3 to effective address</span>
|
||||
<span id="L11" class="LineNr"> 11 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L12" class="LineNr"> 12 </span><span class="traceContains">+run: storing 0x00000011</span>
|
||||
<span id="L13" class="LineNr"> 13 </span>
|
||||
<span id="L14" class="LineNr"> 14 </span><span class="Delimiter">:(before "End Mod Special-cases")</span>
|
||||
<span id="L15" class="LineNr"> 15 </span><span class="Normal">case</span> <span class="Constant">0</span>:
|
||||
<span id="L16" class="LineNr"> 16 </span> <span class="Comment">// mod 0 is usually indirect addressing</span>
|
||||
<span id="L17" class="LineNr"> 17 </span> <span class="Normal">switch</span> <span class="Delimiter">(</span>rm<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L18" class="LineNr"> 18 </span> <span class="Normal">default</span>:
|
||||
<span id="L19" class="LineNr"> 19 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is mem at address 0x"</span> << std::hex << Reg[rm]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a> << <span class="Constant">" (reg "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>rm<span class="Delimiter">)</span> << <span class="Constant">")"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L20" class="LineNr"> 20 </span> <span class="Conceal">¦</span> assert<span class="Delimiter">(</span>Reg[rm]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a> + <span class="Normal">sizeof</span><span class="Delimiter">(</span><span class="Normal">int32_t</span><span class="Delimiter">)</span> <= <a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>size<span class="Delimiter">());</span>
|
||||
<span id="L21" class="LineNr"> 21 </span> <span class="Conceal">¦</span> result = <span class="Normal">reinterpret_cast</span><<span class="Normal">int32_t</span>*><span class="Delimiter">(</span>&Mem<span class="Delimiter">.</span>at<span class="Delimiter">(</span>Reg[rm]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">));</span> <span class="Comment">// rely on the host itself being in little-endian order</span>
|
||||
<span id="L22" class="LineNr"> 22 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L23" class="LineNr"> 23 </span> <span class="Comment">// End Mod 0 Special-cases</span>
|
||||
<span id="L24" class="LineNr"> 24 </span> <span class="Delimiter">}</span>
|
||||
<span id="L25" class="LineNr"> 25 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L26" class="LineNr"> 26 </span>
|
||||
<span id="L27" class="LineNr"> 27 </span><span class="Comment">//:</span>
|
||||
<span id="L28" class="LineNr"> 28 </span>
|
||||
<span id="L29" class="LineNr"> 29 </span><span class="Delimiter">:(scenario add_mem_at_r32_to_r32)</span>
|
||||
<span id="L30" class="LineNr"> 30 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L31" class="LineNr"> 31 </span><span class="Special">% Reg[3].i = 0x10;</span>
|
||||
<span id="L32" class="LineNr"> 32 </span><span class="Special">% Mem.at(0x60) = 1;</span>
|
||||
<span id="L33" class="LineNr"> 33 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L34" class="LineNr"> 34 </span> <span class="PreProc">0</span><span class="Constant">3</span> <span class="Constant">18</span> <span class="Comment"># add *EAX (reg 0) to EBX (reg 3)</span>
|
||||
<span id="L35" class="LineNr"> 35 </span><span class="traceContains">+run: add effective address to <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L36" class="LineNr"> 36 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L37" class="LineNr"> 37 </span><span class="traceContains">+run: storing 0x00000011</span>
|
||||
<span id="L38" class="LineNr"> 38 </span>
|
||||
<span id="L39" class="LineNr"> 39 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L40" class="LineNr"> 40 </span><span class="Normal">case</span> <span class="Constant">0x03</span>: <span class="Delimiter">{</span> <span class="Comment">// add r/m32 to r32</span>
|
||||
<span id="L41" class="LineNr"> 41 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L42" class="LineNr"> 42 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L43" class="LineNr"> 43 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"add effective address to <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L44" class="LineNr"> 44 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L45" class="LineNr"> 45 </span> <a href='010core.cc.html#L41'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>+<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L46" class="LineNr"> 46 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L47" class="LineNr"> 47 </span><span class="Delimiter">}</span>
|
||||
<span id="L48" class="LineNr"> 48 </span>
|
||||
<span id="L49" class="LineNr"> 49 </span><span class="SalientComment">//:: subtract</span>
|
||||
<span id="L50" class="LineNr"> 50 </span>
|
||||
<span id="L51" class="LineNr"> 51 </span><span class="Delimiter">:(scenario subtract_r32_from_mem_at_r32)</span>
|
||||
<span id="L52" class="LineNr"> 52 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L53" class="LineNr"> 53 </span><span class="Special">% Mem.at(0x60) = 10;</span>
|
||||
<span id="L54" class="LineNr"> 54 </span><span class="Special">% Reg[3].i = 1;</span>
|
||||
<span id="L55" class="LineNr"> 55 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L56" class="LineNr"> 56 </span> <span class="Constant">29</span> <span class="Constant">18</span> <span class="Comment"># subtract EBX (reg 3) from *EAX (reg 0)</span>
|
||||
<span id="L57" class="LineNr"> 57 </span><span class="traceContains">+run: subtract <a href='010core.cc.html#L15'>reg</a> 3 from effective address</span>
|
||||
<span id="L58" class="LineNr"> 58 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L59" class="LineNr"> 59 </span><span class="traceContains">+run: storing 0x00000009</span>
|
||||
<span id="L60" class="LineNr"> 60 </span>
|
||||
<span id="L61" class="LineNr"> 61 </span><span class="Comment">//:</span>
|
||||
<span id="L62" class="LineNr"> 62 </span>
|
||||
<span id="L63" class="LineNr"> 63 </span><span class="Delimiter">:(scenario subtract_mem_at_r32_from_r32)</span>
|
||||
<span id="L64" class="LineNr"> 64 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L65" class="LineNr"> 65 </span><span class="Special">% Mem.at(0x60) = 1;</span>
|
||||
<span id="L66" class="LineNr"> 66 </span><span class="Special">% Reg[3].i = 10;</span>
|
||||
<span id="L67" class="LineNr"> 67 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L68" class="LineNr"> 68 </span> 2b <span class="Constant">18</span> <span class="Comment"># subtract *EAX (reg 0) from EBX (reg 3)</span>
|
||||
<span id="L69" class="LineNr"> 69 </span><span class="traceContains">+run: subtract effective address from <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L70" class="LineNr"> 70 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L71" class="LineNr"> 71 </span><span class="traceContains">+run: storing 0x00000009</span>
|
||||
<span id="L72" class="LineNr"> 72 </span>
|
||||
<span id="L73" class="LineNr"> 73 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L74" class="LineNr"> 74 </span><span class="Normal">case</span> <span class="Constant">0x2b</span>: <span class="Delimiter">{</span> <span class="Comment">// subtract r/m32 from r32</span>
|
||||
<span id="L75" class="LineNr"> 75 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L76" class="LineNr"> 76 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L77" class="LineNr"> 77 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subtract effective address from <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L78" class="LineNr"> 78 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L79" class="LineNr"> 79 </span> <a href='010core.cc.html#L41'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>-<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L80" class="LineNr"> 80 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L81" class="LineNr"> 81 </span><span class="Delimiter">}</span>
|
||||
<span id="L82" class="LineNr"> 82 </span>
|
||||
<span id="L83" class="LineNr"> 83 </span><span class="SalientComment">//:: and</span>
|
||||
<span id="L84" class="LineNr"> 84 </span>
|
||||
<span id="L85" class="LineNr"> 85 </span><span class="Delimiter">:(scenario and_r32_with_mem_at_r32)</span>
|
||||
<span id="L86" class="LineNr"> 86 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L87" class="LineNr"> 87 </span><span class="Special">% Mem.at(0x60) = 0x0d;</span>
|
||||
<span id="L88" class="LineNr"> 88 </span><span class="Special">% Mem.at(0x61) = 0x0c;</span>
|
||||
<span id="L89" class="LineNr"> 89 </span><span class="Special">% Mem.at(0x62) = 0x0b;</span>
|
||||
<span id="L90" class="LineNr"> 90 </span><span class="Special">% Mem.at(0x63) = 0x0a;</span>
|
||||
<span id="L91" class="LineNr"> 91 </span><span class="Special">% Reg[3].i = 0xff;</span>
|
||||
<span id="L92" class="LineNr"> 92 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L93" class="LineNr"> 93 </span> <span class="Constant">21</span> <span class="Constant">18</span> <span class="Comment"># and EBX (reg 3) with *EAX (reg 0)</span>
|
||||
<span id="L94" class="LineNr"> 94 </span><span class="traceContains">+run: and <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span>
|
||||
<span id="L95" class="LineNr"> 95 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L96" class="LineNr"> 96 </span><span class="traceContains">+run: storing 0x0000000d</span>
|
||||
<span id="L97" class="LineNr"> 97 </span>
|
||||
<span id="L98" class="LineNr"> 98 </span><span class="Comment">//:</span>
|
||||
<span id="L99" class="LineNr"> 99 </span>
|
||||
<span id="L100" class="LineNr">100 </span><span class="Delimiter">:(scenario and_mem_at_r32_with_r32)</span>
|
||||
<span id="L101" class="LineNr">101 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L102" class="LineNr">102 </span><span class="Special">% Mem.at(0x60) = 0xff;</span>
|
||||
<span id="L103" class="LineNr">103 </span><span class="Special">% Reg[3].i = 0x0a0b0c0d;</span>
|
||||
<span id="L104" class="LineNr">104 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L105" class="LineNr">105 </span> <span class="Constant">23</span> <span class="Constant">18</span> <span class="Comment"># and *EAX (reg 0) with EBX (reg 3)</span>
|
||||
<span id="L106" class="LineNr">106 </span><span class="traceContains">+run: and effective address with <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L107" class="LineNr">107 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L108" class="LineNr">108 </span><span class="traceContains">+run: storing 0x0000000d</span>
|
||||
<span id="L109" class="LineNr">109 </span>
|
||||
<span id="L110" class="LineNr">110 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L111" class="LineNr">111 </span><span class="Normal">case</span> <span class="Constant">0x23</span>: <span class="Delimiter">{</span> <span class="Comment">// and r/m32 with r32</span>
|
||||
<span id="L112" class="LineNr">112 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L113" class="LineNr">113 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L114" class="LineNr">114 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"and effective address with <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L115" class="LineNr">115 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L116" class="LineNr">116 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>&<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L117" class="LineNr">117 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L118" class="LineNr">118 </span><span class="Delimiter">}</span>
|
||||
<span id="L119" class="LineNr">119 </span>
|
||||
<span id="L120" class="LineNr">120 </span><span class="SalientComment">//:: or</span>
|
||||
<span id="L121" class="LineNr">121 </span>
|
||||
<span id="L122" class="LineNr">122 </span><span class="Delimiter">:(scenario or_r32_with_mem_at_r32)</span>
|
||||
<span id="L123" class="LineNr">123 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L124" class="LineNr">124 </span><span class="Special">% Mem.at(0x60) = 0x0d;</span>
|
||||
<span id="L125" class="LineNr">125 </span><span class="Special">% Mem.at(0x61) = 0x0c;</span>
|
||||
<span id="L126" class="LineNr">126 </span><span class="Special">% Mem.at(0x62) = 0x0b;</span>
|
||||
<span id="L127" class="LineNr">127 </span><span class="Special">% Mem.at(0x63) = 0x0a;</span>
|
||||
<span id="L128" class="LineNr">128 </span><span class="Special">% Reg[3].i = 0xa0b0c0d0;</span>
|
||||
<span id="L129" class="LineNr">129 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L130" class="LineNr">130 </span> <span class="Error">09</span> <span class="Constant">18</span> <span class="Comment"># or EBX (reg 3) with *EAX (reg 0)</span>
|
||||
<span id="L131" class="LineNr">131 </span><span class="traceContains">+run: or <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span>
|
||||
<span id="L132" class="LineNr">132 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L133" class="LineNr">133 </span><span class="traceContains">+run: storing 0xaabbccdd</span>
|
||||
<span id="L134" class="LineNr">134 </span>
|
||||
<span id="L135" class="LineNr">135 </span><span class="Comment">//:</span>
|
||||
<span id="L136" class="LineNr">136 </span>
|
||||
<span id="L137" class="LineNr">137 </span><span class="Delimiter">:(scenario or_mem_at_r32_with_r32)</span>
|
||||
<span id="L138" class="LineNr">138 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L139" class="LineNr">139 </span><span class="Special">% Mem.at(0x60) = 0x0d;</span>
|
||||
<span id="L140" class="LineNr">140 </span><span class="Special">% Mem.at(0x61) = 0x0c;</span>
|
||||
<span id="L141" class="LineNr">141 </span><span class="Special">% Mem.at(0x62) = 0x0b;</span>
|
||||
<span id="L142" class="LineNr">142 </span><span class="Special">% Mem.at(0x63) = 0x0a;</span>
|
||||
<span id="L143" class="LineNr">143 </span><span class="Special">% Reg[3].i = 0xa0b0c0d0;</span>
|
||||
<span id="L144" class="LineNr">144 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L145" class="LineNr">145 </span> 0b <span class="Constant">18</span> <span class="Comment"># or *EAX (reg 0) with EBX (reg 3)</span>
|
||||
<span id="L146" class="LineNr">146 </span><span class="traceContains">+run: or effective address with <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L147" class="LineNr">147 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L148" class="LineNr">148 </span><span class="traceContains">+run: storing 0xaabbccdd</span>
|
||||
<span id="L6" class="LineNr"> 6 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 1);</span>
|
||||
<span id="L7" class="LineNr"> 7 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L8" class="LineNr"> 8 </span> <span class="PreProc">0</span><span class="Constant">1</span> <span class="Constant">18</span> <span class="Comment"># add EBX (reg 3) to *EAX (reg 0)</span>
|
||||
<span id="L9" class="LineNr"> 9 </span><span class="traceContains">+run: add <a href='010core.cc.html#L15'>reg</a> 3 to effective address</span>
|
||||
<span id="L10" class="LineNr"> 10 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L11" class="LineNr"> 11 </span><span class="traceContains">+run: storing 0x00000011</span>
|
||||
<span id="L12" class="LineNr"> 12 </span>
|
||||
<span id="L13" class="LineNr"> 13 </span><span class="Delimiter">:(before "End Mod Special-cases")</span>
|
||||
<span id="L14" class="LineNr"> 14 </span><span class="Normal">case</span> <span class="Constant">0</span>:
|
||||
<span id="L15" class="LineNr"> 15 </span> <span class="Comment">// mod 0 is usually indirect addressing</span>
|
||||
<span id="L16" class="LineNr"> 16 </span> <span class="Normal">switch</span> <span class="Delimiter">(</span>rm<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
<span id="L17" class="LineNr"> 17 </span> <span class="Normal">default</span>:
|
||||
<span id="L18" class="LineNr"> 18 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is mem at address 0x"</span> << std::hex << Reg[rm]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a> << <span class="Constant">" (reg "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>rm<span class="Delimiter">)</span> << <span class="Constant">")"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L19" class="LineNr"> 19 </span> <span class="Conceal">¦</span> assert<span class="Delimiter">(</span>Reg[rm]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a> + <span class="Normal">sizeof</span><span class="Delimiter">(</span><span class="Normal">int32_t</span><span class="Delimiter">)</span> <= <a href='010core.cc.html#L65'>Mem</a><span class="Delimiter">.</span>size<span class="Delimiter">());</span>
|
||||
<span id="L20" class="LineNr"> 20 </span> <span class="Conceal">¦</span> result = <span class="Normal">reinterpret_cast</span><<span class="Normal">int32_t</span>*><span class="Delimiter">(</span>&Mem<span class="Delimiter">.</span>at<span class="Delimiter">(</span>Reg[rm]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">));</span> <span class="Comment">// rely on the host itself being in little-endian order</span>
|
||||
<span id="L21" class="LineNr"> 21 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L22" class="LineNr"> 22 </span> <span class="Comment">// End Mod 0 Special-cases</span>
|
||||
<span id="L23" class="LineNr"> 23 </span> <span class="Delimiter">}</span>
|
||||
<span id="L24" class="LineNr"> 24 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L25" class="LineNr"> 25 </span>
|
||||
<span id="L26" class="LineNr"> 26 </span><span class="Comment">//:</span>
|
||||
<span id="L27" class="LineNr"> 27 </span>
|
||||
<span id="L28" class="LineNr"> 28 </span><span class="Delimiter">:(scenario add_mem_at_r32_to_r32)</span>
|
||||
<span id="L29" class="LineNr"> 29 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L30" class="LineNr"> 30 </span><span class="Special">% Reg[3].i = 0x10;</span>
|
||||
<span id="L31" class="LineNr"> 31 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 1);</span>
|
||||
<span id="L32" class="LineNr"> 32 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L33" class="LineNr"> 33 </span> <span class="PreProc">0</span><span class="Constant">3</span> <span class="Constant">18</span> <span class="Comment"># add *EAX (reg 0) to EBX (reg 3)</span>
|
||||
<span id="L34" class="LineNr"> 34 </span><span class="traceContains">+run: add effective address to <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L35" class="LineNr"> 35 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L36" class="LineNr"> 36 </span><span class="traceContains">+run: storing 0x00000011</span>
|
||||
<span id="L37" class="LineNr"> 37 </span>
|
||||
<span id="L38" class="LineNr"> 38 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L39" class="LineNr"> 39 </span><span class="Normal">case</span> <span class="Constant">0x03</span>: <span class="Delimiter">{</span> <span class="Comment">// add r/m32 to r32</span>
|
||||
<span id="L40" class="LineNr"> 40 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L41" class="LineNr"> 41 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L42" class="LineNr"> 42 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"add effective address to <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L43" class="LineNr"> 43 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L44" class="LineNr"> 44 </span> <a href='010core.cc.html#L41'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>+<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L45" class="LineNr"> 45 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L46" class="LineNr"> 46 </span><span class="Delimiter">}</span>
|
||||
<span id="L47" class="LineNr"> 47 </span>
|
||||
<span id="L48" class="LineNr"> 48 </span><span class="SalientComment">//:: subtract</span>
|
||||
<span id="L49" class="LineNr"> 49 </span>
|
||||
<span id="L50" class="LineNr"> 50 </span><span class="Delimiter">:(scenario subtract_r32_from_mem_at_r32)</span>
|
||||
<span id="L51" class="LineNr"> 51 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L52" class="LineNr"> 52 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 10);</span>
|
||||
<span id="L53" class="LineNr"> 53 </span><span class="Special">% Reg[3].i = 1;</span>
|
||||
<span id="L54" class="LineNr"> 54 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L55" class="LineNr"> 55 </span> <span class="Constant">29</span> <span class="Constant">18</span> <span class="Comment"># subtract EBX (reg 3) from *EAX (reg 0)</span>
|
||||
<span id="L56" class="LineNr"> 56 </span><span class="traceContains">+run: subtract <a href='010core.cc.html#L15'>reg</a> 3 from effective address</span>
|
||||
<span id="L57" class="LineNr"> 57 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L58" class="LineNr"> 58 </span><span class="traceContains">+run: storing 0x00000009</span>
|
||||
<span id="L59" class="LineNr"> 59 </span>
|
||||
<span id="L60" class="LineNr"> 60 </span><span class="Comment">//:</span>
|
||||
<span id="L61" class="LineNr"> 61 </span>
|
||||
<span id="L62" class="LineNr"> 62 </span><span class="Delimiter">:(scenario subtract_mem_at_r32_from_r32)</span>
|
||||
<span id="L63" class="LineNr"> 63 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L64" class="LineNr"> 64 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 1);</span>
|
||||
<span id="L65" class="LineNr"> 65 </span><span class="Special">% Reg[3].i = 10;</span>
|
||||
<span id="L66" class="LineNr"> 66 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L67" class="LineNr"> 67 </span> 2b <span class="Constant">18</span> <span class="Comment"># subtract *EAX (reg 0) from EBX (reg 3)</span>
|
||||
<span id="L68" class="LineNr"> 68 </span><span class="traceContains">+run: subtract effective address from <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L69" class="LineNr"> 69 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L70" class="LineNr"> 70 </span><span class="traceContains">+run: storing 0x00000009</span>
|
||||
<span id="L71" class="LineNr"> 71 </span>
|
||||
<span id="L72" class="LineNr"> 72 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L73" class="LineNr"> 73 </span><span class="Normal">case</span> <span class="Constant">0x2b</span>: <span class="Delimiter">{</span> <span class="Comment">// subtract r/m32 from r32</span>
|
||||
<span id="L74" class="LineNr"> 74 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L75" class="LineNr"> 75 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L76" class="LineNr"> 76 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subtract effective address from <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L77" class="LineNr"> 77 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L78" class="LineNr"> 78 </span> <a href='010core.cc.html#L41'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>-<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L79" class="LineNr"> 79 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L80" class="LineNr"> 80 </span><span class="Delimiter">}</span>
|
||||
<span id="L81" class="LineNr"> 81 </span>
|
||||
<span id="L82" class="LineNr"> 82 </span><span class="SalientComment">//:: and</span>
|
||||
<span id="L83" class="LineNr"> 83 </span>
|
||||
<span id="L84" class="LineNr"> 84 </span><span class="Delimiter">:(scenario and_r32_with_mem_at_r32)</span>
|
||||
<span id="L85" class="LineNr"> 85 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L86" class="LineNr"> 86 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);</span>
|
||||
<span id="L87" class="LineNr"> 87 </span><span class="Special">% Reg[3].i = 0xff;</span>
|
||||
<span id="L88" class="LineNr"> 88 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L89" class="LineNr"> 89 </span> <span class="Constant">21</span> <span class="Constant">18</span> <span class="Comment"># and EBX (reg 3) with *EAX (reg 0)</span>
|
||||
<span id="L90" class="LineNr"> 90 </span><span class="traceContains">+run: and <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span>
|
||||
<span id="L91" class="LineNr"> 91 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L92" class="LineNr"> 92 </span><span class="traceContains">+run: storing 0x0000000d</span>
|
||||
<span id="L93" class="LineNr"> 93 </span>
|
||||
<span id="L94" class="LineNr"> 94 </span><span class="Comment">//:</span>
|
||||
<span id="L95" class="LineNr"> 95 </span>
|
||||
<span id="L96" class="LineNr"> 96 </span><span class="Delimiter">:(scenario and_mem_at_r32_with_r32)</span>
|
||||
<span id="L97" class="LineNr"> 97 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L98" class="LineNr"> 98 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x000000ff);</span>
|
||||
<span id="L99" class="LineNr"> 99 </span><span class="Special">% Reg[3].i = 0x0a0b0c0d;</span>
|
||||
<span id="L100" class="LineNr">100 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L101" class="LineNr">101 </span> <span class="Constant">23</span> <span class="Constant">18</span> <span class="Comment"># and *EAX (reg 0) with EBX (reg 3)</span>
|
||||
<span id="L102" class="LineNr">102 </span><span class="traceContains">+run: and effective address with <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L103" class="LineNr">103 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L104" class="LineNr">104 </span><span class="traceContains">+run: storing 0x0000000d</span>
|
||||
<span id="L105" class="LineNr">105 </span>
|
||||
<span id="L106" class="LineNr">106 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L107" class="LineNr">107 </span><span class="Normal">case</span> <span class="Constant">0x23</span>: <span class="Delimiter">{</span> <span class="Comment">// and r/m32 with r32</span>
|
||||
<span id="L108" class="LineNr">108 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L109" class="LineNr">109 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L110" class="LineNr">110 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"and effective address with <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L111" class="LineNr">111 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L112" class="LineNr">112 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>&<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L113" class="LineNr">113 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L114" class="LineNr">114 </span><span class="Delimiter">}</span>
|
||||
<span id="L115" class="LineNr">115 </span>
|
||||
<span id="L116" class="LineNr">116 </span><span class="SalientComment">//:: or</span>
|
||||
<span id="L117" class="LineNr">117 </span>
|
||||
<span id="L118" class="LineNr">118 </span><span class="Delimiter">:(scenario or_r32_with_mem_at_r32)</span>
|
||||
<span id="L119" class="LineNr">119 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L120" class="LineNr">120 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);</span>
|
||||
<span id="L121" class="LineNr">121 </span><span class="Special">% Reg[3].i = 0xa0b0c0d0;</span>
|
||||
<span id="L122" class="LineNr">122 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L123" class="LineNr">123 </span> <span class="Error">09</span> <span class="Constant">18</span> <span class="Comment"># or EBX (reg 3) with *EAX (reg 0)</span>
|
||||
<span id="L124" class="LineNr">124 </span><span class="traceContains">+run: or <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span>
|
||||
<span id="L125" class="LineNr">125 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L126" class="LineNr">126 </span><span class="traceContains">+run: storing 0xaabbccdd</span>
|
||||
<span id="L127" class="LineNr">127 </span>
|
||||
<span id="L128" class="LineNr">128 </span><span class="Comment">//:</span>
|
||||
<span id="L129" class="LineNr">129 </span>
|
||||
<span id="L130" class="LineNr">130 </span><span class="Delimiter">:(scenario or_mem_at_r32_with_r32)</span>
|
||||
<span id="L131" class="LineNr">131 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L132" class="LineNr">132 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);</span>
|
||||
<span id="L133" class="LineNr">133 </span><span class="Special">% Reg[3].i = 0xa0b0c0d0;</span>
|
||||
<span id="L134" class="LineNr">134 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L135" class="LineNr">135 </span> 0b <span class="Constant">18</span> <span class="Comment"># or *EAX (reg 0) with EBX (reg 3)</span>
|
||||
<span id="L136" class="LineNr">136 </span><span class="traceContains">+run: or effective address with <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L137" class="LineNr">137 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L138" class="LineNr">138 </span><span class="traceContains">+run: storing 0xaabbccdd</span>
|
||||
<span id="L139" class="LineNr">139 </span>
|
||||
<span id="L140" class="LineNr">140 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L141" class="LineNr">141 </span><span class="Normal">case</span> <span class="Constant">0x0b</span>: <span class="Delimiter">{</span> <span class="Comment">// or r/m32 with r32</span>
|
||||
<span id="L142" class="LineNr">142 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L143" class="LineNr">143 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L144" class="LineNr">144 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"or effective address with <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L145" class="LineNr">145 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L146" class="LineNr">146 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L147" class="LineNr">147 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L148" class="LineNr">148 </span><span class="Delimiter">}</span>
|
||||
<span id="L149" class="LineNr">149 </span>
|
||||
<span id="L150" class="LineNr">150 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L151" class="LineNr">151 </span><span class="Normal">case</span> <span class="Constant">0x0b</span>: <span class="Delimiter">{</span> <span class="Comment">// or r/m32 with r32</span>
|
||||
<span id="L152" class="LineNr">152 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L153" class="LineNr">153 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L154" class="LineNr">154 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"or effective address with <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L155" class="LineNr">155 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L156" class="LineNr">156 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L157" class="LineNr">157 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L158" class="LineNr">158 </span><span class="Delimiter">}</span>
|
||||
<span id="L159" class="LineNr">159 </span>
|
||||
<span id="L160" class="LineNr">160 </span><span class="SalientComment">//:: xor</span>
|
||||
<span id="L150" class="LineNr">150 </span><span class="SalientComment">//:: xor</span>
|
||||
<span id="L151" class="LineNr">151 </span>
|
||||
<span id="L152" class="LineNr">152 </span><span class="Delimiter">:(scenario xor_r32_with_mem_at_r32)</span>
|
||||
<span id="L153" class="LineNr">153 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L154" class="LineNr">154 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0xaabb0c0d);</span>
|
||||
<span id="L155" class="LineNr">155 </span><span class="Special">% Reg[3].i = 0xa0b0c0d0;</span>
|
||||
<span id="L156" class="LineNr">156 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L157" class="LineNr">157 </span> <span class="Constant">31</span> <span class="Constant">18</span> <span class="Comment"># xor EBX (reg 3) with *EAX (reg 0)</span>
|
||||
<span id="L158" class="LineNr">158 </span><span class="traceContains">+run: xor <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span>
|
||||
<span id="L159" class="LineNr">159 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L160" class="LineNr">160 </span><span class="traceContains">+run: storing 0x0a0bccdd</span>
|
||||
<span id="L161" class="LineNr">161 </span>
|
||||
<span id="L162" class="LineNr">162 </span><span class="Delimiter">:(scenario xor_r32_with_mem_at_r32)</span>
|
||||
<span id="L163" class="LineNr">163 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L164" class="LineNr">164 </span><span class="Special">% Mem.at(0x60) = 0x0d;</span>
|
||||
<span id="L165" class="LineNr">165 </span><span class="Special">% Mem.at(0x61) = 0x0c;</span>
|
||||
<span id="L166" class="LineNr">166 </span><span class="Special">% Mem.at(0x62) = 0xbb;</span>
|
||||
<span id="L167" class="LineNr">167 </span><span class="Special">% Mem.at(0x63) = 0xaa;</span>
|
||||
<span id="L168" class="LineNr">168 </span><span class="Special">% Reg[3].i = 0xa0b0c0d0;</span>
|
||||
<span id="L169" class="LineNr">169 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L170" class="LineNr">170 </span> <span class="Constant">31</span> <span class="Constant">18</span> <span class="Comment"># xor EBX (reg 3) with *EAX (reg 0)</span>
|
||||
<span id="L171" class="LineNr">171 </span><span class="traceContains">+run: xor <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span>
|
||||
<span id="L172" class="LineNr">172 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L173" class="LineNr">173 </span><span class="traceContains">+run: storing 0x0a0bccdd</span>
|
||||
<span id="L174" class="LineNr">174 </span>
|
||||
<span id="L175" class="LineNr">175 </span><span class="Comment">//:</span>
|
||||
<span id="L176" class="LineNr">176 </span>
|
||||
<span id="L177" class="LineNr">177 </span><span class="Delimiter">:(scenario xor_mem_at_r32_with_r32)</span>
|
||||
<span id="L178" class="LineNr">178 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L179" class="LineNr">179 </span><span class="Special">% Mem.at(0x60) = 0x0d;</span>
|
||||
<span id="L180" class="LineNr">180 </span><span class="Special">% Mem.at(0x61) = 0x0c;</span>
|
||||
<span id="L181" class="LineNr">181 </span><span class="Special">% Mem.at(0x62) = 0x0b;</span>
|
||||
<span id="L182" class="LineNr">182 </span><span class="Special">% Mem.at(0x63) = 0x0a;</span>
|
||||
<span id="L183" class="LineNr">183 </span><span class="Special">% Reg[3].i = 0xa0b0c0d0;</span>
|
||||
<span id="L184" class="LineNr">184 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L185" class="LineNr">185 </span> <span class="Constant">33</span> <span class="Constant">18</span> <span class="Comment"># xor *EAX (reg 0) with EBX (reg 3)</span>
|
||||
<span id="L186" class="LineNr">186 </span><span class="traceContains">+run: xor effective address with <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L187" class="LineNr">187 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L188" class="LineNr">188 </span><span class="traceContains">+run: storing 0xaabbccdd</span>
|
||||
<span id="L189" class="LineNr">189 </span>
|
||||
<span id="L190" class="LineNr">190 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L191" class="LineNr">191 </span><span class="Normal">case</span> <span class="Constant">0x33</span>: <span class="Delimiter">{</span> <span class="Comment">// xor r/m32 with r32</span>
|
||||
<span id="L192" class="LineNr">192 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L193" class="LineNr">193 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L194" class="LineNr">194 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"xor effective address with <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L195" class="LineNr">195 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L196" class="LineNr">196 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L197" class="LineNr">197 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L198" class="LineNr">198 </span><span class="Delimiter">}</span>
|
||||
<span id="L199" class="LineNr">199 </span>
|
||||
<span id="L200" class="LineNr">200 </span><span class="SalientComment">//:: not</span>
|
||||
<span id="L201" class="LineNr">201 </span>
|
||||
<span id="L202" class="LineNr">202 </span><span class="Delimiter">:(scenario not_r32_with_mem_at_r32)</span>
|
||||
<span id="L203" class="LineNr">203 </span><span class="Special">% Reg[3].i = 0x60;</span>
|
||||
<span id="L204" class="LineNr">204 </span><span class="Comment"># word at 0x60 is 0x0f0f00ff</span>
|
||||
<span id="L205" class="LineNr">205 </span><span class="Special">% Mem.at(0x60) = 0xff;</span>
|
||||
<span id="L206" class="LineNr">206 </span><span class="Special">% Mem.at(0x61) = 0x00;</span>
|
||||
<span id="L207" class="LineNr">207 </span><span class="Special">% Mem.at(0x62) = 0x0f;</span>
|
||||
<span id="L208" class="LineNr">208 </span><span class="Special">% Mem.at(0x63) = 0x0f;</span>
|
||||
<span id="L209" class="LineNr">209 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L210" class="LineNr">210 </span> f7 <span class="PreProc">0</span><span class="Constant">3</span> <span class="Comment"># negate *EBX (reg 3)</span>
|
||||
<span id="L211" class="LineNr">211 </span><span class="traceContains">+run: 'not' of effective address</span>
|
||||
<span id="L212" class="LineNr">212 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
|
||||
<span id="L213" class="LineNr">213 </span><span class="traceContains">+run: storing 0xf0f0ff00</span>
|
||||
<span id="L162" class="LineNr">162 </span><span class="Comment">//:</span>
|
||||
<span id="L163" class="LineNr">163 </span>
|
||||
<span id="L164" class="LineNr">164 </span><span class="Delimiter">:(scenario xor_mem_at_r32_with_r32)</span>
|
||||
<span id="L165" class="LineNr">165 </span><span class="Special">% Reg[0].i = 0x60;</span>
|
||||
<span id="L166" class="LineNr">166 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);</span>
|
||||
<span id="L167" class="LineNr">167 </span><span class="Special">% Reg[3].i = 0xa0b0c0d0;</span>
|
||||
<span id="L168" class="LineNr">168 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L169" class="LineNr">169 </span> <span class="Constant">33</span> <span class="Constant">18</span> <span class="Comment"># xor *EAX (reg 0) with EBX (reg 3)</span>
|
||||
<span id="L170" class="LineNr">170 </span><span class="traceContains">+run: xor effective address with <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L171" class="LineNr">171 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
|
||||
<span id="L172" class="LineNr">172 </span><span class="traceContains">+run: storing 0xaabbccdd</span>
|
||||
<span id="L173" class="LineNr">173 </span>
|
||||
<span id="L174" class="LineNr">174 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L175" class="LineNr">175 </span><span class="Normal">case</span> <span class="Constant">0x33</span>: <span class="Delimiter">{</span> <span class="Comment">// xor r/m32 with r32</span>
|
||||
<span id="L176" class="LineNr">176 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L177" class="LineNr">177 </span> <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
|
||||
<span id="L178" class="LineNr">178 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"xor effective address with <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L179" class="LineNr">179 </span> <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L180" class="LineNr">180 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
|
||||
<span id="L181" class="LineNr">181 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L182" class="LineNr">182 </span><span class="Delimiter">}</span>
|
||||
<span id="L183" class="LineNr">183 </span>
|
||||
<span id="L184" class="LineNr">184 </span><span class="SalientComment">//:: not</span>
|
||||
<span id="L185" class="LineNr">185 </span>
|
||||
<span id="L186" class="LineNr">186 </span><span class="Delimiter">:(scenario not_r32_with_mem_at_r32)</span>
|
||||
<span id="L187" class="LineNr">187 </span><span class="Special">% Reg[3].i = 0x60;</span>
|
||||
<span id="L188" class="LineNr">188 </span><span class="Comment"># word at 0x60 is 0x0f0f00ff</span>
|
||||
<span id="L189" class="LineNr">189 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0f0f00ff);</span>
|
||||
<span id="L190" class="LineNr">190 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L191" class="LineNr">191 </span> f7 <span class="PreProc">0</span><span class="Constant">3</span> <span class="Comment"># negate *EBX (reg 3)</span>
|
||||
<span id="L192" class="LineNr">192 </span><span class="traceContains">+run: 'not' of effective address</span>
|
||||
<span id="L193" class="LineNr">193 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
|
||||
<span id="L194" class="LineNr">194 </span><span class="traceContains">+run: storing 0xf0f0ff00</span>
|
||||
</pre>
|
||||
</body>
|
||||
</html>
|
||||
|
|
|
|||
|
|
@ -68,16 +68,16 @@ if ('onhashchange' in window) {
|
|||
<span id="L4" class="LineNr"> 4 </span><span class="Special">% Reg[3].i = 1;</span>
|
||||
<span id="L5" class="LineNr"> 5 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L6" class="LineNr"> 6 </span> <span class="Constant">81</span> c3 0a 0b 0c 0d <span class="Comment"># add 0x0d0c0b0a to EBX (reg 3)</span>
|
||||
<span id="L7" class="LineNr"> 7 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L7" class="LineNr"> 7 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L8" class="LineNr"> 8 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L9" class="LineNr"> 9 </span><span class="traceContains">+run: subop add</span>
|
||||
<span id="L10" class="LineNr"> 10 </span><span class="traceContains">+run: storing 0x0d0c0b0b</span>
|
||||
<span id="L11" class="LineNr"> 11 </span>
|
||||
<span id="L12" class="LineNr"> 12 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L13" class="LineNr"> 13 </span><span class="Normal">case</span> <span class="Constant">0x81</span>: <span class="Delimiter">{</span> <span class="Comment">// combine imm32 with r/m32</span>
|
||||
<span id="L14" class="LineNr"> 14 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L206'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L15" class="LineNr"> 15 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L211'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L16" class="LineNr"> 16 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"combine <a href='010core.cc.html#L211'>imm32</a> 0x"</span> << <a href='010core.cc.html#L222'>HEXWORD</a> << arg2 << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L14" class="LineNr"> 14 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
|
||||
<span id="L15" class="LineNr"> 15 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L215'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L16" class="LineNr"> 16 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"combine <a href='010core.cc.html#L215'>imm32</a> 0x"</span> << <a href='010core.cc.html#L226'>HEXWORD</a> << arg2 << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L17" class="LineNr"> 17 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
|
||||
<span id="L18" class="LineNr"> 18 </span> <span class="Normal">uint8_t</span> subop = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span> <span class="Comment">// middle 3 'reg opcode' bits</span>
|
||||
<span id="L19" class="LineNr"> 19 </span> <span class="Normal">switch</span> <span class="Delimiter">(</span>subop<span class="Delimiter">)</span> <span class="Delimiter">{</span>
|
||||
|
|
@ -87,7 +87,7 @@ if ('onhashchange' in window) {
|
|||
<span id="L23" class="LineNr"> 23 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L24" class="LineNr"> 24 </span> <span class="Comment">// End Op 81 Subops</span>
|
||||
<span id="L25" class="LineNr"> 25 </span> <span class="Normal">default</span>:
|
||||
<span id="L26" class="LineNr"> 26 </span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized sub-opcode after 81: "</span> << <a href='010core.cc.html#L224'>NUM</a><span class="Delimiter">(</span>subop<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L26" class="LineNr"> 26 </span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized sub-opcode after 81: "</span> << <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>subop<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span>
|
||||
<span id="L27" class="LineNr"> 27 </span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span>
|
||||
<span id="L28" class="LineNr"> 28 </span> <span class="Delimiter">}</span>
|
||||
<span id="L29" class="LineNr"> 29 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
|
|
@ -97,10 +97,10 @@ if ('onhashchange' in window) {
|
|||
<span id="L33" class="LineNr"> 33 </span>
|
||||
<span id="L34" class="LineNr"> 34 </span><span class="Delimiter">:(scenario add_imm32_to_mem_at_r32)</span>
|
||||
<span id="L35" class="LineNr"> 35 </span><span class="Special">% Reg[3].i = 0x60;</span>
|
||||
<span id="L36" class="LineNr"> 36 </span><span class="Special">% Mem.at(0x60) = 1;</span>
|
||||
<span id="L36" class="LineNr"> 36 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 1);</span>
|
||||
<span id="L37" class="LineNr"> 37 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L38" class="LineNr"> 38 </span> <span class="Constant">81</span> <span class="PreProc">0</span><span class="Constant">3</span> 0a 0b 0c 0d <span class="Comment"># add 0x0d0c0b0a to *EBX (reg 3)</span>
|
||||
<span id="L39" class="LineNr"> 39 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L39" class="LineNr"> 39 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L40" class="LineNr"> 40 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
|
||||
<span id="L41" class="LineNr"> 41 </span><span class="traceContains">+run: subop add</span>
|
||||
<span id="L42" class="LineNr"> 42 </span><span class="traceContains">+run: storing 0x0d0c0b0b</span>
|
||||
|
|
@ -111,13 +111,13 @@ if ('onhashchange' in window) {
|
|||
<span id="L47" class="LineNr"> 47 </span><span class="Special">% Reg[EAX].i = 0x0d0c0baa;</span>
|
||||
<span id="L48" class="LineNr"> 48 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L49" class="LineNr"> 49 </span> 2d 0a 0b 0c 0d <span class="Comment"># subtract 0x0d0c0b0a from EAX (reg 0)</span>
|
||||
<span id="L50" class="LineNr"> 50 </span><span class="traceContains">+run: subtract <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a from <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
|
||||
<span id="L50" class="LineNr"> 50 </span><span class="traceContains">+run: subtract <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a from <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
|
||||
<span id="L51" class="LineNr"> 51 </span><span class="traceContains">+run: storing 0x000000a0</span>
|
||||
<span id="L52" class="LineNr"> 52 </span>
|
||||
<span id="L53" class="LineNr"> 53 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L54" class="LineNr"> 54 </span><span class="Normal">case</span> <span class="Constant">0x2d</span>: <span class="Delimiter">{</span> <span class="Comment">// subtract imm32 from EAX</span>
|
||||
<span id="L55" class="LineNr"> 55 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L211'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L56" class="LineNr"> 56 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subtract <a href='010core.cc.html#L211'>imm32</a> 0x"</span> << <a href='010core.cc.html#L222'>HEXWORD</a> << arg2 << <span class="Constant">" from <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L55" class="LineNr"> 55 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L215'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L56" class="LineNr"> 56 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subtract <a href='010core.cc.html#L215'>imm32</a> 0x"</span> << <a href='010core.cc.html#L226'>HEXWORD</a> << arg2 << <span class="Constant">" from <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L57" class="LineNr"> 57 </span> <a href='010core.cc.html#L41'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>-<span class="Delimiter">,</span> Reg[EAX]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L58" class="LineNr"> 58 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L59" class="LineNr"> 59 </span><span class="Delimiter">}</span>
|
||||
|
|
@ -126,10 +126,10 @@ if ('onhashchange' in window) {
|
|||
<span id="L62" class="LineNr"> 62 </span>
|
||||
<span id="L63" class="LineNr"> 63 </span><span class="Delimiter">:(scenario subtract_imm32_from_mem_at_r32)</span>
|
||||
<span id="L64" class="LineNr"> 64 </span><span class="Special">% Reg[3].i = 0x60;</span>
|
||||
<span id="L65" class="LineNr"> 65 </span><span class="Special">% Mem.at(0x60) = 10;</span>
|
||||
<span id="L65" class="LineNr"> 65 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 10);</span>
|
||||
<span id="L66" class="LineNr"> 66 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L67" class="LineNr"> 67 </span> <span class="Constant">81</span> 2b <span class="PreProc">0</span><span class="Constant">1</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># subtract 1 from *EBX (reg 3)</span>
|
||||
<span id="L68" class="LineNr"> 68 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x00000001 with effective address</span>
|
||||
<span id="L68" class="LineNr"> 68 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x00000001 with effective address</span>
|
||||
<span id="L69" class="LineNr"> 69 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
|
||||
<span id="L70" class="LineNr"> 70 </span><span class="traceContains">+run: subop subtract</span>
|
||||
<span id="L71" class="LineNr"> 71 </span><span class="traceContains">+run: storing 0x00000009</span>
|
||||
|
|
@ -140,7 +140,7 @@ if ('onhashchange' in window) {
|
|||
<span id="L76" class="LineNr"> 76 </span><span class="Special">% Reg[3].i = 10;</span>
|
||||
<span id="L77" class="LineNr"> 77 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L78" class="LineNr"> 78 </span> <span class="Constant">81</span> eb <span class="PreProc">0</span><span class="Constant">1</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># subtract 1 from EBX (reg 3)</span>
|
||||
<span id="L79" class="LineNr"> 79 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x00000001 with effective address</span>
|
||||
<span id="L79" class="LineNr"> 79 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x00000001 with effective address</span>
|
||||
<span id="L80" class="LineNr"> 80 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L81" class="LineNr"> 81 </span><span class="traceContains">+run: subop subtract</span>
|
||||
<span id="L82" class="LineNr"> 82 </span><span class="traceContains">+run: storing 0x00000009</span>
|
||||
|
|
@ -158,13 +158,13 @@ if ('onhashchange' in window) {
|
|||
<span id="L94" class="LineNr"> 94 </span><span class="Special">% Reg[EAX].i = 0xff;</span>
|
||||
<span id="L95" class="LineNr"> 95 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L96" class="LineNr"> 96 </span> <span class="Constant">25</span> 0a 0b 0c 0d <span class="Comment"># and 0x0d0c0b0a with EAX (reg 0)</span>
|
||||
<span id="L97" class="LineNr"> 97 </span><span class="traceContains">+run: and <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
|
||||
<span id="L97" class="LineNr"> 97 </span><span class="traceContains">+run: and <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
|
||||
<span id="L98" class="LineNr"> 98 </span><span class="traceContains">+run: storing 0x0000000a</span>
|
||||
<span id="L99" class="LineNr"> 99 </span>
|
||||
<span id="L100" class="LineNr">100 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L101" class="LineNr">101 </span><span class="Normal">case</span> <span class="Constant">0x25</span>: <span class="Delimiter">{</span> <span class="Comment">// and imm32 with EAX</span>
|
||||
<span id="L102" class="LineNr">102 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L211'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L103" class="LineNr">103 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"and <a href='010core.cc.html#L211'>imm32</a> 0x"</span> << <a href='010core.cc.html#L222'>HEXWORD</a> << arg2 << <span class="Constant">" with <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L102" class="LineNr">102 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L215'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L103" class="LineNr">103 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"and <a href='010core.cc.html#L215'>imm32</a> 0x"</span> << <a href='010core.cc.html#L226'>HEXWORD</a> << arg2 << <span class="Constant">" with <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L104" class="LineNr">104 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>&<span class="Delimiter">,</span> Reg[EAX]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L105" class="LineNr">105 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L106" class="LineNr">106 </span><span class="Delimiter">}</span>
|
||||
|
|
@ -173,10 +173,10 @@ if ('onhashchange' in window) {
|
|||
<span id="L109" class="LineNr">109 </span>
|
||||
<span id="L110" class="LineNr">110 </span><span class="Delimiter">:(scenario and_imm32_with_mem_at_r32)</span>
|
||||
<span id="L111" class="LineNr">111 </span><span class="Special">% Reg[3].i = 0x60;</span>
|
||||
<span id="L112" class="LineNr">112 </span><span class="Special">% Mem.at(0x60) = 0xff;</span>
|
||||
<span id="L112" class="LineNr">112 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x000000ff);</span>
|
||||
<span id="L113" class="LineNr">113 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L114" class="LineNr">114 </span> <span class="Constant">81</span> <span class="Constant">23</span> 0a 0b 0c 0d <span class="Comment"># and 0x0d0c0b0a with *EBX (reg 3)</span>
|
||||
<span id="L115" class="LineNr">115 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L115" class="LineNr">115 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L116" class="LineNr">116 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
|
||||
<span id="L117" class="LineNr">117 </span><span class="traceContains">+run: subop and</span>
|
||||
<span id="L118" class="LineNr">118 </span><span class="traceContains">+run: storing 0x0000000a</span>
|
||||
|
|
@ -187,7 +187,7 @@ if ('onhashchange' in window) {
|
|||
<span id="L123" class="LineNr">123 </span><span class="Special">% Reg[3].i = 0xff;</span>
|
||||
<span id="L124" class="LineNr">124 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L125" class="LineNr">125 </span> <span class="Constant">81</span> e3 0a 0b 0c 0d <span class="Comment"># and 0x0d0c0b0a with EBX (reg 3)</span>
|
||||
<span id="L126" class="LineNr">126 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L126" class="LineNr">126 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L127" class="LineNr">127 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L128" class="LineNr">128 </span><span class="traceContains">+run: subop and</span>
|
||||
<span id="L129" class="LineNr">129 </span><span class="traceContains">+run: storing 0x0000000a</span>
|
||||
|
|
@ -205,13 +205,13 @@ if ('onhashchange' in window) {
|
|||
<span id="L141" class="LineNr">141 </span><span class="Special">% Reg[EAX].i = 0xd0c0b0a0;</span>
|
||||
<span id="L142" class="LineNr">142 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L143" class="LineNr">143 </span> 0d 0a 0b 0c 0d <span class="Comment"># or 0x0d0c0b0a with EAX (reg 0)</span>
|
||||
<span id="L144" class="LineNr">144 </span><span class="traceContains">+run: or <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
|
||||
<span id="L144" class="LineNr">144 </span><span class="traceContains">+run: or <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
|
||||
<span id="L145" class="LineNr">145 </span><span class="traceContains">+run: storing 0xddccbbaa</span>
|
||||
<span id="L146" class="LineNr">146 </span>
|
||||
<span id="L147" class="LineNr">147 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L148" class="LineNr">148 </span><span class="Normal">case</span> <span class="Constant">0x0d</span>: <span class="Delimiter">{</span> <span class="Comment">// or imm32 with EAX</span>
|
||||
<span id="L149" class="LineNr">149 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L211'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L150" class="LineNr">150 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"or <a href='010core.cc.html#L211'>imm32</a> 0x"</span> << <a href='010core.cc.html#L222'>HEXWORD</a> << arg2 << <span class="Constant">" with <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L149" class="LineNr">149 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L215'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L150" class="LineNr">150 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"or <a href='010core.cc.html#L215'>imm32</a> 0x"</span> << <a href='010core.cc.html#L226'>HEXWORD</a> << arg2 << <span class="Constant">" with <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L151" class="LineNr">151 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> Reg[EAX]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L152" class="LineNr">152 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L153" class="LineNr">153 </span><span class="Delimiter">}</span>
|
||||
|
|
@ -220,84 +220,78 @@ if ('onhashchange' in window) {
|
|||
<span id="L156" class="LineNr">156 </span>
|
||||
<span id="L157" class="LineNr">157 </span><span class="Delimiter">:(scenario or_imm32_with_mem_at_r32)</span>
|
||||
<span id="L158" class="LineNr">158 </span><span class="Special">% Reg[3].i = 0x60;</span>
|
||||
<span id="L159" class="LineNr">159 </span><span class="Special">% Mem.at(0x60) = 0xa0;</span>
|
||||
<span id="L160" class="LineNr">160 </span><span class="Special">% Mem.at(0x61) = 0xb0;</span>
|
||||
<span id="L161" class="LineNr">161 </span><span class="Special">% Mem.at(0x62) = 0xc0;</span>
|
||||
<span id="L162" class="LineNr">162 </span><span class="Special">% Mem.at(0x63) = 0xd0;</span>
|
||||
<span id="L163" class="LineNr">163 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L164" class="LineNr">164 </span> <span class="Constant">81</span> 0b 0a 0b 0c 0d <span class="Comment"># or 0x0d0c0b0a with *EBX (reg 3)</span>
|
||||
<span id="L165" class="LineNr">165 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L166" class="LineNr">166 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
|
||||
<span id="L167" class="LineNr">167 </span><span class="traceContains">+run: subop or</span>
|
||||
<span id="L168" class="LineNr">168 </span><span class="traceContains">+run: storing 0xddccbbaa</span>
|
||||
<span id="L169" class="LineNr">169 </span>
|
||||
<span id="L170" class="LineNr">170 </span><span class="Comment">//:</span>
|
||||
<span id="L171" class="LineNr">171 </span>
|
||||
<span id="L172" class="LineNr">172 </span><span class="Delimiter">:(scenario or_imm32_with_r32)</span>
|
||||
<span id="L173" class="LineNr">173 </span><span class="Special">% Reg[3].i = 0xd0c0b0a0;</span>
|
||||
<span id="L174" class="LineNr">174 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L175" class="LineNr">175 </span> <span class="Constant">81</span> cb 0a 0b 0c 0d <span class="Comment"># or 0x0d0c0b0a with EBX (reg 3)</span>
|
||||
<span id="L176" class="LineNr">176 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L177" class="LineNr">177 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L178" class="LineNr">178 </span><span class="traceContains">+run: subop or</span>
|
||||
<span id="L179" class="LineNr">179 </span><span class="traceContains">+run: storing 0xddccbbaa</span>
|
||||
<span id="L180" class="LineNr">180 </span>
|
||||
<span id="L181" class="LineNr">181 </span><span class="Delimiter">:(before "End Op 81 Subops")</span>
|
||||
<span id="L182" class="LineNr">182 </span><span class="Normal">case</span> <span class="Constant">1</span>: <span class="Delimiter">{</span>
|
||||
<span id="L183" class="LineNr">183 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop or"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L184" class="LineNr">184 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L185" class="LineNr">185 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L186" class="LineNr">186 </span><span class="Delimiter">}</span>
|
||||
<span id="L187" class="LineNr">187 </span>
|
||||
<span id="L188" class="LineNr">188 </span><span class="SalientComment">//:: xor</span>
|
||||
<span id="L189" class="LineNr">189 </span>
|
||||
<span id="L190" class="LineNr">190 </span><span class="Delimiter">:(scenario xor_imm32_with_eax)</span>
|
||||
<span id="L191" class="LineNr">191 </span><span class="Special">% Reg[EAX].i = 0xddccb0a0;</span>
|
||||
<span id="L192" class="LineNr">192 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L193" class="LineNr">193 </span> <span class="Constant">35</span> 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with EAX (reg 0)</span>
|
||||
<span id="L194" class="LineNr">194 </span><span class="traceContains">+run: xor <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
|
||||
<span id="L195" class="LineNr">195 </span><span class="traceContains">+run: storing 0xd0c0bbaa</span>
|
||||
<span id="L196" class="LineNr">196 </span>
|
||||
<span id="L197" class="LineNr">197 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L198" class="LineNr">198 </span><span class="Normal">case</span> <span class="Constant">0x35</span>: <span class="Delimiter">{</span> <span class="Comment">// xor imm32 with EAX</span>
|
||||
<span id="L199" class="LineNr">199 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L211'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L200" class="LineNr">200 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"xor <a href='010core.cc.html#L211'>imm32</a> 0x"</span> << <a href='010core.cc.html#L222'>HEXWORD</a> << arg2 << <span class="Constant">" with <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L201" class="LineNr">201 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> Reg[EAX]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L202" class="LineNr">202 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L203" class="LineNr">203 </span><span class="Delimiter">}</span>
|
||||
<span id="L204" class="LineNr">204 </span>
|
||||
<span id="L205" class="LineNr">205 </span><span class="Comment">//:</span>
|
||||
<span id="L206" class="LineNr">206 </span>
|
||||
<span id="L207" class="LineNr">207 </span><span class="Delimiter">:(scenario xor_imm32_with_mem_at_r32)</span>
|
||||
<span id="L208" class="LineNr">208 </span><span class="Special">% Reg[3].i = 0x60;</span>
|
||||
<span id="L209" class="LineNr">209 </span><span class="Special">% Mem.at(0x60) = 0xa0;</span>
|
||||
<span id="L210" class="LineNr">210 </span><span class="Special">% Mem.at(0x61) = 0xb0;</span>
|
||||
<span id="L211" class="LineNr">211 </span><span class="Special">% Mem.at(0x62) = 0xc0;</span>
|
||||
<span id="L212" class="LineNr">212 </span><span class="Special">% Mem.at(0x63) = 0xd0;</span>
|
||||
<span id="L213" class="LineNr">213 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L214" class="LineNr">214 </span> <span class="Constant">81</span> <span class="Constant">33</span> 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with *EBX (reg 3)</span>
|
||||
<span id="L215" class="LineNr">215 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L216" class="LineNr">216 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
|
||||
<span id="L217" class="LineNr">217 </span><span class="traceContains">+run: subop xor</span>
|
||||
<span id="L218" class="LineNr">218 </span><span class="traceContains">+run: storing 0xddccbbaa</span>
|
||||
<span id="L219" class="LineNr">219 </span>
|
||||
<span id="L220" class="LineNr">220 </span><span class="Comment">//:</span>
|
||||
<span id="L221" class="LineNr">221 </span>
|
||||
<span id="L222" class="LineNr">222 </span><span class="Delimiter">:(scenario xor_imm32_with_r32)</span>
|
||||
<span id="L223" class="LineNr">223 </span><span class="Special">% Reg[3].i = 0xd0c0b0a0;</span>
|
||||
<span id="L224" class="LineNr">224 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L225" class="LineNr">225 </span> <span class="Constant">81</span> f3 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with EBX (reg 3)</span>
|
||||
<span id="L226" class="LineNr">226 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L211'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L227" class="LineNr">227 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L228" class="LineNr">228 </span><span class="traceContains">+run: subop xor</span>
|
||||
<span id="L229" class="LineNr">229 </span><span class="traceContains">+run: storing 0xddccbbaa</span>
|
||||
<span id="L230" class="LineNr">230 </span>
|
||||
<span id="L231" class="LineNr">231 </span><span class="Delimiter">:(before "End Op 81 Subops")</span>
|
||||
<span id="L232" class="LineNr">232 </span><span class="Normal">case</span> <span class="Constant">6</span>: <span class="Delimiter">{</span>
|
||||
<span id="L233" class="LineNr">233 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop xor"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L234" class="LineNr">234 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L235" class="LineNr">235 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L236" class="LineNr">236 </span><span class="Delimiter">}</span>
|
||||
<span id="L159" class="LineNr">159 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);</span>
|
||||
<span id="L160" class="LineNr">160 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L161" class="LineNr">161 </span> <span class="Constant">81</span> 0b 0a 0b 0c 0d <span class="Comment"># or 0x0d0c0b0a with *EBX (reg 3)</span>
|
||||
<span id="L162" class="LineNr">162 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L163" class="LineNr">163 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
|
||||
<span id="L164" class="LineNr">164 </span><span class="traceContains">+run: subop or</span>
|
||||
<span id="L165" class="LineNr">165 </span><span class="traceContains">+run: storing 0xddccbbaa</span>
|
||||
<span id="L166" class="LineNr">166 </span>
|
||||
<span id="L167" class="LineNr">167 </span><span class="Comment">//:</span>
|
||||
<span id="L168" class="LineNr">168 </span>
|
||||
<span id="L169" class="LineNr">169 </span><span class="Delimiter">:(scenario or_imm32_with_r32)</span>
|
||||
<span id="L170" class="LineNr">170 </span><span class="Special">% Reg[3].i = 0xd0c0b0a0;</span>
|
||||
<span id="L171" class="LineNr">171 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L172" class="LineNr">172 </span> <span class="Constant">81</span> cb 0a 0b 0c 0d <span class="Comment"># or 0x0d0c0b0a with EBX (reg 3)</span>
|
||||
<span id="L173" class="LineNr">173 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L174" class="LineNr">174 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L175" class="LineNr">175 </span><span class="traceContains">+run: subop or</span>
|
||||
<span id="L176" class="LineNr">176 </span><span class="traceContains">+run: storing 0xddccbbaa</span>
|
||||
<span id="L177" class="LineNr">177 </span>
|
||||
<span id="L178" class="LineNr">178 </span><span class="Delimiter">:(before "End Op 81 Subops")</span>
|
||||
<span id="L179" class="LineNr">179 </span><span class="Normal">case</span> <span class="Constant">1</span>: <span class="Delimiter">{</span>
|
||||
<span id="L180" class="LineNr">180 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop or"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L181" class="LineNr">181 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L182" class="LineNr">182 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L183" class="LineNr">183 </span><span class="Delimiter">}</span>
|
||||
<span id="L184" class="LineNr">184 </span>
|
||||
<span id="L185" class="LineNr">185 </span><span class="SalientComment">//:: xor</span>
|
||||
<span id="L186" class="LineNr">186 </span>
|
||||
<span id="L187" class="LineNr">187 </span><span class="Delimiter">:(scenario xor_imm32_with_eax)</span>
|
||||
<span id="L188" class="LineNr">188 </span><span class="Special">% Reg[EAX].i = 0xddccb0a0;</span>
|
||||
<span id="L189" class="LineNr">189 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
|
||||
<span id="L190" class="LineNr">190 </span> <span class="Constant">35</span> 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with EAX (reg 0)</span>
|
||||
<span id="L191" class="LineNr">191 </span><span class="traceContains">+run: xor <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L15'>reg</a> <a href='010core.cc.html#L5'>EAX</a></span>
|
||||
<span id="L192" class="LineNr">192 </span><span class="traceContains">+run: storing 0xd0c0bbaa</span>
|
||||
<span id="L193" class="LineNr">193 </span>
|
||||
<span id="L194" class="LineNr">194 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span>
|
||||
<span id="L195" class="LineNr">195 </span><span class="Normal">case</span> <span class="Constant">0x35</span>: <span class="Delimiter">{</span> <span class="Comment">// xor imm32 with EAX</span>
|
||||
<span id="L196" class="LineNr">196 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L215'>imm32</a><span class="Delimiter">();</span>
|
||||
<span id="L197" class="LineNr">197 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"xor <a href='010core.cc.html#L215'>imm32</a> 0x"</span> << <a href='010core.cc.html#L226'>HEXWORD</a> << arg2 << <span class="Constant">" with <a href='010core.cc.html#L15'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L198" class="LineNr">198 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> Reg[EAX]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L199" class="LineNr">199 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L200" class="LineNr">200 </span><span class="Delimiter">}</span>
|
||||
<span id="L201" class="LineNr">201 </span>
|
||||
<span id="L202" class="LineNr">202 </span><span class="Comment">//:</span>
|
||||
<span id="L203" class="LineNr">203 </span>
|
||||
<span id="L204" class="LineNr">204 </span><span class="Delimiter">:(scenario xor_imm32_with_mem_at_r32)</span>
|
||||
<span id="L205" class="LineNr">205 </span><span class="Special">% Reg[3].i = 0x60;</span>
|
||||
<span id="L206" class="LineNr">206 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);</span>
|
||||
<span id="L207" class="LineNr">207 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L208" class="LineNr">208 </span> <span class="Constant">81</span> <span class="Constant">33</span> 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with *EBX (reg 3)</span>
|
||||
<span id="L209" class="LineNr">209 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L210" class="LineNr">210 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
|
||||
<span id="L211" class="LineNr">211 </span><span class="traceContains">+run: subop xor</span>
|
||||
<span id="L212" class="LineNr">212 </span><span class="traceContains">+run: storing 0xddccbbaa</span>
|
||||
<span id="L213" class="LineNr">213 </span>
|
||||
<span id="L214" class="LineNr">214 </span><span class="Comment">//:</span>
|
||||
<span id="L215" class="LineNr">215 </span>
|
||||
<span id="L216" class="LineNr">216 </span><span class="Delimiter">:(scenario xor_imm32_with_r32)</span>
|
||||
<span id="L217" class="LineNr">217 </span><span class="Special">% Reg[3].i = 0xd0c0b0a0;</span>
|
||||
<span id="L218" class="LineNr">218 </span><span class="Comment"># op ModRM SIB displacement immediate</span>
|
||||
<span id="L219" class="LineNr">219 </span> <span class="Constant">81</span> f3 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with EBX (reg 3)</span>
|
||||
<span id="L220" class="LineNr">220 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L215'>imm32</a> 0x0d0c0b0a with effective address</span>
|
||||
<span id="L221" class="LineNr">221 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 3</span>
|
||||
<span id="L222" class="LineNr">222 </span><span class="traceContains">+run: subop xor</span>
|
||||
<span id="L223" class="LineNr">223 </span><span class="traceContains">+run: storing 0xddccbbaa</span>
|
||||
<span id="L224" class="LineNr">224 </span>
|
||||
<span id="L225" class="LineNr">225 </span><span class="Delimiter">:(before "End Op 81 Subops")</span>
|
||||
<span id="L226" class="LineNr">226 </span><span class="Normal">case</span> <span class="Constant">6</span>: <span class="Delimiter">{</span>
|
||||
<span id="L227" class="LineNr">227 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop xor"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
|
||||
<span id="L228" class="LineNr">228 </span> <a href='010core.cc.html#L53'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span>
|
||||
<span id="L229" class="LineNr">229 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
|
||||
<span id="L230" class="LineNr">230 </span><span class="Delimiter">}</span>
|
||||
</pre>
|
||||
</body>
|
||||
</html>
|
||||
|
|
|
|||
|
|
@ -68,6 +68,10 @@ uint32_t End_of_program = 0;
|
|||
Mem.clear();
|
||||
Mem.resize(1024);
|
||||
End_of_program = 0;
|
||||
:(before "End Includes")
|
||||
// depends on Mem being laid out contiguously (so you can't use a map, etc.)
|
||||
// and on the host also being little-endian
|
||||
#define SET_WORD_IN_MEM(addr, val) *reinterpret_cast<int32_t*>(&Mem.at(addr)) = val;
|
||||
|
||||
//:: core interpreter loop
|
||||
|
||||
|
|
|
|||
|
|
@ -3,8 +3,7 @@
|
|||
:(scenario add_r32_to_mem_at_r32)
|
||||
% Reg[3].i = 0x10;
|
||||
% Reg[0].i = 0x60;
|
||||
# word in addresses 0x60-0x63 has value 1
|
||||
% Mem.at(0x60) = 1;
|
||||
% SET_WORD_IN_MEM(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 18 # add EBX (reg 3) to *EAX (reg 0)
|
||||
+run: add reg 3 to effective address
|
||||
|
|
@ -29,7 +28,7 @@ case 0:
|
|||
:(scenario add_mem_at_r32_to_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Reg[3].i = 0x10;
|
||||
% Mem.at(0x60) = 1;
|
||||
% SET_WORD_IN_MEM(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
03 18 # add *EAX (reg 0) to EBX (reg 3)
|
||||
+run: add effective address to reg 3
|
||||
|
|
@ -50,7 +49,7 @@ case 0x03: { // add r/m32 to r32
|
|||
|
||||
:(scenario subtract_r32_from_mem_at_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Mem.at(0x60) = 10;
|
||||
% SET_WORD_IN_MEM(0x60, 10);
|
||||
% Reg[3].i = 1;
|
||||
# op ModRM SIB displacement immediate
|
||||
29 18 # subtract EBX (reg 3) from *EAX (reg 0)
|
||||
|
|
@ -62,7 +61,7 @@ case 0x03: { // add r/m32 to r32
|
|||
|
||||
:(scenario subtract_mem_at_r32_from_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Mem.at(0x60) = 1;
|
||||
% SET_WORD_IN_MEM(0x60, 1);
|
||||
% Reg[3].i = 10;
|
||||
# op ModRM SIB displacement immediate
|
||||
2b 18 # subtract *EAX (reg 0) from EBX (reg 3)
|
||||
|
|
@ -84,10 +83,7 @@ case 0x2b: { // subtract r/m32 from r32
|
|||
|
||||
:(scenario and_r32_with_mem_at_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Mem.at(0x60) = 0x0d;
|
||||
% Mem.at(0x61) = 0x0c;
|
||||
% Mem.at(0x62) = 0x0b;
|
||||
% Mem.at(0x63) = 0x0a;
|
||||
% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);
|
||||
% Reg[3].i = 0xff;
|
||||
# op ModRM SIB displacement immediate
|
||||
21 18 # and EBX (reg 3) with *EAX (reg 0)
|
||||
|
|
@ -99,7 +95,7 @@ case 0x2b: { // subtract r/m32 from r32
|
|||
|
||||
:(scenario and_mem_at_r32_with_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Mem.at(0x60) = 0xff;
|
||||
% SET_WORD_IN_MEM(0x60, 0x000000ff);
|
||||
% Reg[3].i = 0x0a0b0c0d;
|
||||
# op ModRM SIB displacement immediate
|
||||
23 18 # and *EAX (reg 0) with EBX (reg 3)
|
||||
|
|
@ -121,10 +117,7 @@ case 0x23: { // and r/m32 with r32
|
|||
|
||||
:(scenario or_r32_with_mem_at_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Mem.at(0x60) = 0x0d;
|
||||
% Mem.at(0x61) = 0x0c;
|
||||
% Mem.at(0x62) = 0x0b;
|
||||
% Mem.at(0x63) = 0x0a;
|
||||
% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);
|
||||
% Reg[3].i = 0xa0b0c0d0;
|
||||
# op ModRM SIB displacement immediate
|
||||
09 18 # or EBX (reg 3) with *EAX (reg 0)
|
||||
|
|
@ -136,10 +129,7 @@ case 0x23: { // and r/m32 with r32
|
|||
|
||||
:(scenario or_mem_at_r32_with_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Mem.at(0x60) = 0x0d;
|
||||
% Mem.at(0x61) = 0x0c;
|
||||
% Mem.at(0x62) = 0x0b;
|
||||
% Mem.at(0x63) = 0x0a;
|
||||
% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);
|
||||
% Reg[3].i = 0xa0b0c0d0;
|
||||
# op ModRM SIB displacement immediate
|
||||
0b 18 # or *EAX (reg 0) with EBX (reg 3)
|
||||
|
|
@ -161,10 +151,7 @@ case 0x0b: { // or r/m32 with r32
|
|||
|
||||
:(scenario xor_r32_with_mem_at_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Mem.at(0x60) = 0x0d;
|
||||
% Mem.at(0x61) = 0x0c;
|
||||
% Mem.at(0x62) = 0xbb;
|
||||
% Mem.at(0x63) = 0xaa;
|
||||
% SET_WORD_IN_MEM(0x60, 0xaabb0c0d);
|
||||
% Reg[3].i = 0xa0b0c0d0;
|
||||
# op ModRM SIB displacement immediate
|
||||
31 18 # xor EBX (reg 3) with *EAX (reg 0)
|
||||
|
|
@ -176,10 +163,7 @@ case 0x0b: { // or r/m32 with r32
|
|||
|
||||
:(scenario xor_mem_at_r32_with_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Mem.at(0x60) = 0x0d;
|
||||
% Mem.at(0x61) = 0x0c;
|
||||
% Mem.at(0x62) = 0x0b;
|
||||
% Mem.at(0x63) = 0x0a;
|
||||
% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);
|
||||
% Reg[3].i = 0xa0b0c0d0;
|
||||
# op ModRM SIB displacement immediate
|
||||
33 18 # xor *EAX (reg 0) with EBX (reg 3)
|
||||
|
|
@ -202,10 +186,7 @@ case 0x33: { // xor r/m32 with r32
|
|||
:(scenario not_r32_with_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
# word at 0x60 is 0x0f0f00ff
|
||||
% Mem.at(0x60) = 0xff;
|
||||
% Mem.at(0x61) = 0x00;
|
||||
% Mem.at(0x62) = 0x0f;
|
||||
% Mem.at(0x63) = 0x0f;
|
||||
% SET_WORD_IN_MEM(0x60, 0x0f0f00ff);
|
||||
# op ModRM SIB displacement immediate
|
||||
f7 03 # negate *EBX (reg 3)
|
||||
+run: 'not' of effective address
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ case 0x81: { // combine imm32 with r/m32
|
|||
|
||||
:(scenario add_imm32_to_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Mem.at(0x60) = 1;
|
||||
% SET_WORD_IN_MEM(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 03 0a 0b 0c 0d # add 0x0d0c0b0a to *EBX (reg 3)
|
||||
+run: combine imm32 0x0d0c0b0a with effective address
|
||||
|
|
@ -62,7 +62,7 @@ case 0x2d: { // subtract imm32 from EAX
|
|||
|
||||
:(scenario subtract_imm32_from_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Mem.at(0x60) = 10;
|
||||
% SET_WORD_IN_MEM(0x60, 10);
|
||||
# op ModRM SIB displacement immediate
|
||||
81 2b 01 00 00 00 # subtract 1 from *EBX (reg 3)
|
||||
+run: combine imm32 0x00000001 with effective address
|
||||
|
|
@ -109,7 +109,7 @@ case 0x25: { // and imm32 with EAX
|
|||
|
||||
:(scenario and_imm32_with_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Mem.at(0x60) = 0xff;
|
||||
% SET_WORD_IN_MEM(0x60, 0x000000ff);
|
||||
# op ModRM SIB displacement immediate
|
||||
81 23 0a 0b 0c 0d # and 0x0d0c0b0a with *EBX (reg 3)
|
||||
+run: combine imm32 0x0d0c0b0a with effective address
|
||||
|
|
@ -156,10 +156,7 @@ case 0x0d: { // or imm32 with EAX
|
|||
|
||||
:(scenario or_imm32_with_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Mem.at(0x60) = 0xa0;
|
||||
% Mem.at(0x61) = 0xb0;
|
||||
% Mem.at(0x62) = 0xc0;
|
||||
% Mem.at(0x63) = 0xd0;
|
||||
% SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);
|
||||
# op ModRM SIB displacement immediate
|
||||
81 0b 0a 0b 0c 0d # or 0x0d0c0b0a with *EBX (reg 3)
|
||||
+run: combine imm32 0x0d0c0b0a with effective address
|
||||
|
|
@ -206,10 +203,7 @@ case 0x35: { // xor imm32 with EAX
|
|||
|
||||
:(scenario xor_imm32_with_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Mem.at(0x60) = 0xa0;
|
||||
% Mem.at(0x61) = 0xb0;
|
||||
% Mem.at(0x62) = 0xc0;
|
||||
% Mem.at(0x63) = 0xd0;
|
||||
% SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);
|
||||
# op ModRM SIB displacement immediate
|
||||
81 33 0a 0b 0c 0d # xor 0x0d0c0b0a with *EBX (reg 3)
|
||||
+run: combine imm32 0x0d0c0b0a with effective address
|
||||
|
|
|
|||
Loading…
Reference in New Issue