4339
This commit is contained in:
Kartik Agaram
parent
1a48f95a87
commit
c8c5065869
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@ -1,8 +1,8 @@
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//: operating directly on a register
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:(scenario add_r32_to_r32)
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% Reg[0].i = 0x10;
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% Reg[3].i = 1;
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% Reg[EAX].i = 0x10;
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% Reg[EBX].i = 1;
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# op ModR/M SIB displacement immediate
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01 d8 # add EBX to EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -46,8 +46,8 @@ int32_t* effective_address(uint8_t modrm) {
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//:: subtract
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:(scenario subtract_r32_from_r32)
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% Reg[0].i = 10;
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% Reg[3].i = 1;
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% Reg[EAX].i = 10;
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% Reg[EBX].i = 1;
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# op ModR/M SIB displacement immediate
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29 d8 # subtract EBX from EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -68,8 +68,8 @@ case 0x29: { // subtract r32 from r/m32
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//:: and
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:(scenario and_r32_with_r32)
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% Reg[0].i = 0x0a0b0c0d;
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% Reg[3].i = 0x000000ff;
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% Reg[EAX].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0x000000ff;
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# op ModR/M SIB displacement immediate
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21 d8 # and EBX with destination EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -90,8 +90,8 @@ case 0x21: { // and r32 with r/m32
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//:: or
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:(scenario or_r32_with_r32)
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% Reg[0].i = 0x0a0b0c0d;
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% Reg[3].i = 0xa0b0c0d0;
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% Reg[EAX].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0xa0b0c0d0;
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# op ModR/M SIB displacement immediate
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09 d8 # or EBX with destination EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -112,8 +112,8 @@ case 0x09: { // or r32 with r/m32
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//:: xor
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:(scenario xor_r32_with_r32)
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% Reg[0].i = 0x0a0b0c0d;
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% Reg[3].i = 0xaabbc0d0;
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% Reg[EAX].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0xaabbc0d0;
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# op ModR/M SIB displacement immediate
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31 d8 # xor EBX with destination EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -134,7 +134,7 @@ case 0x31: { // xor r32 with r/m32
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//:: not
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:(scenario not_r32)
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% Reg[3].i = 0x0f0f00ff;
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% Reg[EBX].i = 0x0f0f00ff;
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# op ModR/M SIB displacement immediate
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f7 c3 # not EBX
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# ModR/M in binary: 11 (direct mode) 000 (unused) 011 (dest EBX)
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@ -158,8 +158,8 @@ case 0xf7: { // xor r32 with r/m32
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//:: compare (cmp)
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:(scenario compare_r32_with_r32_greater)
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% Reg[0].i = 0x0a0b0c0d;
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% Reg[3].i = 0x0a0b0c07;
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% Reg[EAX].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0x0a0b0c07;
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# op ModR/M SIB displacement immediate
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39 d8 # compare EBX with EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -184,8 +184,8 @@ case 0x39: { // set SF if r/m32 < r32
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}
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:(scenario compare_r32_with_r32_lesser)
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% Reg[0].i = 0x0a0b0c07;
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% Reg[3].i = 0x0a0b0c0d;
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% Reg[EAX].i = 0x0a0b0c07;
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% Reg[EBX].i = 0x0a0b0c0d;
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# op ModR/M SIB displacement immediate
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39 d8 # compare EBX with EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -194,8 +194,8 @@ case 0x39: { // set SF if r/m32 < r32
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+run: SF=1; ZF=0; OF=0
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:(scenario compare_r32_with_r32_equal)
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% Reg[0].i = 0x0a0b0c0d;
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% Reg[3].i = 0x0a0b0c0d;
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% Reg[EAX].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0x0a0b0c0d;
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# op ModR/M SIB displacement immediate
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39 d8 # compare EBX with EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -206,7 +206,7 @@ case 0x39: { // set SF if r/m32 < r32
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//:: copy (mov)
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:(scenario copy_r32_to_r32)
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% Reg[3].i = 0xaf;
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% Reg[EBX].i = 0xaf;
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# op ModR/M SIB displacement immediate
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89 d8 # copy EBX to EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -228,8 +228,8 @@ case 0x89: { // copy r32 to r/m32
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//:: xchg
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:(scenario xchg_r32_with_r32)
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% Reg[3].i = 0xaf;
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% Reg[0].i = 0x2e;
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% Reg[EBX].i = 0xaf;
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% Reg[EAX].i = 0x2e;
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# op ModR/M SIB displacement immediate
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87 d8 # exchange EBX with EAX
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# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
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@ -2,8 +2,8 @@
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//: we'll now start providing data in a separate segment
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:(scenario add_r32_to_mem_at_r32)
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% Reg[3].i = 0x10;
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% Reg[0].i = 0x60;
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% Reg[EBX].i = 0x10;
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% Reg[EAX].i = 0x60;
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== 0x01 # code segment
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# op ModR/M SIB displacement immediate
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01 18 # add EBX to *EAX
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@ -28,8 +28,8 @@ case 0: // indirect addressing
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//:
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:(scenario add_mem_at_r32_to_r32)
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% Reg[0].i = 0x60;
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% Reg[3].i = 0x10;
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% Reg[EAX].i = 0x60;
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% Reg[EBX].i = 0x10;
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% write_mem_i32(0x60, 1);
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# op ModR/M SIB displacement immediate
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03 18 # add *EAX to EBX
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@ -51,9 +51,9 @@ case 0x03: { // add r/m32 to r32
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//:: subtract
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:(scenario subtract_r32_from_mem_at_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 10);
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% Reg[3].i = 1;
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% Reg[EBX].i = 1;
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# op ModR/M SIB displacement immediate
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29 18 # subtract EBX from *EAX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -64,9 +64,9 @@ case 0x03: { // add r/m32 to r32
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//:
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:(scenario subtract_mem_at_r32_from_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 1);
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% Reg[3].i = 10;
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% Reg[EBX].i = 10;
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# op ModR/M SIB displacement immediate
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2b 18 # subtract *EAX from EBX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -87,9 +87,9 @@ case 0x2b: { // subtract r/m32 from r32
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//:: and
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:(scenario and_r32_with_mem_at_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c0d);
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% Reg[3].i = 0xff;
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% Reg[EBX].i = 0xff;
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# op ModR/M SIB displacement immediate
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21 18 # and EBX with *EAX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -100,9 +100,9 @@ case 0x2b: { // subtract r/m32 from r32
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//:
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:(scenario and_mem_at_r32_with_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x000000ff);
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% Reg[3].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0x0a0b0c0d;
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# op ModR/M SIB displacement immediate
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23 18 # and *EAX with EBX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -123,9 +123,9 @@ case 0x23: { // and r/m32 with r32
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//:: or
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:(scenario or_r32_with_mem_at_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c0d);
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% Reg[3].i = 0xa0b0c0d0;
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% Reg[EBX].i = 0xa0b0c0d0;
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# op ModR/M SIB displacement immediate
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09 18 # or EBX with *EAX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -136,9 +136,9 @@ case 0x23: { // and r/m32 with r32
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//:
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:(scenario or_mem_at_r32_with_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c0d);
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% Reg[3].i = 0xa0b0c0d0;
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% Reg[EBX].i = 0xa0b0c0d0;
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# op ModR/M SIB displacement immediate
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0b 18 # or *EAX with EBX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -159,9 +159,9 @@ case 0x0b: { // or r/m32 with r32
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//:: xor
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:(scenario xor_r32_with_mem_at_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0xaabb0c0d);
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% Reg[3].i = 0xa0b0c0d0;
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% Reg[EBX].i = 0xa0b0c0d0;
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# op ModR/M SIB displacement immediate
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31 18 # xor EBX with *EAX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -172,9 +172,9 @@ case 0x0b: { // or r/m32 with r32
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//:
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:(scenario xor_mem_at_r32_with_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c0d);
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% Reg[3].i = 0xa0b0c0d0;
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% Reg[EBX].i = 0xa0b0c0d0;
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# op ModR/M SIB displacement immediate
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33 18 # xor *EAX with EBX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -195,7 +195,7 @@ case 0x33: { // xor r/m32 with r32
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//:: not
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:(scenario not_r32_with_mem_at_r32)
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% Reg[3].i = 0x60;
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% Reg[EBX].i = 0x60;
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# word at 0x60 is 0x0f0f00ff
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% write_mem_i32(0x60, 0x0f0f00ff);
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# op ModR/M SIB displacement immediate
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@ -208,9 +208,9 @@ case 0x33: { // xor r/m32 with r32
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//:: compare (cmp)
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:(scenario compare_mem_at_r32_with_r32_greater)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c0d);
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% Reg[3].i = 0x0a0b0c07;
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% Reg[EBX].i = 0x0a0b0c07;
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# op ModR/M SIB displacement immediate
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39 18 # compare EBX with *EAX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -219,9 +219,9 @@ case 0x33: { // xor r/m32 with r32
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+run: SF=0; ZF=0; OF=0
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:(scenario compare_mem_at_r32_with_r32_lesser)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c07);
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% Reg[3].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0x0a0b0c0d;
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# op ModR/M SIB displacement immediate
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39 18 # compare EBX with *EAX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -230,9 +230,9 @@ case 0x33: { // xor r/m32 with r32
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+run: SF=1; ZF=0; OF=0
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:(scenario compare_mem_at_r32_with_r32_equal)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c0d);
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% Reg[3].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0x0a0b0c0d;
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# op ModR/M SIB displacement immediate
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39 18 # compare EBX with *EAX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -243,9 +243,9 @@ case 0x33: { // xor r/m32 with r32
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//:
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:(scenario compare_r32_with_mem_at_r32_greater)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c07);
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% Reg[3].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0x0a0b0c0d;
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# op ModR/M SIB displacement immediate
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3b 18 # compare *EAX with EBX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -270,9 +270,9 @@ case 0x3b: { // set SF if r32 < r/m32
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}
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:(scenario compare_r32_with_mem_at_r32_lesser)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c0d);
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% Reg[3].i = 0x0a0b0c07;
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% Reg[EBX].i = 0x0a0b0c07;
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# op ModR/M SIB displacement immediate
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3b 18 # compare *EAX with EBX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -281,9 +281,9 @@ case 0x3b: { // set SF if r32 < r/m32
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+run: SF=1; ZF=0; OF=0
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:(scenario compare_r32_with_mem_at_r32_equal)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x0a0b0c0d);
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% Reg[3].i = 0x0a0b0c0d;
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% Reg[EBX].i = 0x0a0b0c0d;
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# op ModR/M SIB displacement immediate
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3b 18 # compare *EAX with EBX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -294,8 +294,8 @@ case 0x3b: { // set SF if r32 < r/m32
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//:: copy (mov)
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:(scenario copy_r32_to_mem_at_r32)
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% Reg[3].i = 0xaf;
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% Reg[0].i = 0x60;
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% Reg[EBX].i = 0xaf;
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% Reg[EAX].i = 0x60;
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# op ModR/M SIB displacement immediate
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89 18 # copy EBX to *EAX
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# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
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@ -306,7 +306,7 @@ case 0x3b: { // set SF if r32 < r/m32
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//:
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:(scenario copy_mem_at_r32_to_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x000000af);
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# op ModR/M SIB displacement immediate
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8b 18 # copy *EAX to EBX
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@ -329,7 +329,7 @@ case 0x8b: { // copy r32 to r/m32
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//:: jump
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:(scenario jump_mem_at_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 8);
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# op ModR/M SIB displacement immediate
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ff 20 # jump to *EAX
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@ -363,7 +363,7 @@ case 0xff: {
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//:: push
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:(scenario push_mem_at_r32)
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% Reg[0].i = 0x60;
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% Reg[EAX].i = 0x60;
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% write_mem_i32(0x60, 0x000000af);
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% Reg[ESP].u = 0x14;
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# op ModR/M SIB displacement immediate
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|
|
@ -385,7 +385,7 @@ case 6: { // push r/m32 to stack
|
|||
//:: pop
|
||||
|
||||
:(scenario pop_mem_at_r32)
|
||||
% Reg[0].i = 0x60;
|
||||
% Reg[EAX].i = 0x60;
|
||||
% Reg[ESP].u = 0x10;
|
||||
% write_mem_i32(0x10, 0x00000030);
|
||||
# op ModR/M SIB displacement immediate
|
||||
|
|
@ -414,7 +414,7 @@ case 0x8f: { // pop stack into r/m32
|
|||
//:: special-case for loading address from disp32 rather than register
|
||||
|
||||
:(scenario add_r32_to_mem_at_displacement)
|
||||
% Reg[3].i = 0x10; // source
|
||||
% Reg[EBX].i = 0x10; // source
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 1d 60 00 00 00 # add EBX to *0x60
|
||||
|
|
@ -432,8 +432,8 @@ case 5: // exception: mod 0b00 rm 0b101 => incoming disp32
|
|||
//:
|
||||
|
||||
:(scenario add_r32_to_mem_at_r32_plus_disp8)
|
||||
% Reg[3].i = 0x10; // source
|
||||
% Reg[0].i = 0x5e; // dest
|
||||
% Reg[EBX].i = 0x10; // source
|
||||
% Reg[EAX].i = 0x5e; // dest
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 58 02 # add EBX to *(EAX+2)
|
||||
|
|
@ -459,8 +459,8 @@ case 1: // indirect + disp8 addressing
|
|||
break;
|
||||
|
||||
:(scenario add_r32_to_mem_at_r32_plus_negative_disp8)
|
||||
% Reg[3].i = 0x10; // source
|
||||
% Reg[0].i = 0x61; // dest
|
||||
% Reg[EBX].i = 0x10; // source
|
||||
% Reg[EAX].i = 0x61; // dest
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 58 ff # add EBX to *(EAX-1)
|
||||
|
|
@ -473,8 +473,8 @@ case 1: // indirect + disp8 addressing
|
|||
//:
|
||||
|
||||
:(scenario add_r32_to_mem_at_r32_plus_disp32)
|
||||
% Reg[3].i = 0x10; // source
|
||||
% Reg[0].i = 0x5e; // dest
|
||||
% Reg[EBX].i = 0x10; // source
|
||||
% Reg[EAX].i = 0x5e; // dest
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 98 02 00 00 00 # add EBX to *(EAX+2)
|
||||
|
|
@ -500,8 +500,8 @@ case 2: // indirect + disp32 addressing
|
|||
break;
|
||||
|
||||
:(scenario add_r32_to_mem_at_r32_plus_negative_disp32)
|
||||
% Reg[3].i = 0x10; // source
|
||||
% Reg[0].i = 0x61; // dest
|
||||
% Reg[EBX].i = 0x10; // source
|
||||
% Reg[EAX].i = 0x61; // dest
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 98 ff ff ff ff # add EBX to *(EAX-1)
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
//: instructions that (immediately) contain an argument to act with
|
||||
|
||||
:(scenario add_imm32_to_r32)
|
||||
% Reg[3].i = 1;
|
||||
% Reg[EBX].i = 1;
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 c3 0a 0b 0c 0d # add 0x0d0c0b0a to EBX
|
||||
# ModR/M in binary: 11 (direct mode) 000 (add imm32) 011 (dest EBX)
|
||||
|
|
@ -33,7 +33,7 @@ case 0x81: { // combine imm32 with r/m32
|
|||
//:
|
||||
|
||||
:(scenario add_imm32_to_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Reg[EBX].i = 0x60;
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 03 0a 0b 0c 0d # add 0x0d0c0b0a to *EBX
|
||||
|
|
@ -63,7 +63,7 @@ case 0x2d: { // subtract imm32 from EAX
|
|||
//:
|
||||
|
||||
:(scenario subtract_imm32_from_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Reg[EBX].i = 0x60;
|
||||
% write_mem_i32(0x60, 10);
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 2b 01 00 00 00 # subtract 1 from *EBX
|
||||
|
|
@ -83,7 +83,7 @@ case 5: {
|
|||
//:
|
||||
|
||||
:(scenario subtract_imm32_from_r32)
|
||||
% Reg[3].i = 10;
|
||||
% Reg[EBX].i = 10;
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 eb 01 00 00 00 # subtract 1 from EBX
|
||||
# ModR/M in binary: 11 (direct mode) 101 (subtract imm32) 011 (dest EBX)
|
||||
|
|
@ -112,7 +112,7 @@ case 0x25: { // and imm32 with EAX
|
|||
//:
|
||||
|
||||
:(scenario and_imm32_with_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Reg[EBX].i = 0x60;
|
||||
% write_mem_i32(0x60, 0x000000ff);
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 23 0a 0b 0c 0d # and 0x0d0c0b0a with *EBX
|
||||
|
|
@ -132,7 +132,7 @@ case 4: {
|
|||
//:
|
||||
|
||||
:(scenario and_imm32_with_r32)
|
||||
% Reg[3].i = 0xff;
|
||||
% Reg[EBX].i = 0xff;
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 e3 0a 0b 0c 0d # and 0x0d0c0b0a with EBX
|
||||
# ModR/M in binary: 11 (direct mode) 100 (and imm32) 011 (dest EBX)
|
||||
|
|
@ -161,7 +161,7 @@ case 0x0d: { // or imm32 with EAX
|
|||
//:
|
||||
|
||||
:(scenario or_imm32_with_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Reg[EBX].i = 0x60;
|
||||
% write_mem_i32(0x60, 0xd0c0b0a0);
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 0b 0a 0b 0c 0d # or 0x0d0c0b0a with *EBX
|
||||
|
|
@ -179,7 +179,7 @@ case 1: {
|
|||
}
|
||||
|
||||
:(scenario or_imm32_with_r32)
|
||||
% Reg[3].i = 0xd0c0b0a0;
|
||||
% Reg[EBX].i = 0xd0c0b0a0;
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 cb 0a 0b 0c 0d # or 0x0d0c0b0a with EBX
|
||||
# ModR/M in binary: 11 (direct mode) 001 (or imm32) 011 (dest EBX)
|
||||
|
|
@ -208,7 +208,7 @@ case 0x35: { // xor imm32 with EAX
|
|||
//:
|
||||
|
||||
:(scenario xor_imm32_with_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Reg[EBX].i = 0x60;
|
||||
% write_mem_i32(0x60, 0xd0c0b0a0);
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 33 0a 0b 0c 0d # xor 0x0d0c0b0a with *EBX
|
||||
|
|
@ -226,7 +226,7 @@ case 6: {
|
|||
}
|
||||
|
||||
:(scenario xor_imm32_with_r32)
|
||||
% Reg[3].i = 0xd0c0b0a0;
|
||||
% Reg[EBX].i = 0xd0c0b0a0;
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 f3 0a 0b 0c 0d # xor 0x0d0c0b0a with EBX
|
||||
# ModR/M in binary: 11 (direct mode) 110 (xor imm32) 011 (dest EBX)
|
||||
|
|
@ -238,7 +238,7 @@ case 6: {
|
|||
//:: compare (cmp)
|
||||
|
||||
:(scenario compare_imm32_with_eax_greater)
|
||||
% Reg[0].i = 0x0d0c0b0a;
|
||||
% Reg[EAX].i = 0x0d0c0b0a;
|
||||
# op ModR/M SIB displacement immediate
|
||||
3d 07 0b 0c 0d # compare 0x0d0c0b07 with EAX
|
||||
+run: compare EAX and imm32 0x0d0c0b07
|
||||
|
|
@ -259,14 +259,14 @@ case 0x3d: { // subtract imm32 from EAX
|
|||
}
|
||||
|
||||
:(scenario compare_imm32_with_eax_lesser)
|
||||
% Reg[0].i = 0x0d0c0b07;
|
||||
% Reg[EAX].i = 0x0d0c0b07;
|
||||
# op ModR/M SIB displacement immediate
|
||||
3d 0a 0b 0c 0d # compare 0x0d0c0b0a with EAX
|
||||
+run: compare EAX and imm32 0x0d0c0b0a
|
||||
+run: SF=1; ZF=0; OF=0
|
||||
|
||||
:(scenario compare_imm32_with_eax_equal)
|
||||
% Reg[0].i = 0x0d0c0b0a;
|
||||
% Reg[EAX].i = 0x0d0c0b0a;
|
||||
# op ModR/M SIB displacement immediate
|
||||
3d 0a 0b 0c 0d # compare 0x0d0c0b0a with EAX
|
||||
+run: compare EAX and imm32 0x0d0c0b0a
|
||||
|
|
@ -275,7 +275,7 @@ case 0x3d: { // subtract imm32 from EAX
|
|||
//:
|
||||
|
||||
:(scenario compare_imm32_with_r32_greater)
|
||||
% Reg[3].i = 0x0d0c0b0a;
|
||||
% Reg[EBX].i = 0x0d0c0b0a;
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 fb 07 0b 0c 0d # compare 0x0d0c0b07 with EBX
|
||||
# ModR/M in binary: 11 (direct mode) 111 (compare imm32) 011 (dest EBX)
|
||||
|
|
@ -296,7 +296,7 @@ case 7: {
|
|||
}
|
||||
|
||||
:(scenario compare_imm32_with_r32_lesser)
|
||||
% Reg[3].i = 0x0d0c0b07;
|
||||
% Reg[EBX].i = 0x0d0c0b07;
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 fb 0a 0b 0c 0d # compare 0x0d0c0b0a with EBX
|
||||
# ModR/M in binary: 11 (direct mode) 111 (compare imm32) 011 (dest EBX)
|
||||
|
|
@ -305,7 +305,7 @@ case 7: {
|
|||
+run: SF=1; ZF=0; OF=0
|
||||
|
||||
:(scenario compare_imm32_with_r32_equal)
|
||||
% Reg[3].i = 0x0d0c0b0a;
|
||||
% Reg[EBX].i = 0x0d0c0b0a;
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 fb 0a 0b 0c 0d # compare 0x0d0c0b0a with EBX
|
||||
# ModR/M in binary: 11 (direct mode) 111 (compare imm32) 011 (dest EBX)
|
||||
|
|
@ -314,7 +314,7 @@ case 7: {
|
|||
+run: SF=0; ZF=1; OF=0
|
||||
|
||||
:(scenario compare_imm32_with_mem_at_r32_greater)
|
||||
% Reg[3].i = 0x60;
|
||||
% Reg[EBX].i = 0x60;
|
||||
% write_mem_i32(0x60, 0x0d0c0b0a);
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 3b 07 0b 0c 0d # compare 0x0d0c0b07 with *EBX
|
||||
|
|
@ -324,7 +324,7 @@ case 7: {
|
|||
+run: SF=0; ZF=0; OF=0
|
||||
|
||||
:(scenario compare_imm32_with_mem_at_r32_lesser)
|
||||
% Reg[3].i = 0x60;
|
||||
% Reg[EBX].i = 0x60;
|
||||
% write_mem_i32(0x60, 0x0d0c0b07);
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 3b 0a 0b 0c 0d # compare 0x0d0c0b0a with *EBX
|
||||
|
|
@ -334,8 +334,8 @@ case 7: {
|
|||
+run: SF=1; ZF=0; OF=0
|
||||
|
||||
:(scenario compare_imm32_with_mem_at_r32_equal)
|
||||
% Reg[3].i = 0x0d0c0b0a;
|
||||
% Reg[3].i = 0x60;
|
||||
% Reg[EBX].i = 0x0d0c0b0a;
|
||||
% Reg[EBX].i = 0x60;
|
||||
% write_mem_i32(0x60, 0x0d0c0b0a);
|
||||
# op ModR/M SIB displacement immediate
|
||||
81 3b 0a 0b 0c 0d # compare 0x0d0c0b0a with *EBX
|
||||
|
|
@ -370,7 +370,7 @@ case 0xbf: { // copy imm32 to r32
|
|||
//:
|
||||
|
||||
:(scenario copy_imm32_to_mem_at_r32)
|
||||
% Reg[3].i = 0x60;
|
||||
% Reg[EBX].i = 0x60;
|
||||
# op ModR/M SIB displacement immediate
|
||||
c7 03 0a 0b 0c 0d # copy 0x0d0c0b0a to *EBX
|
||||
# ModR/M in binary: 00 (indirect mode) 000 (unused) 011 (dest EBX)
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
//: operating on memory at the address provided by some register plus optional scale and offset
|
||||
|
||||
:(scenario add_r32_to_mem_at_r32_with_sib)
|
||||
% Reg[3].i = 0x10;
|
||||
% Reg[0].i = 0x60;
|
||||
% Reg[EBX].i = 0x10;
|
||||
% Reg[EAX].i = 0x60;
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 1c 20 # add EBX to *EAX
|
||||
|
|
@ -45,9 +45,9 @@ uint32_t effective_address_from_sib(uint8_t mod) {
|
|||
}
|
||||
|
||||
:(scenario add_r32_to_mem_at_base_r32_index_r32)
|
||||
% Reg[3].i = 0x10; // source
|
||||
% Reg[0].i = 0x5e; // dest base
|
||||
% Reg[1].i = 0x2; // dest index
|
||||
% Reg[EBX].i = 0x10; // source
|
||||
% Reg[EAX].i = 0x5e; // dest base
|
||||
% Reg[ECX].i = 0x2; // dest index
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 1c 08 # add EBX to *(EAX+ECX)
|
||||
|
|
@ -59,7 +59,7 @@ uint32_t effective_address_from_sib(uint8_t mod) {
|
|||
+run: storing 0x00000011
|
||||
|
||||
:(scenario add_r32_to_mem_at_displacement_using_sib)
|
||||
% Reg[3].i = 0x10; // source
|
||||
% Reg[EBX].i = 0x10; // source
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 1c 25 60 00 00 00 # add EBX to *0x60
|
||||
|
|
@ -73,9 +73,9 @@ uint32_t effective_address_from_sib(uint8_t mod) {
|
|||
//:
|
||||
|
||||
:(scenario add_r32_to_mem_at_base_r32_index_r32_plus_disp8)
|
||||
% Reg[3].i = 0x10; // source
|
||||
% Reg[0].i = 0x59; // dest base
|
||||
% Reg[1].i = 0x5; // dest index
|
||||
% Reg[EBX].i = 0x10; // source
|
||||
% Reg[EAX].i = 0x59; // dest base
|
||||
% Reg[ECX].i = 0x5; // dest index
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 5c 08 02 # add EBX to *(EAX+ECX+2)
|
||||
|
|
@ -95,9 +95,9 @@ case 4: // exception: mod 0b01 rm 0b100 => incoming SIB (scale-index-base) byte
|
|||
//:
|
||||
|
||||
:(scenario add_r32_to_mem_at_base_r32_index_r32_plus_disp32)
|
||||
% Reg[3].i = 0x10; // source
|
||||
% Reg[0].i = 0x59; // dest base
|
||||
% Reg[1].i = 0x5; // dest index
|
||||
% Reg[EBX].i = 0x10; // source
|
||||
% Reg[EAX].i = 0x59; // dest base
|
||||
% Reg[ECX].i = 0x5; // dest index
|
||||
% write_mem_i32(0x60, 1);
|
||||
# op ModR/M SIB displacement immediate
|
||||
01 9c 08 02 00 00 00 # add EBX to *(EAX+ECX+2)
|
||||
|
|
|
|||
Loading…
Reference in New Issue