128 lines
3.7 KiB
C++
128 lines
3.7 KiB
C++
//: operating directly on a register
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:(scenario add_r32_to_r32)
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% Reg[0].i = 0x10;
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% Reg[3].i = 1;
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# op ModR/M SIB displacement immediate
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01 d8 # add EBX (reg 3) to EAX (reg 0)
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+run: add reg 3 to effective address
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+run: effective address is reg 0
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+run: storing 0x00000011
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:(before "End Single-Byte Opcodes")
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case 0x01: { // add r32 to r/m32
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uint8_t modrm = next();
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uint8_t arg2 = (modrm>>3)&0x7;
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trace(2, "run") << "add reg " << NUM(arg2) << " to effective address" << end();
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int32_t* arg1 = effective_address(modrm);
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BINARY_ARITHMETIC_OP(+, *arg1, Reg[arg2].i);
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break;
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}
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:(code)
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// Implement tables 2-2 and 2-3 in the Intel manual, Volume 2.
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// We return a pointer so that instructions can write to multiple bytes in
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// 'Mem' at once.
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int32_t* effective_address(uint8_t modrm) {
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uint8_t mod = (modrm>>6);
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// ignore middle 3 'reg opcode' bits
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uint8_t rm = modrm & 0x7;
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int32_t* result = 0;
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switch (mod) {
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case 3:
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// mod 3 is just register direct addressing
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trace(2, "run") << "effective address is reg " << NUM(rm) << end();
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result = &Reg[rm].i;
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break;
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// End Mod Special-cases
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default:
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cerr << "unrecognized mod bits: " << NUM(mod) << '\n';
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exit(1);
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}
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return result;
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}
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//:: subtract
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:(scenario subtract_r32_from_r32)
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% Reg[0].i = 10;
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% Reg[3].i = 1;
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# op ModR/M SIB displacement immediate
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29 d8 # subtract EBX (reg 3) from EAX (reg 0)
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+run: subtract reg 3 from effective address
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+run: effective address is reg 0
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+run: storing 0x00000009
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:(before "End Single-Byte Opcodes")
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case 0x29: { // subtract r32 from r/m32
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uint8_t modrm = next();
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uint8_t arg2 = (modrm>>3)&0x7;
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trace(2, "run") << "subtract reg " << NUM(arg2) << " from effective address" << end();
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int32_t* arg1 = effective_address(modrm);
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BINARY_ARITHMETIC_OP(-, *arg1, Reg[arg2].i);
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break;
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}
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//:: and
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:(scenario and_r32_with_r32)
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% Reg[0].i = 0x0a0b0c0d;
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% Reg[3].i = 0x000000ff;
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# op ModR/M SIB displacement immediate
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21 d8 # and EBX (reg 3) with destination EAX (reg 0)
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+run: and reg 3 with effective address
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+run: effective address is reg 0
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+run: storing 0x0000000d
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:(before "End Single-Byte Opcodes")
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case 0x21: { // and r32 with r/m32
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uint8_t modrm = next();
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uint8_t arg2 = (modrm>>3)&0x7;
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trace(2, "run") << "and reg " << NUM(arg2) << " with effective address" << end();
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int32_t* arg1 = effective_address(modrm);
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BINARY_BITWISE_OP(&, *arg1, Reg[arg2].u);
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break;
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}
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//:: or
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:(scenario or_r32_with_r32)
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% Reg[0].i = 0x0a0b0c0d;
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% Reg[3].i = 0xa0b0c0d0;
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# op ModR/M SIB displacement immediate
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09 d8 # or EBX (reg 3) with destination EAX (reg 0)
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+run: or reg 3 with effective address
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+run: effective address is reg 0
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+run: storing 0xaabbccdd
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:(before "End Single-Byte Opcodes")
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case 0x09: { // or r32 with r/m32
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uint8_t modrm = next();
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uint8_t arg2 = (modrm>>3)&0x7;
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trace(2, "run") << "or reg " << NUM(arg2) << " with effective address" << end();
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int32_t* arg1 = effective_address(modrm);
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BINARY_BITWISE_OP(|, *arg1, Reg[arg2].u);
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break;
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}
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//:: xor
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:(scenario xor_r32_with_r32)
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% Reg[0].i = 0x0a0b0c0d;
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% Reg[3].i = 0xaabbc0d0;
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# op ModR/M SIB displacement immediate
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31 d8 # xor EBX (reg 3) with destination EAX (reg 0)
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+run: xor reg 3 with effective address
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+run: effective address is reg 0
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+run: storing 0xa0b0ccdd
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:(before "End Single-Byte Opcodes")
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case 0x31: { // xor r32 with r/m32
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uint8_t modrm = next();
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uint8_t arg2 = (modrm>>3)&0x7;
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trace(2, "run") << "xor reg " << NUM(arg2) << " with effective address" << end();
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int32_t* arg1 = effective_address(modrm);
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BINARY_BITWISE_OP(^, *arg1, Reg[arg2].u);
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break;
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}
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