391 lines
12 KiB
C++
391 lines
12 KiB
C++
//: instructions that (immediately) contain an argument to act with
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:(scenario add_imm32_to_r32)
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% Reg[3].i = 1;
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# op ModRM SIB displacement immediate
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81 c3 0a 0b 0c 0d # add 0x0d0c0b0a to EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is reg 3
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+run: subop add
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+run: storing 0x0d0c0b0b
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:(before "End Single-Byte Opcodes")
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case 0x81: { // combine imm32 with r/m32
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uint8_t modrm = next();
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int32_t arg2 = imm32();
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trace(2, "run") << "combine imm32 0x" << HEXWORD << arg2 << " with effective address" << end();
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int32_t* arg1 = effective_address(modrm);
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uint8_t subop = (modrm>>3)&0x7; // middle 3 'reg opcode' bits
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switch (subop) {
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case 0:
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trace(2, "run") << "subop add" << end();
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BINARY_ARITHMETIC_OP(+, *arg1, arg2);
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break;
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// End Op 81 Subops
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default:
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cerr << "unrecognized sub-opcode after 81: " << NUM(subop) << '\n';
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exit(1);
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}
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break;
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}
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//:
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:(scenario add_imm32_to_mem_at_r32)
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% Reg[3].i = 0x60;
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% SET_WORD_IN_MEM(0x60, 1);
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# op ModR/M SIB displacement immediate
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81 03 0a 0b 0c 0d # add 0x0d0c0b0a to *EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is mem at address 0x60 (reg 3)
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+run: subop add
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+run: storing 0x0d0c0b0b
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//:: subtract
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:(scenario subtract_imm32_from_eax)
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% Reg[EAX].i = 0x0d0c0baa;
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# op ModR/M SIB displacement immediate
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2d 0a 0b 0c 0d # subtract 0x0d0c0b0a from EAX (reg 0)
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+run: subtract imm32 0x0d0c0b0a from reg EAX
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+run: storing 0x000000a0
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:(before "End Single-Byte Opcodes")
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case 0x2d: { // subtract imm32 from EAX
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int32_t arg2 = imm32();
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trace(2, "run") << "subtract imm32 0x" << HEXWORD << arg2 << " from reg EAX" << end();
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BINARY_ARITHMETIC_OP(-, Reg[EAX].i, arg2);
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break;
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}
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//:
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:(scenario subtract_imm32_from_mem_at_r32)
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% Reg[3].i = 0x60;
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% SET_WORD_IN_MEM(0x60, 10);
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# op ModRM SIB displacement immediate
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81 2b 01 00 00 00 # subtract 1 from *EBX (reg 3)
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+run: combine imm32 0x00000001 with effective address
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+run: effective address is mem at address 0x60 (reg 3)
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+run: subop subtract
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+run: storing 0x00000009
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//:
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:(scenario subtract_imm32_from_r32)
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% Reg[3].i = 10;
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# op ModRM SIB displacement immediate
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81 eb 01 00 00 00 # subtract 1 from EBX (reg 3)
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+run: combine imm32 0x00000001 with effective address
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+run: effective address is reg 3
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+run: subop subtract
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+run: storing 0x00000009
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:(before "End Op 81 Subops")
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case 5: {
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trace(2, "run") << "subop subtract" << end();
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BINARY_ARITHMETIC_OP(-, *arg1, arg2);
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break;
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}
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//:: and
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:(scenario and_imm32_with_eax)
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% Reg[EAX].i = 0xff;
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# op ModR/M SIB displacement immediate
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25 0a 0b 0c 0d # and 0x0d0c0b0a with EAX (reg 0)
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+run: and imm32 0x0d0c0b0a with reg EAX
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+run: storing 0x0000000a
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:(before "End Single-Byte Opcodes")
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case 0x25: { // and imm32 with EAX
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int32_t arg2 = imm32();
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trace(2, "run") << "and imm32 0x" << HEXWORD << arg2 << " with reg EAX" << end();
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BINARY_BITWISE_OP(&, Reg[EAX].i, arg2);
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break;
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}
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//:
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:(scenario and_imm32_with_mem_at_r32)
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% Reg[3].i = 0x60;
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% SET_WORD_IN_MEM(0x60, 0x000000ff);
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# op ModRM SIB displacement immediate
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81 23 0a 0b 0c 0d # and 0x0d0c0b0a with *EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is mem at address 0x60 (reg 3)
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+run: subop and
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+run: storing 0x0000000a
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//:
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:(scenario and_imm32_with_r32)
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% Reg[3].i = 0xff;
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# op ModRM SIB displacement immediate
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81 e3 0a 0b 0c 0d # and 0x0d0c0b0a with EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is reg 3
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+run: subop and
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+run: storing 0x0000000a
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:(before "End Op 81 Subops")
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case 4: {
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trace(2, "run") << "subop and" << end();
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BINARY_BITWISE_OP(&, *arg1, arg2);
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break;
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}
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//:: or
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:(scenario or_imm32_with_eax)
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% Reg[EAX].i = 0xd0c0b0a0;
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# op ModR/M SIB displacement immediate
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0d 0a 0b 0c 0d # or 0x0d0c0b0a with EAX (reg 0)
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+run: or imm32 0x0d0c0b0a with reg EAX
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+run: storing 0xddccbbaa
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:(before "End Single-Byte Opcodes")
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case 0x0d: { // or imm32 with EAX
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int32_t arg2 = imm32();
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trace(2, "run") << "or imm32 0x" << HEXWORD << arg2 << " with reg EAX" << end();
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BINARY_BITWISE_OP(|, Reg[EAX].i, arg2);
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break;
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}
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//:
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:(scenario or_imm32_with_mem_at_r32)
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% Reg[3].i = 0x60;
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% SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);
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# op ModRM SIB displacement immediate
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81 0b 0a 0b 0c 0d # or 0x0d0c0b0a with *EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is mem at address 0x60 (reg 3)
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+run: subop or
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+run: storing 0xddccbbaa
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//:
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:(scenario or_imm32_with_r32)
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% Reg[3].i = 0xd0c0b0a0;
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# op ModRM SIB displacement immediate
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81 cb 0a 0b 0c 0d # or 0x0d0c0b0a with EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is reg 3
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+run: subop or
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+run: storing 0xddccbbaa
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:(before "End Op 81 Subops")
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case 1: {
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trace(2, "run") << "subop or" << end();
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BINARY_BITWISE_OP(|, *arg1, arg2);
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break;
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}
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//:: xor
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:(scenario xor_imm32_with_eax)
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% Reg[EAX].i = 0xddccb0a0;
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# op ModR/M SIB displacement immediate
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35 0a 0b 0c 0d # xor 0x0d0c0b0a with EAX (reg 0)
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+run: xor imm32 0x0d0c0b0a with reg EAX
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+run: storing 0xd0c0bbaa
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:(before "End Single-Byte Opcodes")
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case 0x35: { // xor imm32 with EAX
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int32_t arg2 = imm32();
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trace(2, "run") << "xor imm32 0x" << HEXWORD << arg2 << " with reg EAX" << end();
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BINARY_BITWISE_OP(^, Reg[EAX].i, arg2);
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break;
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}
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//:
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:(scenario xor_imm32_with_mem_at_r32)
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% Reg[3].i = 0x60;
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% SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);
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# op ModRM SIB displacement immediate
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81 33 0a 0b 0c 0d # xor 0x0d0c0b0a with *EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is mem at address 0x60 (reg 3)
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+run: subop xor
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+run: storing 0xddccbbaa
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//:
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:(scenario xor_imm32_with_r32)
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% Reg[3].i = 0xd0c0b0a0;
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# op ModRM SIB displacement immediate
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81 f3 0a 0b 0c 0d # xor 0x0d0c0b0a with EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is reg 3
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+run: subop xor
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+run: storing 0xddccbbaa
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:(before "End Op 81 Subops")
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case 6: {
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trace(2, "run") << "subop xor" << end();
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BINARY_BITWISE_OP(^, *arg1, arg2);
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break;
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}
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//:: compare (cmp)
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:(scenario compare_imm32_with_eax_greater)
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% Reg[0].i = 0x0d0c0b0a;
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# op ModRM SIB displacement immediate
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3d 07 0b 0c 0d # compare 0x0d0c0b07 with EAX (reg 0)
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+run: compare reg EAX and imm32 0x0d0c0b07
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+run: SF=0; ZF=0; OF=0
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:(before "End Single-Byte Opcodes")
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case 0x3d: { // subtract imm32 from EAX
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int32_t arg1 = Reg[EAX].i;
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int32_t arg2 = imm32();
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trace(2, "run") << "compare reg EAX and imm32 0x" << HEXWORD << arg2 << end();
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int32_t tmp1 = arg1 - arg2;
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SF = (tmp1 < 0);
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ZF = (tmp1 == 0);
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int64_t tmp2 = arg1 - arg2;
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OF = (tmp1 != tmp2);
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trace(2, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
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break;
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}
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:(scenario compare_imm32_with_eax_lesser)
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% Reg[0].i = 0x0d0c0b07;
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# op ModRM SIB displacement immediate
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3d 0a 0b 0c 0d # compare 0x0d0c0b0a with EAX (reg 0)
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+run: compare reg EAX and imm32 0x0d0c0b0a
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+run: SF=1; ZF=0; OF=0
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:(scenario compare_imm32_with_eax_equal)
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% Reg[0].i = 0x0d0c0b0a;
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# op ModRM SIB displacement immediate
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3d 0a 0b 0c 0d # compare 0x0d0c0b0a with EAX (reg 0)
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+run: compare reg EAX and imm32 0x0d0c0b0a
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+run: SF=0; ZF=1; OF=0
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//:
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:(scenario compare_imm32_with_r32_greater)
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% Reg[3].i = 0x0d0c0b0a;
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# op ModRM SIB displacement immediate
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81 fb 07 0b 0c 0d # compare 0x0d0c0b07 with EBX (reg 3)
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+run: combine imm32 0x0d0c0b07 with effective address
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+run: effective address is reg 3
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+run: SF=0; ZF=0; OF=0
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:(before "End Op 81 Subops")
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case 7: {
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trace(2, "run") << "subop compare" << end();
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int32_t tmp1 = *arg1 - arg2;
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SF = (tmp1 < 0);
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ZF = (tmp1 == 0);
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int64_t tmp2 = *arg1 - arg2;
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OF = (tmp1 != tmp2);
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trace(2, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
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break;
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}
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:(scenario compare_imm32_with_r32_lesser)
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% Reg[3].i = 0x0d0c0b07;
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# op ModRM SIB displacement immediate
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81 fb 0a 0b 0c 0d # compare 0x0d0c0b0a with EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is reg 3
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+run: SF=1; ZF=0; OF=0
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:(scenario compare_imm32_with_r32_equal)
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% Reg[3].i = 0x0d0c0b0a;
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# op ModRM SIB displacement immediate
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81 fb 0a 0b 0c 0d # compare 0x0d0c0b0a with EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is reg 3
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+run: SF=0; ZF=1; OF=0
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:(scenario compare_imm32_with_mem_at_r32_greater)
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% Reg[3].i = 0x60;
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% SET_WORD_IN_MEM(0x60, 0x0d0c0b0a);
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# op ModRM SIB displacement immediate
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81 3b 07 0b 0c 0d # compare 0x0d0c0b07 with *EBX (reg 3)
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+run: combine imm32 0x0d0c0b07 with effective address
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+run: effective address is mem at address 0x60 (reg 3)
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+run: SF=0; ZF=0; OF=0
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:(scenario compare_imm32_with_mem_at_r32_lesser)
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% Reg[3].i = 0x60;
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% SET_WORD_IN_MEM(0x60, 0x0d0c0b07);
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# op ModRM SIB displacement immediate
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81 3b 0a 0b 0c 0d # compare 0x0d0c0b0a with *EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is mem at address 0x60 (reg 3)
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+run: SF=1; ZF=0; OF=0
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:(scenario compare_imm32_with_mem_at_r32_equal)
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% Reg[3].i = 0x0d0c0b0a;
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% Reg[3].i = 0x60;
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% SET_WORD_IN_MEM(0x60, 0x0d0c0b0a);
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# op ModRM SIB displacement immediate
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81 3b 0a 0b 0c 0d # compare 0x0d0c0b0a with *EBX (reg 3)
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+run: combine imm32 0x0d0c0b0a with effective address
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+run: effective address is mem at address 0x60 (reg 3)
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+run: SF=0; ZF=1; OF=0
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//:: copy (mov)
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:(scenario copy_imm32_to_r32)
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# op ModRM SIB displacement immediate
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b8 03 0a 0b 0c 0d # copy 0x0d0c0b0a to EBX (reg 3)
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+run: copy imm32 0x0d0c0b0a to reg 3
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:(before "End Single-Byte Opcodes")
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case 0xb8: { // copy imm32 to r32
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uint8_t modrm = next();
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int32_t arg2 = imm32();
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uint8_t reg1 = modrm&0x7; // ignore mod bits
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trace(2, "run") << "copy imm32 0x" << HEXWORD << arg2 << " to reg " << NUM(reg1) << end();
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Reg[reg1].i = arg2;
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break;
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}
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//:
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:(scenario copy_imm32_to_mem_at_r32)
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% Reg[3].i = 0x60;
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# op ModRM SIB displacement immediate
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c7 03 0a 0b 0c 0d # copy 0x0d0c0b0a to *EBX (reg 3)
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+run: copy imm32 0x0d0c0b0a to effective address
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+run: effective address is mem at address 0x60 (reg 3)
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:(before "End Single-Byte Opcodes")
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case 0xc7: { // copy imm32 to r32
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uint8_t modrm = next();
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int32_t arg2 = imm32();
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trace(2, "run") << "copy imm32 0x" << HEXWORD << arg2 << " to effective address" << end();
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int32_t* arg1 = effective_address(modrm);
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*arg1 = arg2;
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break;
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}
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//:: push
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:(scenario push_imm32)
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% Reg[ESP].u = 0x14;
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# op ModRM SIB displacement immediate
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68 af 00 00 00 # push *EAX (reg 0) to stack
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+run: push imm32 0x000000af
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+run: ESP is now 0x00000010
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+run: contents at ESP: 0x000000af
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:(before "End Single-Byte Opcodes")
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case 0x68: {
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int32_t val = imm32();
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trace(2, "run") << "push imm32 0x" << HEXWORD << val << end();
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Reg[ESP].u -= 4;
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*reinterpret_cast<uint32_t*>(&Mem.at(Reg[ESP].u)) = val;
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trace(2, "run") << "ESP is now 0x" << HEXWORD << Reg[ESP].u << end();
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trace(2, "run") << "contents at ESP: 0x" << HEXWORD << *reinterpret_cast<uint32_t*>(&Mem.at(Reg[ESP].u)) << end();
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break;
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}
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