Julin S 0de0726474 | ||
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.. | ||
2b-down-counter | ||
2b-timer | ||
2b-up-counter | ||
2b-up-counter-gaisler | ||
cla-adder | ||
comparator | ||
formal | ||
half-adder | ||
mux | ||
record_inputs | ||
ripple-ca | ||
README.org |
README.org
VHDL
From 2021-2022..
- /famubu/playground/src/branch/master/vhdl/2b-down-counter: 2b down counter
- /famubu/playground/src/branch/master/vhdl/2b-timer: 2b timer
- /famubu/playground/src/branch/master/vhdl/2b-up-counter: 2b up counter
- /famubu/playground/src/branch/master/vhdl/2b-up-counter-gaisler: 2b down counter (Gaisler style)
- /famubu/playground/src/branch/master/vhdl/cla-adder: 4b carry-lookahead adder
- /famubu/playground/src/branch/master/vhdl/comparator: A comparator
- /famubu/playground/src/branch/master/vhdl/half-adder: Half adder
- /famubu/playground/src/branch/master/vhdl/ripple-ca: 4b ripple carry adder
- /famubu/playground/src/branch/master/vhdl/mux: 2:1 MUX
- /famubu/playground/src/branch/master/vhdl/record_inputs: using a record as input type
#delay #delay2 #enum #gcd #merge-dff #port_map-mod #vcd-record #weird-clock #rv #subtractor