playground/vhdl/formal/Makefile

22 lines
505 B
Makefile

NAME = ripple-ca
GHDL_SO = /nix/store/z2qrc057pjbxcpbbsgz8f46wk0yv45b3-yosys-ghdl-2021.01.25/share/yosys/plugins/ghdl.so
build: $(NAME).vhdl $(NAME)-tb.vhdl
ghdl -a --std=08 $(NAME).vhdl
ghdl -a --std=08 $(NAME)-tb.vhdl
ghdl -e --std=08 rca_tb_e
PHONY: sim clean
clean:
rm -rf dump.vcd *.cf
sim:
ghdl -r --std=08 rca_tb_e --vcd=dump.vcd --stop-time=100ns
sby: psl_symbio.sby
sby --yosys "yosys -m $(GHDL_SO)" -f psl_symbio.sby
vcd: dump.vcd
~/Downloads/vcd-x86_64-linux-gnu-220131 < dump.vcd