Created include in i386, tables -> dt
This commit is contained in:
lucic71
parent
1c7483925c
commit
aea8d99518
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@ -1,6 +1,4 @@
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#include "idt.h"
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#include "types/idt_types.h"
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#include "i386/idt.h"
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/* Data structures used to fill the IDT. */
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@ -1,11 +1,11 @@
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#ifndef TABLES_ISR_TYPES_H_
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#define TABLES_ISR_TYPES_H_
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#ifndef CONTEXT_H_
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#define CONTEXT_H_
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#include "stdint.h"
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#include <stdint.h>
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/* register_t - data type containg the context before calling an ISR. */
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/* register_t - data type containg the context before calling an ISR or IRQ. */
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struct registers {
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struct context {
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uint32_t ds;
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uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax;
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@ -14,6 +14,6 @@ struct registers {
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} __attribute__((packed));
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typedef struct registers register_t;
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typedef struct context context_t;
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#endif
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@ -1,13 +1,9 @@
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#ifndef INTRPT_IDT_H_
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#define INTRPT_IDT_H_
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#ifndef INTRPT_H_
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#define INTRPT_H_
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#include "stdint.h"
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#include <stdint.h>
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/*
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* idt_entry_t - entry in Interrupt Descriptor Table
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* idt_set_gate - creates an IDT entry
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*
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*/
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/* idt_entry_t - entry in Interrupt Descriptor Table */
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struct idt_entry_struct {
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@ -21,6 +17,15 @@ struct idt_entry_struct {
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typedef struct idt_entry_struct idt_entry_t;
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/*
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* idt_set_gate:
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* Creates an IDT entry
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*
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* @oaram base - Base of the IDT entry
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* @param sel - Segment selector
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* @param flags - Flags
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*
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*/
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static inline idt_entry_t idt_set_gate(uint32_t base, uint16_t sel, uint8_t flags) {
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@ -35,6 +40,7 @@ static inline idt_entry_t idt_set_gate(uint32_t base, uint16_t sel, uint8_t flag
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return entry;
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}
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/* idt_ptr_t - IDT pointer that will be loaded in CPU */
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struct idt_ptr_struct {
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@ -46,4 +52,13 @@ struct idt_ptr_struct {
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typedef struct idt_ptr_struct idt_ptr_t;
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/*
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* idt_init:
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* Creates an array of 256 empty entries that will be loaded in the CPU as
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* an IDT.
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*
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*/
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void idt_init(void);
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#endif
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@ -0,0 +1,45 @@
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#ifndef IRQ_H_
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#define IRQ_H_
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#include "context.h"
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#define IRQ0 32
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#define IRQ1 33
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#define IRQ2 34
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#define IRQ3 35
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#define IRQ4 36
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#define IRQ5 37
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#define IRQ6 38
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#define IRQ7 39
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#define IRQ8 40
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#define IRQ9 41
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#define IRQ10 42
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#define IRQ11 43
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#define IRQ12 44
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#define IRQ13 45
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#define IRQ14 46
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#define IRQ15 47
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/*
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* irq_init:
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* Initializes the PIC and puts pointers to IRQ gates in IDT.
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*
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*/
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void irq_init(void);
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/* Function typedef for IRQ handlers. */
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typedef void (*irq_t)(context_t);
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/*
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* register_irq:
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* Creates a handler for an IRQ with IRQ number irq_no.
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*
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* @param irq_no - IRQ number
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*
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*/
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void register_irq(uint8_t irq_no, irq_t handler);
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#endif
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@ -0,0 +1,62 @@
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#ifndef PIC_H_
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#define PIC_H_
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#include <stdint.h>
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#include "lib/memio.h"
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/* Master and slave PIC I/O ports. */
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#define PIC1 0x20
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#define PIC2 0xA0
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/* Command and data port for each PIC. */
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#define PIC1_COMMAND PIC1
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#define PIC1_DATA (PIC1 + 1)
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#define PIC2_COMMAND PIC2
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#define PIC2_DATA (PIC2 + 1)
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/* PIC Initialization Command Words. */
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#define ICW1_ICW4 0x01
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#define ICW1_SINGLE 0X02
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#define ICW1_INTERVAL4 0x04
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#define ICW1_LEVEL 0X08
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#define ICW1_INIT 0X10
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#define ICW3_SLAVE_IRQ 0x04
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#define ICW3_SLAVE_ID 0X02
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#define ICW4_8086 0x01
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#define ICW4_AUTO 0x02
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#define ICW4_BUF_SLAVE 0x08
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#define ICW4_BUF_MASTER 0x0C
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#define ICW4_SFNM 0x10
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/* End of Interrupt. */
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#define PIC_EOI 0X20
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/*
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* pic_remap:
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* Initializes and remaps the master and slave PICs.
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*
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* @param offset1 - offset for master PIC in IDT
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* @param offset2 - offset for slave PIC in IDT
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*
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*/
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void pic_remap(uint8_t offset1, uint8_t offset2);
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/*
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* pic_send_eoi:
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* Sends EOI signal to PICs.
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*
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* @param irq - IRQ number
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*
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*/
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void pic_send_eoi(uint8_t irq);
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#endif
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@ -1,13 +0,0 @@
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#ifndef INTRPT_H_
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#define INTRPT_H_
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/*
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* idt_init:
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* Creates an array of 256 empty entries that will be loaded in the CPU as
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* an IDT.
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*
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*/
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void idt_init(void);
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#endif
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@ -1,143 +0,0 @@
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#include "isr.h"
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#include "idt.h"
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#include "types/idt_types.h"
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#include "types/isr_types.h"
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#include <stdio.h>
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#include <stdint.h>
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/* Extern symbol defined in idt.c */
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extern idt_entry_t idt_entries[256];
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/* External Interrupt Service Routines. */
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extern void isr0();
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extern void isr1();
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extern void isr2();
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extern void isr3();
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extern void isr4();
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extern void isr5();
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extern void isr6();
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extern void isr7();
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extern void isr8();
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extern void isr9();
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extern void isr10();
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extern void isr11();
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extern void isr12();
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extern void isr13();
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extern void isr14();
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extern void isr15();
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extern void isr16();
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extern void isr17();
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extern void isr18();
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extern void isr19();
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extern void isr20();
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extern void isr21();
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extern void isr22();
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extern void isr23();
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extern void isr24();
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extern void isr25();
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extern void isr26();
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extern void isr27();
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extern void isr28();
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extern void isr29();
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extern void isr30();
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extern void isr31();
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/*
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* isr_init:
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* ---------
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*
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* Fill the first 32 entries in IDT.
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*
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*/
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void isr_init(void) {
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idt_entries[0] = idt_set_gate((uint32_t) isr0, 0x08, 0x8E);
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idt_entries[1] = idt_set_gate((uint32_t) isr1, 0x08, 0x8E);
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idt_entries[2] = idt_set_gate((uint32_t) isr2, 0x08, 0x8E);
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idt_entries[3] = idt_set_gate((uint32_t) isr3, 0x08, 0x8E);
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idt_entries[4] = idt_set_gate((uint32_t) isr4, 0x08, 0x8E);
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idt_entries[5] = idt_set_gate((uint32_t) isr5, 0x08, 0x8E);
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idt_entries[6] = idt_set_gate((uint32_t) isr6, 0x08, 0x8E);
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idt_entries[7] = idt_set_gate((uint32_t) isr7, 0x08, 0x8E);
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idt_entries[8] = idt_set_gate((uint32_t) isr8, 0x08, 0x8E);
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idt_entries[9] = idt_set_gate((uint32_t) isr9, 0x08, 0x8E);
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idt_entries[10] = idt_set_gate( (uint32_t) isr10, 0x08, 0x8E);
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idt_entries[11] = idt_set_gate( (uint32_t) isr11, 0x08, 0x8E);
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idt_entries[12] = idt_set_gate( (uint32_t) isr12, 0x08, 0x8E);
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idt_entries[13] = idt_set_gate( (uint32_t) isr13, 0x08, 0x8E);
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idt_entries[14] = idt_set_gate( (uint32_t) isr14, 0x08, 0x8E);
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idt_entries[15] = idt_set_gate( (uint32_t) isr15, 0x08, 0x8E);
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idt_entries[16] = idt_set_gate( (uint32_t) isr16, 0x08, 0x8E);
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idt_entries[17] = idt_set_gate( (uint32_t) isr17, 0x08, 0x8E);
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idt_entries[18] = idt_set_gate( (uint32_t) isr18, 0x08, 0x8E);
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idt_entries[19] = idt_set_gate( (uint32_t) isr19, 0x08, 0x8E);
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idt_entries[20] = idt_set_gate( (uint32_t) isr20, 0x08, 0x8E);
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idt_entries[21] = idt_set_gate( (uint32_t) isr21, 0x08, 0x8E);
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idt_entries[22] = idt_set_gate( (uint32_t) isr22, 0x08, 0x8E);
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idt_entries[23] = idt_set_gate( (uint32_t) isr23, 0x08, 0x8E);
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idt_entries[24] = idt_set_gate( (uint32_t) isr24, 0x08, 0x8E);
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idt_entries[25] = idt_set_gate( (uint32_t) isr25, 0x08, 0x8E);
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idt_entries[26] = idt_set_gate( (uint32_t) isr26, 0x08, 0x8E);
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idt_entries[27] = idt_set_gate( (uint32_t) isr27, 0x08, 0x8E);
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idt_entries[28] = idt_set_gate( (uint32_t) isr28, 0x08, 0x8E);
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idt_entries[29] = idt_set_gate( (uint32_t) isr29, 0x08, 0x8E);
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idt_entries[30] = idt_set_gate( (uint32_t) isr30, 0x08, 0x8E);
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idt_entries[31] = idt_set_gate( (uint32_t) isr31, 0x08, 0x8E);
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}
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/* Exception messages for unhandled faults. */
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char *exception_messages[] = {
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"Division by zero",
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"Debug",
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"Non-maskable interrupt",
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"Breakpoint",
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"Detected overflow",
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"Out-of-bounds",
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"Invalid opcode",
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"No coprocessor",
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"Double fault",
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"Coprocessor segment overrun",
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"Bad TSS",
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"Segment not present",
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"Stack fault",
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"General protection fault",
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"Page fault",
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"Unknown interrupt",
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"Coprocessor fault",
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"Alignment check",
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"Machine check",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved"
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};
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/* isr_handler:
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* Handles an incomming request by calling the appropiate handler or printing
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* an exception message.
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*
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* @param context - the context of the caller
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*
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*/
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void isr_handler(register_t context) {
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printf("Unhandled exception: %s\n", exception_messages[context.int_no]);
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}
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@ -1,89 +0,0 @@
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.extern isr_handler
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/* Macros that define the entry point in ISRs with and without an error code. */
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.macro ISR_NO_ERRCODE _isr_nr
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.global isr\_isr_nr
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isr\_isr_nr:
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cli
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push $0x00
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push $\_isr_nr
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jmp isr_common_stub
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.endm
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.macro ISR_ERRCODE _isr_nr
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.global isr\_isr_nr
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isr\_isr_nr:
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cli
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push $\_isr_nr
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jmp isr_common_stub
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.endm
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/* Expandation of the above mentioned macros. */
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ISR_NO_ERRCODE 0
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ISR_NO_ERRCODE 1
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ISR_NO_ERRCODE 2
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ISR_NO_ERRCODE 3
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ISR_NO_ERRCODE 4
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ISR_NO_ERRCODE 5
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ISR_NO_ERRCODE 6
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ISR_NO_ERRCODE 7
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ISR_ERRCODE 8
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ISR_NO_ERRCODE 9
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ISR_ERRCODE 10
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ISR_ERRCODE 11
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ISR_ERRCODE 12
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ISR_ERRCODE 13
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ISR_ERRCODE 14
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ISR_NO_ERRCODE 15
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ISR_NO_ERRCODE 16
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ISR_NO_ERRCODE 17
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ISR_NO_ERRCODE 18
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ISR_NO_ERRCODE 19
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ISR_NO_ERRCODE 20
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ISR_NO_ERRCODE 21
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ISR_NO_ERRCODE 22
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ISR_NO_ERRCODE 23
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ISR_NO_ERRCODE 24
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ISR_NO_ERRCODE 25
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ISR_NO_ERRCODE 26
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ISR_NO_ERRCODE 27
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ISR_NO_ERRCODE 28
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ISR_NO_ERRCODE 29
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ISR_NO_ERRCODE 30
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ISR_NO_ERRCODE 31
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/*
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* Stub for ISRs. It must push the context on the stack and change the PL.
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* After the isr_handler was called the context will be restored and the
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* error code and the request number will be cleared from the stack.
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*
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*/
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isr_common_stub:
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pusha
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mov %ds, %ax
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push %eax
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mov $0x10, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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call isr_handler
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pop %eax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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popa
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add $0x08, %esp
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sti
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iret
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