first test piece files. Scared.
This commit is contained in:
parent
df9d0ac92e
commit
8270195551
|
@ -1,10 +1,40 @@
|
|||
use <supports.scad>;
|
||||
use <plate.scad>;
|
||||
|
||||
for(x=[0:3]) {
|
||||
for(y=[0:1])
|
||||
translate([60*x,60*y,0])
|
||||
plate4x4(thickness=4);
|
||||
pcb_size = 60; // the PCB is 60x60mm square
|
||||
pcb_depth = 7.57; // the PCB is 7.57mm deep, overall (including connector + lEDs)
|
||||
connector_depth=5.7; // the connector on the bottom of the PCB is 5.8mm thick.
|
||||
pcb_thickness= 1.7; // the PCB itself (just the board, w/o components) is roughly 1.7mm thick
|
||||
|
||||
pcbs_long = 4;
|
||||
pcbs_wide = 2;
|
||||
|
||||
wall_width = 5; // width of walls above the top of the supports
|
||||
|
||||
support_depth=10; // depth of support structure wall
|
||||
tolerance = 0.4;
|
||||
|
||||
wall_height = (pcb_depth-connector_depth)+4; // height of walls above the top of the supports
|
||||
|
||||
rotate([180,0,0]) {
|
||||
translate([pcb_size/2,-pcb_size/2-pcb_size, -support_depth-pcb_thickness]) {
|
||||
for(x=[0:pcbs_long-1]) {
|
||||
for(y=[0:pcbs_wide-1]) {
|
||||
translate([pcb_size*x,pcb_size*y,0]) {
|
||||
//%import("pcb-single.stl");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
box();
|
||||
intersection() {
|
||||
translate([-wall_width-tolerance,-wall_width-tolerance,0])
|
||||
cube([wall_width+tolerance+pcb_size,wall_width+tolerance+pcb_size,50]);
|
||||
union() {
|
||||
box();
|
||||
translate([0,0,wall_height+support_depth]) {
|
||||
color("red") plate();
|
||||
};
|
||||
}
|
||||
}
|
76
plate.scad
76
plate.scad
|
@ -1,8 +1,28 @@
|
|||
// this SCAD file defines the top plate for the case of a neotrellis monome-compatible grid controller.
|
||||
// the file is designed to be parametric, for easier testing.
|
||||
// TODO tolerances
|
||||
// first, we declare some parameters, that will be useful to tweak while testing the model:
|
||||
|
||||
pcb_size = 60; // the PCB is 60x60mm square
|
||||
pcb_depth = 7.57; // the PCB is 7.57mm deep, overall (including connector + lEDs)
|
||||
connector_depth=5.7; // the connector on the bottom of the PCB is 5.8mm thick.
|
||||
pcb_thickness= 1.7; // the PCB itself (just the board, w/o components) is roughly 1.7mm thick
|
||||
|
||||
support_width=5; // width of support structure walls
|
||||
support_depth=10; // depth of support structure wall
|
||||
floor_depth = 1; // depth of the bottom floor of the support
|
||||
|
||||
wall_height = (pcb_depth-connector_depth)+4; // height of walls above the top of the supports
|
||||
wall_width = 5; // width of walls above the top of the supports
|
||||
|
||||
cutout_width=25; // width of the cutouts in the support structure, for wires etc
|
||||
cutout_depth=5; // depth of the cutouts in the support structure
|
||||
|
||||
pcbs_wide=2; // how many trellis PCBs are in the grid, width-wise
|
||||
pcbs_long=4; // how many trellis PCBs are in the grid, length-wise
|
||||
|
||||
hole_size = 4; // size of the holes in which the top plate pegs sit
|
||||
hole_depth = 15; // depth of the holes in which the top plate pegs sit
|
||||
|
||||
// Button size (in mm)
|
||||
button_size = 10;
|
||||
// Spacing between buttons (in mm)
|
||||
|
@ -12,23 +32,49 @@ tolerance = 0.4;
|
|||
// outer spacing - spacing between the edge of the silicon part and the buttons
|
||||
outer_spacing = 2.5;
|
||||
|
||||
// module for a 4x4 unit of the top plate.
|
||||
module plate4x4(thickness) {
|
||||
plate_thickness = 4;
|
||||
|
||||
// module for the entire plate
|
||||
module plate() {
|
||||
difference() {
|
||||
cube(
|
||||
[outer_spacing*2+button_size*4+spacing*3,
|
||||
outer_spacing*2+button_size*4+spacing*3,
|
||||
thickness]);
|
||||
for(x=[0:3]) {
|
||||
for(y=[0:3]) {
|
||||
translate(
|
||||
[outer_spacing-(tolerance/2)+((button_size+spacing)*x),
|
||||
outer_spacing-(tolerance/2)+((button_size+spacing)*y),
|
||||
-0.5])
|
||||
cube([button_size+tolerance,button_size+tolerance,thickness+1]);
|
||||
translate([-(wall_width+tolerance),-(wall_width+tolerance)]) {
|
||||
cube(
|
||||
[pcb_size*pcbs_long+(wall_width+tolerance)*2,
|
||||
pcb_size*pcbs_wide+(wall_width+tolerance)*2,
|
||||
plate_thickness]);
|
||||
}
|
||||
for(x=[0:pcbs_long-1]){
|
||||
for(y=[0:pcbs_wide-1]) {
|
||||
translate([x*pcb_size,y*pcb_size,0])
|
||||
plate4x4(plate_thickness);
|
||||
}
|
||||
}
|
||||
}
|
||||
// mounting pegs
|
||||
translate([-tolerance-wall_width/2,-tolerance-wall_width/2,-plate_thickness]){
|
||||
cube([hole_size-tolerance,hole_size-tolerance,hole_depth], center=true);
|
||||
}
|
||||
translate([tolerance+wall_width/2+(pcbs_long*pcb_size),-tolerance-wall_width/2,-plate_thickness]){
|
||||
cube([hole_size-tolerance,hole_size-tolerance,hole_depth], center=true);
|
||||
}
|
||||
translate([tolerance+wall_width/2+(pcbs_long*pcb_size),tolerance+wall_width/2+(pcbs_wide*pcb_size),-plate_thickness]){
|
||||
cube([hole_size-tolerance,hole_size-tolerance,hole_depth], center=true);
|
||||
}
|
||||
translate([-tolerance-wall_width/2,tolerance+wall_width/2+(pcbs_wide*pcb_size),-plate_thickness]){
|
||||
cube([hole_size-tolerance,hole_size-tolerance,hole_depth], center=true);
|
||||
}
|
||||
}
|
||||
// module for the holes in a 4x4 unit of the top plate.
|
||||
module plate4x4(thickness) {
|
||||
for(x=[0:3]) {
|
||||
for(y=[0:3]) {
|
||||
translate(
|
||||
[outer_spacing-(tolerance/2)+((button_size+spacing)*x),
|
||||
outer_spacing-(tolerance/2)+((button_size+spacing)*y),
|
||||
-0.5])
|
||||
cube([button_size+tolerance,button_size+tolerance,thickness+1]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
plate4x4(1);
|
||||
plate();
|
|
@ -33,7 +33,7 @@ rotate([180,0,0]) {
|
|||
for(x=[0:pcbs_long-1]) {
|
||||
for(y=[0:pcbs_wide-1]) {
|
||||
translate([pcb_size*x,pcb_size*y,0]) {
|
||||
// %import("pcb-single.stl");
|
||||
%import("pcb-single.stl");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -69,7 +69,7 @@ module box() {
|
|||
// create large outer box
|
||||
translate([-(wall_width+tolerance),-(wall_width+tolerance)]) {
|
||||
difference() {
|
||||
// outer cute
|
||||
// outer cube
|
||||
cube(
|
||||
[pcb_size*pcbs_long+(wall_width+tolerance)*2,
|
||||
pcb_size*pcbs_wide+(wall_width+tolerance)*2,
|
||||
|
|
Loading…
Reference in New Issue