rk27xx: Implement dualboot capable bootloader
Change-Id: I399e10635f611bdf6f7c1bd5843fa132dc88bfb4
This commit is contained in:
Marcin Bukat
parent
587f52f50e
commit
0263fe37e4
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@ -1,184 +1,110 @@
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#include "config.h"
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include "inttypes.h"
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#include "string.h"
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#include "cpu.h"
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#include "system.h"
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#include <system.h>
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#include <inttypes.h>
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#include "config.h"
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#include "gcc_extensions.h"
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#include "lcd.h"
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#include "kernel.h"
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#include "thread.h"
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#include "backlight.h"
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#include "backlight-target.h"
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#include "font.h"
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#include "backlight.h"
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#include "adc.h"
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#include "button-target.h"
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#include "button.h"
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#include "common.h"
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#include "version.h"
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#include "storage.h"
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#include "disk.h"
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#include "panic.h"
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#include "power.h"
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#include "string.h"
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#include "file.h"
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#include "crc32-rkw.h"
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#include "rkw.h"
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// 441 Hz samples table, 44100 Hz and 441 Hz -> 100 samples
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const int16_t samples[] = {
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0, 2057, 4106, 6139, 8148, 10125, 12062, 13951, 15785, 17557,
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19259, 20886, 22430, 23886, 25247, 26509, 27666, 28713, 29648, 30465,
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31163, 31737, 32186, 32508, 32702, 32767, 32702, 32508, 32186, 31737,
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31163, 30465, 29648, 28713, 27666, 26509, 25247, 23886, 22430, 20886,
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19259, 17557, 15785, 13951, 12062, 10125, 8148, 6139, 4106, 2057,
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0, -2057, -4106, -6139, -8148, -10125, -12062, -13951, -15785, -17557,
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-19259, -20886, -22430, -23886, -25247, -26509, -27666, -28713, -29648, -30465,
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-31163, -31737, -32186, -32508, -32702, -32767, -32702, -32508, -32186, -31737,
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-31163, -30465, -29648, -28713, -27666, -26509, -25247, -23886, -22430, -20886,
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-19259, -17557, -15785, -13951, -12062, -10125, -8148, -6139, -4106, -2057 };
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#define DRAM_ORIG 0x60000000
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#define LOAD_SIZE 0x700000
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extern void show_logo( void );
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void INT_HDMA(void)
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{
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#if 0
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// static uint32_t i;
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// printf("hdma int: %d", i++);
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HDMA_ISRC0 = (uint32_t)&samples;
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HDMA_IDST0 = (uint32_t)&I2S_TXR;
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HDMA_ICNT0 = (sizeof(samples)/4) - 1;
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HDMA_CON0 = (1<<22)| // slice mode
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(1<<21)| // channel enable
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(1<<18)| // interrupt mode
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(5<<13)| // transfer mode inc8
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(6<<9) | // hdreq from i2s tx
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(0<<7) | // source address increment
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(1<<5) | // destination address fixed
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(2<<3) | // data size word
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(1<<0); // enable hardware triggered dma
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HDMA_ISR = (1<<13) | // mask ch1 page overflow
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(1<<11) | // mask ch1 page count down
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(1<<9); // mask ch1 interrupts
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#endif
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return;
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}
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static int codec_write(uint8_t reg, uint8_t data)
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{
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uint8_t tmp = data;
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return i2c_write(0x27<<1, reg<<1, 1, &tmp);
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}
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void main(void) NORETURN_ATTR;
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void main(void)
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{
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int i;
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_backlight_init();
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char filename[MAX_PATH];
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unsigned char* loadbuffer;
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void(*kernel_entry)(void);
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int ret;
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enum {rb, of} boot = rb;
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power_init();
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system_init();
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kernel_init();
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enable_irq();
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lcd_init_device();
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_backlight_on();
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adc_init();
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lcd_init();
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backlight_init();
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button_init_device();
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font_init();
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lcd_setfont(FONT_SYSFIXED);
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show_logo();
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sleep(HZ*2);
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printf("show logo passed");
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// I2S init
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SCU_CLKCFG &= ~((1<<17) | (1<<16)); // enable i2s, i2c pclk
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//SCU_CLKCFG |= ((1<<17) | (1<<16));
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I2S_OPR = (1<<17) | // reset Tx
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(1<<16) | // reset Rx
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(1<<6) | // disable HDMA Req1
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(1<<5); // disable HDMA Req2
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int btn = button_read_device();
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I2S_TXCTL = (1<<16) | // LRCK/SCLK = 64
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(4<<8) | // MCLK/SCK = 4
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(1<<4) | // 16bit samples
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(0<<3) | // stereo mode
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(0<<1); // I2S
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I2S_RXCTL = (1<<16) | // LRCK/SCLK = 64
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(4<<8) | // MCLK/SCK = 4
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(1<<4) | // 16bit samples
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(0<<3) | // stereo mode
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(0<<1); // I2S
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/* if there is some other button pressed
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* besides POWER/PLAY we boot into OF
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*/
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if ((btn & ~POWEROFF_BUTTON))
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boot = of;
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I2S_FIFOSTS = (1<<18) | // Tx int trigger half full
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(1<<16); // Rx int trigger half full
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/* if we are woken up by USB insert boot into OF */
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if (DEV_INFO & (1<<20))
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boot = of;
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// I2S start
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I2S_OPR = (1<<17) | (1<<16);
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sleep(HZ/100);
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lcd_clear_display();
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I2S_OPR = (0<<6) | // req channel 1 enable
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(1<<5) | // req channel 2 disable
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(0<<4) | // HDMA req channel 1 Tx
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(0<<2) | // normal I2S operation (no loopback)
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(1<<1); // Tx start
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ret = storage_init();
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if(ret < 0)
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error(EATA, ret, true);
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printf("I2S config passed");
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while(!disk_init(IF_MV(0)))
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panicf("disk_init failed!");
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HDMA_ISRC0 = (uint32_t)&samples;
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HDMA_IDST0 = (uint32_t)&I2S_TXR;
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HDMA_ICNT0 = (sizeof(samples)/4) - 1;
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HDMA_ISCNT0 = 7;
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HDMA_IPNCNTD0 = 1;
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HDMA_CON0 = (1<<22)| // slice mode
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(1<<21)| // channel enable
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(1<<18)| // interrupt mode
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(5<<13)| // transfer mode inc8
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(6<<9) | // hdreq from i2s tx
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(0<<7) | // source address increment
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(1<<5) | // destination address fixed
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(2<<3) | // data size word
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(1<<0); // enable hardware triggered dma
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while((ret = disk_mount_all()) <= 0)
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error(EDISK, ret, true);
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HDMA_ISR = (1<<13) | // mask ch1 page overflow
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(1<<11) | // mask ch1 page count down
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(1<<9); // mask ch1 interrupts
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loadbuffer = (unsigned char*)DRAM_ORIG; /* DRAM */
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if (boot == rb)
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snprintf(filename,sizeof(filename), BOOTDIR "/%s", BOOTFILE);
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else if (boot == of)
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snprintf(filename,sizeof(filename), BOOTDIR "/%s", "BASE.RKW");
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INTC_IMR |= (1<<12);
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INTC_IECR |= (1<<12);
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printf("Loading: %s", filename);
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printf("HDMA config passed");
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i2c_init();
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printf("I2C config passed");
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// codec init
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codec_write(0x00, (1<<3)|(1<<2)|(1<<1)|(1<<0)); // AICR
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codec_write(0x01, (1<<7)|(1<<5)|(1<<3)); // CR1
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codec_write(0x02, (1<<2)); // CR2
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codec_write(0x03, 0); // CCR1
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codec_write(0x04, (2<<4)|(2<<0)); // CCR2
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codec_write(0x07, (3<<5)|(3<<0)); // CCR
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codec_write(0x0f, 0x1f|(2<<6)); // CGR6
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codec_write(0x14, (1<<1)); // TR1
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codec_write(0x05, (1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0)); // PMR1
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sleep(HZ/100);
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codec_write(0x06, (1<<3)|(1<<2)|(1<<0)); // PMR2
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codec_write(0x05, (1<<6)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0)); // PMR1
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codec_write(0x05, (1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0)); // PMR1
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// DACout mode
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codec_write(0x01, (1<<7)|(1<<3)|(1<<5)|(1<<4)); // CR1
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codec_write(0x05, (1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0)); //PMR1
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// codec_write(0x06, (1<<3)|(1<<2)); // PMR2
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printf("codec init passed");
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codec_write(0x01, (1<<7)|(1<<3)); // CR1
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codec_write(0x0a, 0); // 0dB digital gain
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codec_write(0x11, 15|(2<<6)); //
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while(1)
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ret = load_rkw(loadbuffer, filename, LOAD_SIZE);
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if (ret < 0)
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{
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printf("HDMA_CCNT0: 0x%0x FIFOSTS: 0x%0x", HDMA_CCNT0, I2S_FIFOSTS);
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printf(rkw_strerror(ret));
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lcd_update();
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sleep(5*HZ);
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power_off();
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}
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else
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{
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printf(rkw_strerror(0));
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sleep(HZ);
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}
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kernel_entry = (void*) loadbuffer;
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commit_discard_idcache();
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printf("Executing");
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kernel_entry();
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printf("ERR: Failed to boot");
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sleep(5*HZ);
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power_off();
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/* hang */
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while(1);
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}
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