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jz4740: a few minor fixes 

This was spotted while playing with qemu-jz:
1) rockbox reads TECR and TESR which are described as write-only
   registers. Datasheet doesn't mention what happens if they are
   readed. Apparently this doesn't have fatal side effects.
   It comes down to two defines from jz4740.h
   __tcu_stop_counter(n) and __tcu_start_counter(n) which use
   read-modify-write sequence.

2) rockbox accesses out of bound offset 0xd4 in DMA memspace.
   It comes from dis_irq() in system-jz4740.c. NUM_DMA is 6 but
   DMA channels are 0-5 so (irq <= IRQ_DMA_0 + NUM_DMA)) bound
   check is wrong.

This are *NOT* tested on device.

Change-Id: I29dff6a4f828030877b7d50fbcc98866478b9e3d
Reviewed-on: http://gerrit.rockbox.org/338
Reviewed-by: Bertrik Sikken <bertrik@sikken.nl>
Tested-by: Purling Nayuki <cyq.yzfl@gmail.com>
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
This commit is contained in:
Marcin Bukat 2012-10-26 12:55:13 +02:00
parent 44c32f8405
commit 027c035a4e
2 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
firmware/export/jz4740.h
View File

@ -3546,8 +3546,8 @@ static __inline__ void __cpm_select_msc_hs_clk(int sd)
#define __tcu_set_pwm_output_shutdown_graceful(n) ( REG_TCU_TCSR((n)) &= ~TCU_TCSR_PWM_SD )
#define __tcu_set_pwm_output_shutdown_abrupt(n) ( REG_TCU_TCSR((n)) |= TCU_TCSR_PWM_SD )
#define __tcu_start_counter(n) ( REG_TCU_TESR |= (1 << (n)) )
#define __tcu_stop_counter(n) ( REG_TCU_TECR |= (1 << (n)) )
#define __tcu_start_counter(n) ( REG_TCU_TESR = (1 << (n)) )
#define __tcu_stop_counter(n) ( REG_TCU_TECR = (1 << (n)) )
#define __tcu_half_match_flag(n) ( REG_TCU_TFR & (1 << ((n) + 16)) )
#define __tcu_full_match_flag(n) ( REG_TCU_TFR & (1 << (n)) )

2
firmware/target/mips/ingenic_jz47xx/system-jz4740.c
View File

@ -137,7 +137,7 @@ static void dis_irq(unsigned int irq)
if (!gpio_irq_mask[t])
__intc_mask_irq(IRQ_GPIO0 - t);
}
else if ((irq >= IRQ_DMA_0) && (irq <= IRQ_DMA_0 + NUM_DMA))
else if ((irq >= IRQ_DMA_0) && (irq < IRQ_DMA_0 + NUM_DMA))
{
__dmac_channel_disable_irq(irq - IRQ_DMA_0);
dma_irq_mask &= ~(1 << (irq - IRQ_DMA_0));