ARM optimised memcpy/memmove from glibc. This should give increased performance on all ARM targets, especially iPod 5G
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12000 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Daniel Ankers
parent
ec81431466
commit
1010b76c72
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@ -248,8 +248,8 @@ target/coldfire/i2c-coldfire.c
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#elif defined(CPU_PP) || defined(CPU_ARM)
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/* CPU_PP => CPU_ARM, CPU_ARM !=> CPU_PP */
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common/memcpy.c
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common/memmove.c
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target/arm/memcpy-arm.S
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target/arm/memmove-arm.S
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common/strlen.c
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#ifndef SIMULATOR
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target/arm/memset-arm.S
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174
firmware/target/arm/memcpy-arm.S
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174
firmware/target/arm/memcpy-arm.S
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@ -0,0 +1,174 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 Free Software Foundation, Inc.
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* This file was originally part of the GNU C Library
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* Contributed to glibc by MontaVista Software, Inc. (written by Nicolas Pitre)
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* Adapted for Rockbox by Daniel Ankers
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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/*
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* Endian independent macros for shifting bytes within registers.
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*/
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#ifndef __ARMEB__
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#define pull lsr
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#define push lsl
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#else
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#define pull lsl
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#define push lsr
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#endif
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/* Prototype: void *memcpy(void *dest, const void *src, size_t n); */
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.section .icode,"ax",%progbits
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.align 2
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.global memcpy
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.type memcpy,%function
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memcpy:
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stmfd sp!, {r0, r4, lr}
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subs r2, r2, #4
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blt 8f
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ands ip, r0, #3
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bne 9f
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ands ip, r1, #3
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bne 10f
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1: subs r2, r2, #(28)
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stmfd sp!, {r5 - r8}
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blt 5f
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2:
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3:
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4: ldmia r1!, {r3, r4, r5, r6, r7, r8, ip, lr}
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subs r2, r2, #32
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stmia r0!, {r3, r4, r5, r6, r7, r8, ip, lr}
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bge 3b
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5: ands ip, r2, #28
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rsb ip, ip, #32
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addne pc, pc, ip @ C is always clear here
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b 7f
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6: nop
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ldr r3, [r1], #4
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ldr r4, [r1], #4
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ldr r5, [r1], #4
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ldr r6, [r1], #4
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ldr r7, [r1], #4
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ldr r8, [r1], #4
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ldr lr, [r1], #4
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add pc, pc, ip
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nop
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nop
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str r3, [r0], #4
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str r4, [r0], #4
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str r5, [r0], #4
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str r6, [r0], #4
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str r7, [r0], #4
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str r8, [r0], #4
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str lr, [r0], #4
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7: ldmfd sp!, {r5 - r8}
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8: movs r2, r2, lsl #31
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ldrneb r3, [r1], #1
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ldrcsb r4, [r1], #1
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ldrcsb ip, [r1]
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strneb r3, [r0], #1
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strcsb r4, [r0], #1
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strcsb ip, [r0]
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ldmfd sp!, {r0, r4, pc}
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9: rsb ip, ip, #4
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cmp ip, #2
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ldrgtb r3, [r1], #1
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ldrgeb r4, [r1], #1
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ldrb lr, [r1], #1
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strgtb r3, [r0], #1
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strgeb r4, [r0], #1
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subs r2, r2, ip
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strb lr, [r0], #1
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blt 8b
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ands ip, r1, #3
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beq 1b
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10: bic r1, r1, #3
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cmp ip, #2
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ldr lr, [r1], #4
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beq 17f
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bgt 18f
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.macro forward_copy_shift pull push
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subs r2, r2, #28
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blt 14f
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11: stmfd sp!, {r5 - r9}
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12:
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13: ldmia r1!, {r4, r5, r6, r7}
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mov r3, lr, pull #\pull
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subs r2, r2, #32
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ldmia r1!, {r8, r9, ip, lr}
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orr r3, r3, r4, push #\push
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mov r4, r4, pull #\pull
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orr r4, r4, r5, push #\push
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mov r5, r5, pull #\pull
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orr r5, r5, r6, push #\push
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mov r6, r6, pull #\pull
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orr r6, r6, r7, push #\push
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mov r7, r7, pull #\pull
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orr r7, r7, r8, push #\push
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mov r8, r8, pull #\pull
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orr r8, r8, r9, push #\push
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mov r9, r9, pull #\pull
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orr r9, r9, ip, push #\push
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mov ip, ip, pull #\pull
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orr ip, ip, lr, push #\push
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stmia r0!, {r3, r4, r5, r6, r7, r8, r9, ip}
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bge 12b
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ldmfd sp!, {r5 - r9}
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14: ands ip, r2, #28
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beq 16f
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15: mov r3, lr, pull #\pull
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ldr lr, [r1], #4
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subs ip, ip, #4
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orr r3, r3, lr, push #\push
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str r3, [r0], #4
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bgt 15b
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16: sub r1, r1, #(\push / 8)
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b 8b
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.endm
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forward_copy_shift pull=8 push=24
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17: forward_copy_shift pull=16 push=16
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18: forward_copy_shift pull=24 push=8
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188
firmware/target/arm/memmove-arm.S
Normal file
188
firmware/target/arm/memmove-arm.S
Normal file
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@ -0,0 +1,188 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 Free Software Foundation, Inc.
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* This file was originally part of the GNU C Library
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* Contributed to glibc by MontaVista Software, Inc. (written by Nicolas Pitre)
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* Adapted for Rockbox by Daniel Ankers
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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/*
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* Endian independent macros for shifting bytes within registers.
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*/
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#ifndef __ARMEB__
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#define pull lsr
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#define push lsl
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#else
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#define pull lsl
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#define push lsr
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#endif
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.text
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/*
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* Prototype: void *memmove(void *dest, const void *src, size_t n);
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*
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* Note:
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*
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* If the memory regions don't overlap, we simply branch to memcpy which is
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* normally a bit faster. Otherwise the copy is done going downwards.
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*/
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.section .icode,"ax",%progbits
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.align 2
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.global memmove
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.type memmove,%function
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memmove:
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subs ip, r0, r1
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cmphi r2, ip
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bls memcpy
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stmfd sp!, {r0, r4, lr}
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add r1, r1, r2
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add r0, r0, r2
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subs r2, r2, #4
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blt 8f
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ands ip, r0, #3
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bne 9f
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ands ip, r1, #3
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bne 10f
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1: subs r2, r2, #(28)
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stmfd sp!, {r5 - r8}
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blt 5f
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2:
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3:
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4: ldmdb r1!, {r3, r4, r5, r6, r7, r8, ip, lr}
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subs r2, r2, #32
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stmdb r0!, {r3, r4, r5, r6, r7, r8, ip, lr}
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bge 3b
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5: ands ip, r2, #28
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rsb ip, ip, #32
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addne pc, pc, ip @ C is always clear here
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b 7f
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6: nop
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ldr r3, [r1, #-4]!
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ldr r4, [r1, #-4]!
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ldr r5, [r1, #-4]!
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ldr r6, [r1, #-4]!
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ldr r7, [r1, #-4]!
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ldr r8, [r1, #-4]!
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ldr lr, [r1, #-4]!
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add pc, pc, ip
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nop
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nop
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str r3, [r0, #-4]!
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str r4, [r0, #-4]!
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str r5, [r0, #-4]!
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str r6, [r0, #-4]!
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str r7, [r0, #-4]!
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str r8, [r0, #-4]!
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str lr, [r0, #-4]!
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7: ldmfd sp!, {r5 - r8}
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8: movs r2, r2, lsl #31
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ldrneb r3, [r1, #-1]!
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ldrcsb r4, [r1, #-1]!
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ldrcsb ip, [r1, #-1]
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strneb r3, [r0, #-1]!
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strcsb r4, [r0, #-1]!
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strcsb ip, [r0, #-1]
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ldmfd sp!, {r0, r4, pc}
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9: cmp ip, #2
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ldrgtb r3, [r1, #-1]!
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ldrgeb r4, [r1, #-1]!
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ldrb lr, [r1, #-1]!
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strgtb r3, [r0, #-1]!
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strgeb r4, [r0, #-1]!
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subs r2, r2, ip
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strb lr, [r0, #-1]!
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blt 8b
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ands ip, r1, #3
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beq 1b
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10: bic r1, r1, #3
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cmp ip, #2
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ldr r3, [r1, #0]
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beq 17f
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blt 18f
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.macro backward_copy_shift push pull
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subs r2, r2, #28
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blt 14f
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11: stmfd sp!, {r5 - r9}
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12:
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13: ldmdb r1!, {r7, r8, r9, ip}
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mov lr, r3, push #\push
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subs r2, r2, #32
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ldmdb r1!, {r3, r4, r5, r6}
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orr lr, lr, ip, pull #\pull
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mov ip, ip, push #\push
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orr ip, ip, r9, pull #\pull
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mov r9, r9, push #\push
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orr r9, r9, r8, pull #\pull
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mov r8, r8, push #\push
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orr r8, r8, r7, pull #\pull
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mov r7, r7, push #\push
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orr r7, r7, r6, pull #\pull
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mov r6, r6, push #\push
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orr r6, r6, r5, pull #\pull
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mov r5, r5, push #\push
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orr r5, r5, r4, pull #\pull
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mov r4, r4, push #\push
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orr r4, r4, r3, pull #\pull
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stmdb r0!, {r4 - r9, ip, lr}
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bge 12b
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ldmfd sp!, {r5 - r9}
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14: ands ip, r2, #28
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beq 16f
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15: mov lr, r3, push #\push
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ldr r3, [r1, #-4]!
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subs ip, ip, #4
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orr lr, lr, r3, pull #\pull
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str lr, [r0, #-4]!
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bgt 15b
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16: add r1, r1, #(\pull / 8)
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b 8b
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.endm
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backward_copy_shift push=8 pull=24
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17: backward_copy_shift push=16 pull=16
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18: backward_copy_shift push=24 pull=8
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