New port: iPod Classic (also known as iPod 6G/6.5G/7G)
Major known issues: - No bootloader yet - No support for the first-generation 160GB CE-ATA hard disk drive yet - Audio playback is slow, only FLAC seems to reach realtime git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28953 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sparmann
parent
6f40387e74
commit
152847977a
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@ -71,6 +71,10 @@ OUTPUT_FORMAT(elf32-littlemips)
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#else
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#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE)
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#endif
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#elif CONFIG_CPU==S5L8702
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#define ASM
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#include "cpu.h"
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#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
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#endif
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/* default to full RAM (minus codecs&plugins) unless specified otherwise */
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@ -150,6 +154,12 @@ OUTPUT_FORMAT(elf32-littlemips)
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#define IRAMORIG (0x00000000 + (48*1024))
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#define IRAMSIZE (128*1024)
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#elif CONFIG_CPU==S5L8702
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/* S5L8702 have 256KB of IRAM */
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#define DRAMORIG 0x08000000
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#define IRAMORIG (0x00000000 + (56*1024))
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#define IRAMSIZE (200*1024)
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#elif CONFIG_CPU == JZ4732
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#define DRAMORIG 0x80004000 + STUBOFFSET
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#define IRAM DRAM
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@ -333,6 +333,8 @@ drivers/audio/mas35xx.c
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drivers/audio/ak4537.c
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#elif defined(HAVE_UDA1341)
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drivers/audio/uda1341.c
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#elif defined(HAVE_CS42L55)
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drivers/audio/cs42l55.c
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#endif /* defined(HAVE_*) */
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#elif defined(HAVE_SDL_AUDIO)
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drivers/audio/sdl.c
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@ -455,6 +457,8 @@ target/arm/i2c-telechips.c
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/* no i2c driver yet */
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#elif CONFIG_I2C == I2C_S5L8700
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target/arm/s5l8700/i2c-s5l8700.c
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#elif CONFIG_I2C == I2C_S5L8702
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target/arm/s5l8702/i2c-s5l8702.c
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#endif
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#if CONFIG_CPU == PNX0101
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@ -525,8 +529,10 @@ target/arm/tcc77x/crt0.S
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target/arm/tcc780x/crt0.S
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#elif CONFIG_CPU==IMX31L
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target/arm/imx31/crt0.S
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#elif defined(CPU_S5L870X)
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#elif CONFIG_CPU==S5L8700 || CONFIG_CPU==S5L8701
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target/arm/s5l8700/crt0.S
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#elif CONFIG_CPU==S5L8702
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target/arm/s5l8702/crt0.S
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#elif defined(CPU_ARM)
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target/arm/crt0.S
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#endif /* defined(CPU_*) */
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@ -1441,13 +1447,7 @@ target/arm/tcc780x/cowond2/audio-cowond2.c
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#endif /* COWON_D2 */
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#ifdef CPU_S5L870X
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target/arm/s5l8700/system-s5l8700.c
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target/arm/mmu-arm.S
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#ifndef SIMULATOR
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#ifndef BOOTLOADER
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target/arm/s5l8700/timer-s5l8700.c
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#endif /* BOOTLOADER */
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#endif /* SIMULATOR */
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#endif
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#ifdef MEIZU_M6SL
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@ -1504,6 +1504,7 @@ target/arm/ipod/button-clickwheel.c
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target/arm/s5l8700/postmortemstub.S
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target/arm/s5l8700/kernel-s5l8700.c
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target/arm/s5l8700/dma-s5l8700.c
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target/arm/s5l8700/system-s5l8700.c
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target/arm/s5l8700/ipodnano2g/backlight-nano2g.c
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target/arm/s5l8700/ipodnano2g/lcd-nano2g.c
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target/arm/s5l8700/ipodnano2g/lcd-asm-nano2g.S
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@ -1515,6 +1516,7 @@ target/arm/s5l8700/ipodnano2g/pmu-nano2g.c
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target/arm/s5l8700/ipodnano2g/rtc-nano2g.c
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#ifndef BOOTLOADER
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target/arm/usb-s3c6400x.c
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target/arm/s5l8700/timer-s5l8700.c
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target/arm/s5l8700/debug-s5l8700.c
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target/arm/s5l8700/pcm-s5l8700.c
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target/arm/s5l8700/wmcodec-s5l8700.c
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@ -1524,6 +1526,34 @@ target/arm/s5l8700/ipodnano2g/adc-nano2g.c
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#endif
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#endif
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#ifdef IPOD_6G
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#ifndef SIMULATOR
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target/arm/ipod/button-clickwheel.c
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target/arm/s5l8702/ipod6g/cscodec-ipod6g.c
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target/arm/s5l8702/ipod6g/backlight-ipod6g.c
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target/arm/s5l8702/ipod6g/powermgmt-ipod6g.c
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target/arm/s5l8702/ipod6g/power-ipod6g.c
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target/arm/s5l8702/kernel-s5l8702.c
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target/arm/s5l8702/system-s5l8702.c
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target/arm/s5l8702/ipod6g/lcd-ipod6g.c
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target/arm/s5l8702/ipod6g/lcd-asm-ipod6g.S
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target/arm/s5l8702/ipod6g/ata-ipod6g.c
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#if 0 //TODO
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target/arm/s5l8702/postmortemstub.S
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#endif
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target/arm/s5l8702/ipod6g/pmu-ipod6g.c
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target/arm/s5l8702/ipod6g/rtc-ipod6g.c
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#ifndef BOOTLOADER
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target/arm/usb-s3c6400x.c
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target/arm/s5l8702/timer-s5l8702.c
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target/arm/s5l8702/debug-s5l8702.c
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target/arm/s5l8702/pcm-s5l8702.c
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target/arm/s5l8702/ipod6g/audio-ipod6g.c
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target/arm/s5l8702/ipod6g/adc-ipod6g.c
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#endif
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#endif
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#endif
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#ifndef SIMULATOR
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#if CONFIG_CPU == JZ4732
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target/mips/ingenic_jz47xx/ata-nand-jz4740.c
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@ -0,0 +1,208 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: wm8975.c 28572 2010-11-13 11:38:38Z theseven $
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*
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* Driver for Cirrus Logic CS42L55 audio codec
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*
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* Copyright (c) 2010 Michael Sparmann
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "logf.h"
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#include "system.h"
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#include "string.h"
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#include "audio.h"
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#include "sound.h"
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#include "audiohw.h"
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#include "cscodec.h"
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#include "cs42l55.h"
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const struct sound_settings_info audiohw_settings[] = {
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[SOUND_VOLUME] = {"dB", 0, 1, -58, 12, -25},
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[SOUND_BASS] = {"dB", 1, 15,-105, 120, 0},
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[SOUND_TREBLE] = {"dB", 1, 15,-105, 120, 0},
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[SOUND_BALANCE] = {"%", 0, 1,-100, 100, 0},
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[SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0},
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[SOUND_STEREO_WIDTH] = {"%", 0, 5, 0, 250, 100},
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};
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static int bass, treble;
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/* convert tenth of dB volume (-580..120) to master volume register value */
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int tenthdb2master(int db)
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{
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/* +12 to -58dB 1dB steps */
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/* 0001100 == +12dB (0xc) */
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/* 0000000 == 0dB (0x0) */
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/* 1000100 == -58dB (0x44) */
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if (db < VOLUME_MIN) return HPACTL_HPAMUTE;
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return db & HPACTL_HPAVOL_MASK;
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}
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static void cscodec_setbits(int reg, unsigned char off, unsigned char on)
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{
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cscodec_write(reg, (cscodec_read(reg) & ~off) | on);
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}
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static void audiohw_mute(bool mute)
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{
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if (mute) cscodec_setbits(PLAYCTL, 0, PLAYCTL_MSTAMUTE | PLAYCTL_MSTBMUTE);
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else cscodec_setbits(PLAYCTL, PLAYCTL_MSTAMUTE | PLAYCTL_MSTBMUTE, 0);
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}
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void audiohw_preinit(void)
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{
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cscodec_power(true);
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cscodec_clock(true);
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cscodec_reset(true);
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sleep(HZ / 100);
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cscodec_reset(false);
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bass = 0;
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treble = 0;
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/* Ask Cirrus or maybe Apple what the hell this means */
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cscodec_write(HIDDENCTL, HIDDENCTL_UNLOCK);
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cscodec_write(HIDDEN2E, HIDDEN2E_DEFAULT);
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cscodec_write(HIDDEN32, HIDDEN32_DEFAULT);
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cscodec_write(HIDDEN33, HIDDEN33_DEFAULT);
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cscodec_write(HIDDEN34, HIDDEN34_DEFAULT);
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cscodec_write(HIDDEN35, HIDDEN35_DEFAULT);
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cscodec_write(HIDDEN36, HIDDEN36_DEFAULT);
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cscodec_write(HIDDEN37, HIDDEN37_DEFAULT);
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cscodec_write(HIDDEN3A, HIDDEN3A_DEFAULT);
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cscodec_write(HIDDEN3C, HIDDEN3C_DEFAULT);
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cscodec_write(HIDDEN3D, HIDDEN3D_DEFAULT);
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cscodec_write(HIDDEN3E, HIDDEN3E_DEFAULT);
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cscodec_write(HIDDEN3F, HIDDEN3F_DEFAULT);
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cscodec_write(HIDDENCTL, HIDDENCTL_LOCK);
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cscodec_write(PWRCTL2, PWRCTL2_PDN_LINA_ALWAYS | PWRCTL2_PDN_LINB_ALWAYS
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| PWRCTL2_PDN_HPA_NEVER | PWRCTL2_PDN_HPB_NEVER);
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cscodec_write(CLKCTL1, CLKCTL1_MASTER | CLKCTL1_SCLKMCLK_BEFORE
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| CLKCTL1_MCLKDIV2);
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cscodec_write(CLKCTL2, CLKCTL2_44100HZ);
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cscodec_write(MISCCTL, MISCCTL_UNDOC4 | MISCCTL_ANLGZC | MISCCTL_DIGSFT);
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cscodec_write(PWRCTL1, PWRCTL1_PDN_CHRG | PWRCTL1_PDN_ADCA
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| PWRCTL1_PDN_ADCB | PWRCTL1_PDN_CODEC);
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cscodec_write(PLAYCTL, PLAYCTL_PDN_DSP
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| PLAYCTL_MSTAMUTE | PLAYCTL_MSTBMUTE);
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cscodec_write(PGAACTL, 0);
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cscodec_write(PGABCTL, 0);
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cscodec_write(HPACTL, HPACTL_HPAMUTE);
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cscodec_write(HPBCTL, HPBCTL_HPBMUTE);
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cscodec_write(LINEACTL, LINEACTL_LINEAMUTE);
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cscodec_write(LINEBCTL, LINEBCTL_LINEBMUTE);
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cscodec_write(PWRCTL1, PWRCTL1_PDN_CHRG | PWRCTL1_PDN_ADCA
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| PWRCTL1_PDN_ADCB);
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}
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void audiohw_postinit(void)
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{
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cscodec_write(HPACTL, 0);
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cscodec_write(HPBCTL, 0);
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cscodec_write(LINEACTL, 0);
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cscodec_write(LINEBCTL, 0);
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cscodec_write(CLSHCTL, CLSHCTL_ADPTPWR_SIGNAL);
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audiohw_mute(false);
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}
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void audiohw_set_master_vol(int vol_l, int vol_r)
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{
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/* +12 to -58dB 1dB steps */
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/* 0001100 == +12dB (0xc) */
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/* 0000000 == 0dB (0x0) */
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/* 1000100 == -58dB (0x44) */
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cscodec_setbits(HPACTL, HPACTL_HPAVOL_MASK, vol_l << HPACTL_HPAVOL_SHIFT);
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cscodec_setbits(HPBCTL, HPBCTL_HPBVOL_MASK, vol_r << HPBCTL_HPBVOL_SHIFT);
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}
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void audiohw_set_lineout_vol(int vol_l, int vol_r)
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{
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/* +12 to -58dB 1dB steps */
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/* 0001100 == +12dB (0xc) */
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/* 0000000 == 0dB (0x0) */
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/* 1000100 == -58dB (0x44) */
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cscodec_setbits(LINEACTL, LINEACTL_LINEAVOL_MASK,
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vol_l << LINEACTL_LINEAVOL_SHIFT);
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cscodec_setbits(LINEBCTL, LINEBCTL_LINEBVOL_MASK,
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vol_r << LINEBCTL_LINEBVOL_SHIFT);
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}
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void audiohw_enable_lineout(bool enable)
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{
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if (enable)
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cscodec_setbits(PWRCTL2, PWRCTL2_PDN_LINA_MASK | PWRCTL2_PDN_LINB_MASK,
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PWRCTL2_PDN_LINA_NEVER | PWRCTL2_PDN_LINB_NEVER);
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else
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cscodec_setbits(PWRCTL2, PWRCTL2_PDN_LINA_MASK | PWRCTL2_PDN_LINB_MASK,
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PWRCTL2_PDN_LINA_ALWAYS | PWRCTL2_PDN_LINB_ALWAYS);
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}
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void audiohw_set_bass(int value)
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{
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bass = value;
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if (bass || treble) cscodec_setbits(PLAYCTL, PLAYCTL_PDN_DSP, 0);
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else cscodec_setbits(PLAYCTL, 0, PLAYCTL_PDN_DSP);
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if (value >= -105 && value <= 120)
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cscodec_setbits(TONECTL, TONECTL_BASS_MASK,
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(value / 15) << TONECTL_BASS_SHIFT);
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}
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void audiohw_set_treble(int value)
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{
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treble = value;
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if (bass || treble) cscodec_setbits(PLAYCTL, PLAYCTL_PDN_DSP, 0);
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else cscodec_setbits(PLAYCTL, 0, PLAYCTL_PDN_DSP);
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if (value >= -105 && value <= 120)
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cscodec_setbits(TONECTL, TONECTL_TREB_MASK,
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(value / 15) << TONECTL_TREB_SHIFT);
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}
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/* Nice shutdown of CS42L55 codec */
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void audiohw_close(void)
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{
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audiohw_mute(true);
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cscodec_write(HPACTL, HPACTL_HPAMUTE);
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cscodec_write(HPBCTL, HPBCTL_HPBMUTE);
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cscodec_write(LINEACTL, LINEACTL_LINEAMUTE);
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cscodec_write(LINEBCTL, LINEBCTL_LINEBMUTE);
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cscodec_write(PWRCTL1, PWRCTL1_PDN_CHRG | PWRCTL1_PDN_ADCA
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| PWRCTL1_PDN_ADCB | PWRCTL1_PDN_CODEC);
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cscodec_reset(true);
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cscodec_clock(false);
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cscodec_power(false);
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}
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/* Note: Disable output before calling this function */
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void audiohw_set_frequency(int fsel)
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{
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if (fsel == HW_FREQ_8) cscodec_write(CLKCTL2, CLKCTL2_8000HZ);
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else if (fsel == HW_FREQ_11) cscodec_write(CLKCTL2, CLKCTL2_11025HZ);
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else if (fsel == HW_FREQ_12) cscodec_write(CLKCTL2, CLKCTL2_12000HZ);
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else if (fsel == HW_FREQ_16) cscodec_write(CLKCTL2, CLKCTL2_16000HZ);
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else if (fsel == HW_FREQ_22) cscodec_write(CLKCTL2, CLKCTL2_22050HZ);
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else if (fsel == HW_FREQ_24) cscodec_write(CLKCTL2, CLKCTL2_24000HZ);
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else if (fsel == HW_FREQ_32) cscodec_write(CLKCTL2, CLKCTL2_32000HZ);
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else if (fsel == HW_FREQ_44) cscodec_write(CLKCTL2, CLKCTL2_44100HZ);
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else if (fsel == HW_FREQ_48) cscodec_write(CLKCTL2, CLKCTL2_48000HZ);
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}
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#ifdef HAVE_RECORDING
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//TODO: Implement
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#endif /* HAVE_RECORDING */
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@ -68,6 +68,8 @@
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#include "jz4740-codec.h"
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#elif defined(HAVE_AK4537)
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#include "ak4537.h"
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#elif defined(HAVE_CS42L55)
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#include "cs42l55.h"
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#endif
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#if (CONFIG_PLATFORM & PLATFORM_HOSTED)
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/* #include <SDL_audio.h> gives errors in other code areas,
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@ -0,0 +1,246 @@
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/*
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* This config file is for iPod 6G / Classic
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*/
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#define TARGET_TREE /* this target is using the target tree system */
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#define IPOD_ARCH 1
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/* For Rolo and boot loader */
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#define MODEL_NUMBER 71
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#define MODEL_NAME "Apple iPod Classic/6G"
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/* define this if you use an ATA controller */
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#define CONFIG_STORAGE STORAGE_ATA
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#define HAVE_ATA_DMA
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#define ATA_MAX_UDMA 4
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#define ATA_MAX_MWDMA 2
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/* define this if the ATA controller and method of USB access support LBA48 */
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#define HAVE_LBA48
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/* define this if you have recording possibility */
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//#define HAVE_RECORDING
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/* Define bitmask of input sources - recordable bitmask can be defined
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explicitly if different */
|
||||
#define INPUT_SRC_CAPS (SRC_CAP_LINEIN)
|
||||
|
||||
/* define the bitmask of hardware sample rates */
|
||||
#define HW_SAMPR_CAPS (SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11 \
|
||||
| SAMPR_CAP_48 | SAMPR_CAP_24 | SAMPR_CAP_12 \
|
||||
| SAMPR_CAP_32 | SAMPR_CAP_16 | SAMPR_CAP_8)
|
||||
|
||||
/* define the bitmask of recording sample rates */
|
||||
#define REC_SAMPR_CAPS (SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11 \
|
||||
| SAMPR_CAP_48 | SAMPR_CAP_24 | SAMPR_CAP_12 \
|
||||
| SAMPR_CAP_32 | SAMPR_CAP_16 | SAMPR_CAP_8)
|
||||
|
||||
/* define this if you have a bitmap LCD display */
|
||||
#define HAVE_LCD_BITMAP
|
||||
|
||||
/* define this if you can flip your LCD */
|
||||
//#define HAVE_LCD_FLIP
|
||||
|
||||
/* define this if you have a colour LCD */
|
||||
#define HAVE_LCD_COLOR
|
||||
|
||||
/* define this if you want album art for this target */
|
||||
#define HAVE_ALBUMART
|
||||
|
||||
/* define this to enable bitmap scaling */
|
||||
#define HAVE_BMP_SCALING
|
||||
|
||||
/* define this to enable JPEG decoding */
|
||||
#define HAVE_JPEG
|
||||
|
||||
/* define this if you can invert the colours on your LCD */
|
||||
//#define HAVE_LCD_INVERT
|
||||
|
||||
/* LCD stays visible without backlight - simulator hint */
|
||||
#define HAVE_TRANSFLECTIVE_LCD
|
||||
|
||||
/* define this if you have access to the quickscreen */
|
||||
#define HAVE_QUICKSCREEN
|
||||
|
||||
/* define this if you have access to the pitchscreen */
|
||||
#define HAVE_PITCHSCREEN
|
||||
|
||||
/* define this if you would like tagcache to build on this target */
|
||||
#define HAVE_TAGCACHE
|
||||
|
||||
/* define this if the unit uses a scrollwheel for navigation */
|
||||
#define HAVE_SCROLLWHEEL
|
||||
#define HAVE_WHEEL_ACCELERATION
|
||||
#define WHEEL_ACCEL_START 270
|
||||
#define WHEEL_ACCELERATION 3
|
||||
|
||||
/* Define this if you can detect headphones */
|
||||
#define HAVE_HEADPHONE_DETECTION
|
||||
|
||||
/* LCD dimensions */
|
||||
#define LCD_WIDTH 320
|
||||
#define LCD_HEIGHT 240
|
||||
#define LCD_DEPTH 16 /* pseudo 262.144 colors */
|
||||
#define LCD_PIXELFORMAT RGB565 /* rgb565 */
|
||||
|
||||
/* Define this if the LCD can shut down */
|
||||
#define HAVE_LCD_SHUTDOWN
|
||||
|
||||
/* Define this if your LCD can be enabled/disabled */
|
||||
#define HAVE_LCD_ENABLE
|
||||
|
||||
/* Define this if your LCD can be put to sleep. HAVE_LCD_ENABLE
|
||||
should be defined as well. */
|
||||
#ifndef BOOTLOADER
|
||||
//TODO: #define HAVE_LCD_SLEEP
|
||||
//TODO: #define HAVE_LCD_SLEEP_SETTING
|
||||
#endif
|
||||
|
||||
#define CONFIG_KEYPAD IPOD_4G_PAD
|
||||
|
||||
//#define AB_REPEAT_ENABLE
|
||||
//#define ACTION_WPSAB_SINGLE ACTION_WPS_BROWSE
|
||||
|
||||
/* Define this to enable morse code input */
|
||||
#define HAVE_MORSE_INPUT
|
||||
|
||||
/* Define this if you do software codec */
|
||||
#define CONFIG_CODEC SWCODEC
|
||||
|
||||
/* define this if you have a real-time clock */
|
||||
#define CONFIG_RTC RTC_NANO2G
|
||||
|
||||
/* Define if the device can wake from an RTC alarm */
|
||||
//#define HAVE_RTC_ALARM
|
||||
|
||||
#define CONFIG_LCD LCD_IPOD6G
|
||||
|
||||
/* Define the type of audio codec */
|
||||
#define HAVE_CS42L55
|
||||
|
||||
#define HAVE_PCM_DMA_ADDRESS
|
||||
|
||||
/* Define this for LCD backlight available */
|
||||
#define HAVE_BACKLIGHT
|
||||
#define HAVE_BACKLIGHT_BRIGHTNESS
|
||||
|
||||
/* Define this if you have a software controlled poweroff */
|
||||
#define HAVE_SW_POWEROFF
|
||||
|
||||
/* The number of bytes reserved for loadable codecs */
|
||||
#define CODEC_SIZE 0x100000
|
||||
|
||||
/* The number of bytes reserved for loadable plugins */
|
||||
#define PLUGIN_BUFFER_SIZE 0x80000
|
||||
|
||||
// TODO: Figure out real values
|
||||
#define BATTERY_CAPACITY_DEFAULT 400 /* default battery capacity */
|
||||
#define BATTERY_CAPACITY_MIN 300 /* min. capacity selectable */
|
||||
#define BATTERY_CAPACITY_MAX 500 /* max. capacity selectable */
|
||||
#define BATTERY_CAPACITY_INC 10 /* capacity increment */
|
||||
#define BATTERY_TYPES_COUNT 1 /* only one type */
|
||||
|
||||
/* Hardware controlled charging with monitoring */
|
||||
#define CONFIG_CHARGING CHARGING_MONITOR
|
||||
|
||||
/* define current usage levels */
|
||||
//TODO: #define CURRENT_NORMAL 21 /* playback @48MHz clock, backlight off */
|
||||
//TODO: #define CURRENT_BACKLIGHT 23 /* maximum brightness */
|
||||
|
||||
/* define this if the unit can be powered or charged via USB */
|
||||
#define HAVE_USB_POWER
|
||||
|
||||
/* Define this if your LCD can set contrast */
|
||||
//#define HAVE_LCD_CONTRAST
|
||||
|
||||
/* Define Apple remote tuner */
|
||||
//#define CONFIG_TUNER IPOD_REMOTE_TUNER
|
||||
//#define HAVE_RDS_CAP
|
||||
|
||||
/* The exact type of CPU */
|
||||
#define CONFIG_CPU S5L8702
|
||||
|
||||
/* I2C interface */
|
||||
#define CONFIG_I2C I2C_S5L8702
|
||||
|
||||
#define HAVE_USB_CHARGING_ENABLE
|
||||
|
||||
/* The size of the flash ROM */
|
||||
#define FLASH_SIZE 0x400000
|
||||
|
||||
/* Define this to the CPU frequency */
|
||||
//TODO: Figure out exact value
|
||||
#define CPU_FREQ 216000000
|
||||
|
||||
/* define this if the hardware can be powered off while charging */
|
||||
#define HAVE_POWEROFF_WHILE_CHARGING
|
||||
|
||||
/* Offset ( in the firmware file's header ) to the file CRC */
|
||||
#define FIRMWARE_OFFSET_FILE_CRC 0
|
||||
|
||||
/* Offset ( in the firmware file's header ) to the real data */
|
||||
#define FIRMWARE_OFFSET_FILE_DATA 8
|
||||
|
||||
/* Define this if you can read an absolute wheel position */
|
||||
#define HAVE_WHEEL_POSITION
|
||||
|
||||
/* define this if the device has larger sectors when accessed via USB */
|
||||
/* (only relevant in disk.c, fat.c now always supports large virtual sectors) */
|
||||
#define MAX_LOG_SECTOR_SIZE 4096
|
||||
|
||||
/* define this if the hard drive uses large physical sectors (ATA-7 feature) */
|
||||
/* and doesn't handle them in the drive firmware */
|
||||
#define MAX_PHYS_SECTOR_SIZE 4096
|
||||
|
||||
/* Define this if you have adjustable CPU frequency */
|
||||
//TODO: #define HAVE_ADJUSTABLE_CPU_FREQ
|
||||
|
||||
#define BOOTFILE_EXT "ipod"
|
||||
#define BOOTFILE "rockbox." BOOTFILE_EXT
|
||||
#define BOOTDIR "/.rockbox"
|
||||
|
||||
/* Alternative bootfile extension - this is for encrypted images */
|
||||
#define BOOTFILE_EXT2 "ipodx"
|
||||
|
||||
/* Define this for FM radio input available */
|
||||
#define HAVE_FMRADIO_IN
|
||||
|
||||
/** Port-specific settings **/
|
||||
|
||||
#if 0
|
||||
/* Main LCD contrast range and defaults */
|
||||
#define MIN_CONTRAST_SETTING 1
|
||||
#define MAX_CONTRAST_SETTING 30
|
||||
#define DEFAULT_CONTRAST_SETTING 19 /* Match boot contrast */
|
||||
#endif
|
||||
|
||||
/* Main LCD backlight brightness range and defaults */
|
||||
#define MIN_BRIGHTNESS_SETTING 1
|
||||
#define MAX_BRIGHTNESS_SETTING 0x3f
|
||||
#define DEFAULT_BRIGHTNESS_SETTING 0x20
|
||||
|
||||
/* USB defines */
|
||||
#define HAVE_USBSTACK
|
||||
//#define HAVE_USB_HID_MOUSE - broken?
|
||||
#define CONFIG_USBOTG USBOTG_S3C6400X
|
||||
#define USB_VENDOR_ID 0x05AC
|
||||
//TODO: This is still the Nano2G product ID. Figure out the real one.
|
||||
#define USB_PRODUCT_ID 0x1260
|
||||
#define USB_NUM_ENDPOINTS 5
|
||||
#define USE_ROCKBOX_USB
|
||||
#define USB_DEVBSS_ATTR __attribute__((aligned(16)))
|
||||
|
||||
/* Define this if you can switch on/off the accessory power supply */
|
||||
#define HAVE_ACCESSORY_SUPPLY
|
||||
//#define IPOD_ACCESSORY_PROTOCOL
|
||||
//#define HAVE_SERIAL
|
||||
|
||||
/* Define this, if you can switch on/off the lineout */
|
||||
#define HAVE_LINEOUT_POWEROFF
|
||||
|
||||
#define USB_WRITE_BUFFER_SIZE (1024*64)
|
||||
|
||||
/* Define this if a programmable hotkey is mapped */
|
||||
#define HAVE_HOTKEY
|
||||
|
|
@ -59,9 +59,12 @@
|
|||
#ifdef CPU_TCC780X
|
||||
#include "tcc780x.h"
|
||||
#endif
|
||||
#ifdef CPU_S5L870X
|
||||
#if CONFIG_CPU == S5L8700 || CONFIG_CPU == S5L8701
|
||||
#include "s5l8700.h"
|
||||
#endif
|
||||
#if CONFIG_CPU == S5L8702
|
||||
#include "s5l8702.h"
|
||||
#endif
|
||||
#if CONFIG_CPU == JZ4732
|
||||
#include "jz4740.h"
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,481 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: wm8975.h 28159 2010-09-24 22:42:06Z Buschel $
|
||||
*
|
||||
* Copyright (C) 2010 by Michael Sparmann
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __CS42L55_H__
|
||||
#define __CS42L55_H__
|
||||
|
||||
/* volume/balance/treble/bass interdependency */
|
||||
#define VOLUME_MIN -580
|
||||
#define VOLUME_MAX 120
|
||||
|
||||
#define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP)
|
||||
|
||||
extern int tenthdb2master(int db);
|
||||
|
||||
extern void audiohw_set_master_vol(int vol_l, int vol_r);
|
||||
extern void audiohw_set_lineout_vol(int vol_l, int vol_r);
|
||||
extern void audiohw_enable_lineout(bool enable);
|
||||
|
||||
/* Register addresses and bits */
|
||||
|
||||
#define HIDDENCTL 0x00
|
||||
#define HIDDENCTL_LOCK 0x00
|
||||
#define HIDDENCTL_UNLOCK 0x99
|
||||
|
||||
#define CHIPVERSION 0x01
|
||||
|
||||
#define PWRCTL1 0x02
|
||||
#define PWRCTL1_PDN_CODEC (1 << 0)
|
||||
#define PWRCTL1_PDN_ADCA (1 << 1)
|
||||
#define PWRCTL1_PDN_ADCB (1 << 2)
|
||||
#define PWRCTL1_PDN_CHRG (1 << 3)
|
||||
|
||||
#define PWRCTL2 0x03
|
||||
#define PWRCTL2_PDN_LINA_MASK (3 << 0)
|
||||
#define PWRCTL2_PDN_LINA_HIGH (0 << 0)
|
||||
#define PWRCTL2_PDN_LINA_LOW (1 << 0)
|
||||
#define PWRCTL2_PDN_LINA_NEVER (2 << 0)
|
||||
#define PWRCTL2_PDN_LINA_ALWAYS (3 << 0)
|
||||
#define PWRCTL2_PDN_LINB_MASK (3 << 2)
|
||||
#define PWRCTL2_PDN_LINB_HIGH (0 << 2)
|
||||
#define PWRCTL2_PDN_LINB_LOW (1 << 2)
|
||||
#define PWRCTL2_PDN_LINB_NEVER (2 << 2)
|
||||
#define PWRCTL2_PDN_LINB_ALWAYS (3 << 2)
|
||||
#define PWRCTL2_PDN_HPA_MASK (3 << 4)
|
||||
#define PWRCTL2_PDN_HPA_HIGH (0 << 4)
|
||||
#define PWRCTL2_PDN_HPA_LOW (1 << 4)
|
||||
#define PWRCTL2_PDN_HPA_NEVER (2 << 4)
|
||||
#define PWRCTL2_PDN_HPA_ALWAYS (3 << 4)
|
||||
#define PWRCTL2_PDN_HPB_MASK (3 << 6)
|
||||
#define PWRCTL2_PDN_HPB_HIGH (0 << 6)
|
||||
#define PWRCTL2_PDN_HPB_LOW (1 << 6)
|
||||
#define PWRCTL2_PDN_HPB_NEVER (2 << 6)
|
||||
#define PWRCTL2_PDN_HPB_ALWAYS (3 << 6)
|
||||
|
||||
#define CLKCTL1 0x04
|
||||
#define CLKCTL1_MCLKDIS (1 << 0)
|
||||
#define CLKCTL1_MCLKDIV2 (1 << 1)
|
||||
#define CLKCTL1_SCLKMCLK_MASK (3 << 2)
|
||||
#define CLKCTL1_SCLKMCLK_BURST (0 << 2)
|
||||
#define CLKCTL1_SCLKMCLK_AFTER (2 << 2)
|
||||
#define CLKCTL1_SCLKMCLK_BEFORE (3 << 2)
|
||||
#define CLKCTL1_INV_SCLK (1 << 4)
|
||||
#define CLKCTL1_MASTER (1 << 5)
|
||||
|
||||
#define CLKCTL2 0x05
|
||||
#define CLKCTL2_MCLKLRCK_MASK (3 << 0)
|
||||
#define CLKCTL2_MCLKLRCK_125 (1 << 0)
|
||||
#define CLKCTL2_MCLKLRCK_136 (3 << 0)
|
||||
#define CLKCTL2_32KGROUP (1 << 2)
|
||||
#define CLKCTL2_SPEED_MASK (3 << 3)
|
||||
#define CLKCTL2_SPEED_SINGLE (1 << 3)
|
||||
#define CLKCTL2_SPEED_HALF (2 << 3)
|
||||
#define CLKCTL2_SPEED_QUARTER (3 << 3)
|
||||
#define CLKCTL2_8000HZ 0x1d
|
||||
#define CLKCTL2_11025HZ 0x1b
|
||||
#define CLKCTL2_12000HZ 0x19
|
||||
#define CLKCTL2_16000HZ 0x15
|
||||
#define CLKCTL2_22050HZ 0x13
|
||||
#define CLKCTL2_24000HZ 0x11
|
||||
#define CLKCTL2_32000HZ 0x0d
|
||||
#define CLKCTL2_44100HZ 0x0b
|
||||
#define CLKCTL2_48000HZ 0x09
|
||||
|
||||
#define CLSHCTL 0x06
|
||||
#define CLSHCTL_ADPTPWR_MASK (3 << 4)
|
||||
#define CLSHCTL_ADPTPWR_VOLUME (0 << 4)
|
||||
#define CLSHCTL_ADPTPWR_HALF (1 << 4)
|
||||
#define CLSHCTL_ADPTPWR_FULL (2 << 4)
|
||||
#define CLSHCTL_ADPTPWR_SIGNAL (3 << 4)
|
||||
|
||||
#define MISCCTL 0x07
|
||||
#define MISCCTL_FREEZE (1 << 0)
|
||||
#define MISCCTL_DIGSFT (1 << 2)
|
||||
#define MISCCTL_ANLGZC (1 << 3)
|
||||
#define MISCCTL_UNDOC4 (1 << 4)
|
||||
#define MISCCTL_DIGMUX (1 << 7)
|
||||
|
||||
#define ALHMUX 0x08
|
||||
#define ALHMUX_HPAMUX_MASK (1 << 0)
|
||||
#define ALHMUX_HPAMUX_DACA (0 << 0)
|
||||
#define ALHMUX_HPAMUX_PGAA (1 << 0)
|
||||
#define ALHMUX_HPBMUX_MASK (1 << 1)
|
||||
#define ALHMUX_HPBMUX_DACB (0 << 1)
|
||||
#define ALHMUX_HPBMUX_PGAB (1 << 1)
|
||||
#define ALHMUX_LINEAMUX_MASK (1 << 2)
|
||||
#define ALHMUX_LINEAMUX_DACA (0 << 2)
|
||||
#define ALHMUX_LINEAMUX_PGAA (1 << 2)
|
||||
#define ALHMUX_LINEBMUX_MASK (1 << 3)
|
||||
#define ALHMUX_LINEBMUX_DACB (0 << 3)
|
||||
#define ALHMUX_LINEBMUX_PGAB (1 << 3)
|
||||
#define ALHMUX_ADCAMUX_MASK (3 << 4)
|
||||
#define ALHMUX_ADCAMUX_PGAA (0 << 4)
|
||||
#define ALHMUX_ADCAMUX_AIN1A (1 << 4)
|
||||
#define ALHMUX_ADCAMUX_AIN2A (2 << 4)
|
||||
#define ALHMUX_ADCBMUX_MASK (3 << 4)
|
||||
#define ALHMUX_ADCBMUX_PGAB (0 << 6)
|
||||
#define ALHMUX_ADCBMUX_AIN1B (1 << 6)
|
||||
#define ALHMUX_ADCBMUX_AIN2B (2 << 6)
|
||||
|
||||
#define HPFCTL 0x09
|
||||
#define HPFCTL_HPFA_CF_MASK (3 << 0)
|
||||
#define HPFCTL_HPFA_CF_1_8 (0 << 0)
|
||||
#define HPFCTL_HPFA_CF_119 (1 << 0)
|
||||
#define HPFCTL_HPFA_CF_236 (2 << 0)
|
||||
#define HPFCTL_HPFA_CF_464 (3 << 0)
|
||||
#define HPFCTL_HPFB_CF_MASK (3 << 2)
|
||||
#define HPFCTL_HPFB_CF_1_8 (0 << 2)
|
||||
#define HPFCTL_HPFB_CF_119 (1 << 2)
|
||||
#define HPFCTL_HPFB_CF_236 (2 << 2)
|
||||
#define HPFCTL_HPFB_CF_464 (3 << 2)
|
||||
#define HPFCTL_HPFRZA (1 << 4)
|
||||
#define HPFCTL_HPFA (1 << 5)
|
||||
#define HPFCTL_HPFRZB (1 << 6)
|
||||
#define HPFCTL_HPFB (1 << 7)
|
||||
|
||||
#define ADCCTL 0x0a
|
||||
#define ADCCTL_ADCAMUTE (1 << 0)
|
||||
#define ADCCTL_ADCBMUTE (1 << 1)
|
||||
#define ADCCTL_INV_ADCA (1 << 2)
|
||||
#define ADCCTL_INV_ADCB (1 << 3)
|
||||
#define ADCCTL_DIGSUM_MASK (3 << 4)
|
||||
#define ADCCTL_DIGSUM_NORMAL (0 << 4)
|
||||
#define ADCCTL_DIGSUM_HALFSUM (1 << 4)
|
||||
#define ADCCTL_DIGSUM_HALFDIFF (2 << 4)
|
||||
#define ADCCTL_DIGSUM_SWAPPED (3 << 4)
|
||||
#define ADCCTL_PGA_VOLUME_GROUP (1 << 6)
|
||||
#define ADCCTL_ADC_VOLUME_GROUP (1 << 7)
|
||||
|
||||
#define PGAACTL 0x0b
|
||||
#define PGAACTL_VOLUME_MASK (0x3f << 0)
|
||||
#define PGAACTL_VOLUME_SHIFT 0
|
||||
#define PGAACTL_MUX_MASK (1 << 6)
|
||||
#define PGAACTL_MUX_AIN1A (0 << 6)
|
||||
#define PGAACTL_MUX_AIN2A (1 << 6)
|
||||
#define PGAACTL_BOOST (1 << 7)
|
||||
|
||||
#define PGABCTL 0x0c
|
||||
#define PGABCTL_VOLUME_MASK (0x3f << 0)
|
||||
#define PGABCTL_VOLUME_SHIFT 0
|
||||
#define PGABCTL_MUX_MASK (1 << 6)
|
||||
#define PGABCTL_MUX_AIN1B (0 << 6)
|
||||
#define PGABCTL_MUX_AIN2B (1 << 6)
|
||||
#define PGABCTL_BOOST (1 << 7)
|
||||
|
||||
#define ADCAATT 0x0d
|
||||
#define ADCAATT_VOLUME_MASK (0xff << 0)
|
||||
#define ADCAATT_VOLUME_SHIFT 0
|
||||
|
||||
#define ADCBATT 0x0e
|
||||
#define ADCBATT_VOLUME_MASK (0xff << 0)
|
||||
#define ADCBATT_VOLUME_SHIFT 0
|
||||
|
||||
#define PLAYCTL 0x0f
|
||||
#define PLAYCTL_MSTAMUTE (1 << 0)
|
||||
#define PLAYCTL_MSTBMUTE (1 << 1)
|
||||
#define PLAYCTL_INV_PCMA (1 << 2)
|
||||
#define PLAYCTL_INV_PCMB (1 << 3)
|
||||
#define PLAYCTL_PB_VOLUME_GROUP (1 << 4)
|
||||
#define PLAYCTL_DEEMPH (1 << 6)
|
||||
#define PLAYCTL_PDN_DSP (1 << 7)
|
||||
|
||||
#define AMIXACTL 0x10
|
||||
#define AMIXACTL_AMIXAVOL_MASK (0x7f << 0)
|
||||
#define AMIXACTL_AMIXAVOL_SHIFT 0
|
||||
#define AMIXACTL_AMIXAMUTE (1 << 7)
|
||||
|
||||
#define AMIXBCTL 0x11
|
||||
#define AMIXBCTL_AMIXBVOL_MASK (0x7f << 0)
|
||||
#define AMIXBCTL_AMIXBVOL_SHIFT 0
|
||||
#define AMIXBCTL_AMIXBMUTE (1 << 7)
|
||||
|
||||
#define PMIXACTL 0x12
|
||||
#define PMIXACTL_PMIXAVOL_MASK (0x7f << 0)
|
||||
#define PMIXACTL_PMIXAVOL_SHIFT 0
|
||||
#define PMIXACTL_PMIXAMUTE (1 << 7)
|
||||
|
||||
#define PMIXBCTL 0x13
|
||||
#define PMIXBCTL_PMIXBVOL_MASK (0x7f << 0)
|
||||
#define PMIXBCTL_PMIXBVOL_SHIFT 0
|
||||
#define PMIXBCTL_PMIXBMUTE (1 << 7)
|
||||
|
||||
#define BEEPFO 0x14
|
||||
#define BEEPFO_ONTIME_MASK (0xf << 0)
|
||||
#define BEEPFO_ONTIME_86 (0x0 << 0)
|
||||
#define BEEPFO_ONTIME_430 (0x1 << 0)
|
||||
#define BEEPFO_ONTIME_780 (0x2 << 0)
|
||||
#define BEEPFO_ONTIME_1200 (0x3 << 0)
|
||||
#define BEEPFO_ONTIME_1500 (0x4 << 0)
|
||||
#define BEEPFO_ONTIME_1800 (0x5 << 0)
|
||||
#define BEEPFO_ONTIME_2200 (0x6 << 0)
|
||||
#define BEEPFO_ONTIME_2500 (0x7 << 0)
|
||||
#define BEEPFO_ONTIME_2800 (0x8 << 0)
|
||||
#define BEEPFO_ONTIME_3200 (0x9 << 0)
|
||||
#define BEEPFO_ONTIME_3500 (0xa << 0)
|
||||
#define BEEPFO_ONTIME_3800 (0xb << 0)
|
||||
#define BEEPFO_ONTIME_4200 (0xc << 0)
|
||||
#define BEEPFO_ONTIME_4500 (0xd << 0)
|
||||
#define BEEPFO_ONTIME_4800 (0xe << 0)
|
||||
#define BEEPFO_ONTIME_5200 (0xf << 0)
|
||||
#define BEEPFO_FREQ_MASK (0xf << 4)
|
||||
#define BEEPFO_FREQ_254_76 (0x0 << 4)
|
||||
#define BEEPFO_FREQ_509_51 (0x1 << 4)
|
||||
#define BEEPFO_FREQ_571_65 (0x2 << 4)
|
||||
#define BEEPFO_FREQ_651_04 (0x3 << 4)
|
||||
#define BEEPFO_FREQ_689_34 (0x4 << 4)
|
||||
#define BEEPFO_FREQ_756_04 (0x5 << 4)
|
||||
#define BEEPFO_FREQ_869_45 (0x6 << 4)
|
||||
#define BEEPFO_FREQ_976_56 (0x7 << 4)
|
||||
#define BEEPFO_FREQ_1019_02 (0x8 << 4)
|
||||
#define BEEPFO_FREQ_1171_88 (0x9 << 4)
|
||||
#define BEEPFO_FREQ_1302_08 (0xa << 4)
|
||||
#define BEEPFO_FREQ_1378_67 (0xb << 4)
|
||||
#define BEEPFO_FREQ_1562_50 (0xc << 4)
|
||||
#define BEEPFO_FREQ_1674_11 (0xd << 4)
|
||||
#define BEEPFO_FREQ_1953_13 (0xe << 4)
|
||||
#define BEEPFO_FREQ_2130_68 (0xf << 4)
|
||||
|
||||
#define BEEPVO 0x15
|
||||
#define BEEPVO_VOLUME_MASK (0x1f << 0)
|
||||
#define BEEPVO_VOLUME_SHIFT 0
|
||||
#define BEEPVO_OFFTIME_MASK (7 << 5)
|
||||
#define BEEPVO_OFFTIME_1230 (0 << 5)
|
||||
#define BEEPVO_OFFTIME_2580 (1 << 5)
|
||||
#define BEEPVO_OFFTIME_3900 (2 << 5)
|
||||
#define BEEPVO_OFFTIME_5200 (3 << 5)
|
||||
#define BEEPVO_OFFTIME_6600 (4 << 5)
|
||||
#define BEEPVO_OFFTIME_8050 (5 << 5)
|
||||
#define BEEPVO_OFFTIME_9350 (6 << 5)
|
||||
#define BEEPVO_OFFTIME_10800 (7 << 5)
|
||||
|
||||
#define BTCTL 0x16
|
||||
#define BTCTL_TCEN (1 << 0)
|
||||
#define BTCTL_BASSCF_MASK (3 << 1)
|
||||
#define BTCTL_BASSCF_50 (0 << 1)
|
||||
#define BTCTL_BASSCF_100 (1 << 1)
|
||||
#define BTCTL_BASSCF_200 (2 << 1)
|
||||
#define BTCTL_BASSCF_250 (3 << 1)
|
||||
#define BTCTL_TREBCF_MASK (3 << 3)
|
||||
#define BTCTL_TREBCF_5000 (0 << 3)
|
||||
#define BTCTL_TREBCF_7000 (1 << 3)
|
||||
#define BTCTL_TREBCF_10000 (2 << 3)
|
||||
#define BTCTL_TREBCF_15000 (3 << 3)
|
||||
#define BTCTL_BEEP_MASK (0 << 6)
|
||||
#define BTCTL_BEEP_OFF (0 << 6)
|
||||
#define BTCTL_BEEP_SINGLE (1 << 6)
|
||||
#define BTCTL_BEEP_MULTIPLE (2 << 6)
|
||||
#define BTCTL_BEEP_CONTINUOUS (3 << 6)
|
||||
|
||||
#define TONECTL 0x17
|
||||
#define TONECTL_BASS_MASK (0xf << 0)
|
||||
#define TONECTL_BASS_SHIFT 0
|
||||
#define TONECTL_TREB_MASK (0xf << 4)
|
||||
#define TONECTL_TREB_SHIFT 4
|
||||
|
||||
#define MSTAVOL 0x18
|
||||
#define MSTAVOL_VOLUME_MASK (0xff << 0)
|
||||
#define MSTAVOL_VOLUME_SHIFT 0
|
||||
|
||||
#define MSTBVOL 0x19
|
||||
#define MSTBVOL_VOLUME_MASK (0xff << 0)
|
||||
#define MSTBVOL_VOLUME_SHIFT 0
|
||||
|
||||
#define HPACTL 0x1a
|
||||
#define HPACTL_HPAVOL_MASK (0x7f << 0)
|
||||
#define HPACTL_HPAVOL_SHIFT 0
|
||||
#define HPACTL_HPAMUTE (1 << 7)
|
||||
|
||||
#define HPBCTL 0x1b
|
||||
#define HPBCTL_HPBVOL_MASK (0x7f << 0)
|
||||
#define HPBCTL_HPBVOL_SHIFT 0
|
||||
#define HPBCTL_HPBMUTE (1 << 7)
|
||||
|
||||
#define LINEACTL 0x1c
|
||||
#define LINEACTL_LINEAVOL_MASK (0x7f << 0)
|
||||
#define LINEACTL_LINEAVOL_SHIFT 0
|
||||
#define LINEACTL_LINEAMUTE (1 << 7)
|
||||
|
||||
#define LINEBCTL 0x1d
|
||||
#define LINEBCTL_LINEBVOL_MASK (0x7f << 0)
|
||||
#define LINEBCTL_LINEBVOL_SHIFT 0
|
||||
#define LINEBCTL_LINEBMUTE (1 << 7)
|
||||
|
||||
#define AINADV 0x1e
|
||||
#define AINADV_VOLUME_MASK (0xff << 0)
|
||||
#define AINADV_VOLUME_SHIFT 0
|
||||
|
||||
#define DINADV 0x1f
|
||||
#define DINADV_VOLUME_MASK (0xff << 0)
|
||||
#define DINADV_VOLUME_SHIFT 0
|
||||
|
||||
#define MIXCTL 0x20
|
||||
#define MIXCTL_ADCASWP_MASK (3 << 0)
|
||||
#define MIXCTL_ADCASWP_NORMAL (0 << 0)
|
||||
#define MIXCTL_ADCASWP_HALFSUM (1 << 0)
|
||||
#define MIXCTL_ADCASWP_HALFSUM2 (2 << 0)
|
||||
#define MIXCTL_ADCASWP_SWAPPED (3 << 0)
|
||||
#define MIXCTL_ADCBSWP_MASK (3 << 2)
|
||||
#define MIXCTL_ADCBSWP_NORMAL (0 << 2)
|
||||
#define MIXCTL_ADCBSWP_HALFSUM (1 << 2)
|
||||
#define MIXCTL_ADCBSWP_HALFSUM2 (2 << 2)
|
||||
#define MIXCTL_ADCBSWP_SWAPPED (3 << 2)
|
||||
#define MIXCTL_PCMASWP_MASK (3 << 4)
|
||||
#define MIXCTL_PCMASWP_NORMAL (0 << 4)
|
||||
#define MIXCTL_PCMASWP_HALFSUM (1 << 4)
|
||||
#define MIXCTL_PCMASWP_HALFSUM2 (2 << 4)
|
||||
#define MIXCTL_PCMASWP_SWAPPED (3 << 4)
|
||||
#define MIXCTL_PCMBSWP_MASK (3 << 6)
|
||||
#define MIXCTL_PCMBSWP_NORMAL (0 << 6)
|
||||
#define MIXCTL_PCMBSWP_HALFSUM (1 << 6)
|
||||
#define MIXCTL_PCMBSWP_HALFSUM2 (2 << 6)
|
||||
#define MIXCTL_PCMBSWP_SWAPPED (3 << 6)
|
||||
|
||||
#define LIMCTL1 0x21
|
||||
#define LIMCTL1_CUSH_MASK (7 << 2)
|
||||
#define LIMCTL1_CUSH_0 (0 << 2)
|
||||
#define LIMCTL1_CUSH_3 (1 << 2)
|
||||
#define LIMCTL1_CUSH_6 (2 << 2)
|
||||
#define LIMCTL1_CUSH_9 (3 << 2)
|
||||
#define LIMCTL1_CUSH_12 (4 << 2)
|
||||
#define LIMCTL1_CUSH_18 (5 << 2)
|
||||
#define LIMCTL1_CUSH_24 (6 << 2)
|
||||
#define LIMCTL1_CUSH_30 (7 << 2)
|
||||
#define LIMCTL1_LMAX_MASK (7 << 5)
|
||||
#define LIMCTL1_LMAX_0 (0 << 5)
|
||||
#define LIMCTL1_LMAX_3 (1 << 5)
|
||||
#define LIMCTL1_LMAX_6 (2 << 5)
|
||||
#define LIMCTL1_LMAX_9 (3 << 5)
|
||||
#define LIMCTL1_LMAX_12 (4 << 5)
|
||||
#define LIMCTL1_LMAX_18 (5 << 5)
|
||||
#define LIMCTL1_LMAX_24 (6 << 5)
|
||||
#define LIMCTL1_LMAX_30 (7 << 5)
|
||||
|
||||
#define LIMCTL2 0x22
|
||||
#define LIMCTL2_LIMRRATE_MASK (0x3f << 0)
|
||||
#define LIMCTL2_LIMRRATE_SHIFT 0
|
||||
#define LIMCTL2_LIMIT_ALL (1 << 6)
|
||||
#define LIMCTL2_LIMIT (1 << 7)
|
||||
|
||||
#define LIMCTL3 0x23
|
||||
#define LIMCTL3_LIMARATE_MASK (0x3f << 0)
|
||||
#define LIMCTL3_LIMARATE_SHIFT 0
|
||||
|
||||
#define ALCCTL1 0x24
|
||||
#define ALCCTL1_ALCARATE_MASK (0x3f << 0)
|
||||
#define ALCCTL1_ALCARATE_SHIFT 0
|
||||
#define ALCCTL1_ALCA (1 << 6)
|
||||
#define ALCCTL1_ALCB (1 << 7)
|
||||
|
||||
#define ALCCTL2 0x25
|
||||
#define ALCCTL2_ALCRRATE_MASK (0x3f << 0)
|
||||
#define ALCCTL2_ALCRRATE_SHIFT 0
|
||||
|
||||
#define ALCCTL3 0x26
|
||||
#define ALCCTL3_ALCMIN_MASK (7 << 2)
|
||||
#define ALCCTL3_ALCMIN_0 (0 << 2)
|
||||
#define ALCCTL3_ALCMIN_3 (1 << 2)
|
||||
#define ALCCTL3_ALCMIN_6 (2 << 2)
|
||||
#define ALCCTL3_ALCMIN_9 (3 << 2)
|
||||
#define ALCCTL3_ALCMIN_12 (4 << 2)
|
||||
#define ALCCTL3_ALCMIN_18 (5 << 2)
|
||||
#define ALCCTL3_ALCMIN_24 (6 << 2)
|
||||
#define ALCCTL3_ALCMIN_30 (7 << 2)
|
||||
#define ALCCTL3_ALCMAX_MASK (7 << 5)
|
||||
#define ALCCTL3_ALCMAX_0 (0 << 5)
|
||||
#define ALCCTL3_ALCMAX_3 (1 << 5)
|
||||
#define ALCCTL3_ALCMAX_6 (2 << 5)
|
||||
#define ALCCTL3_ALCMAX_9 (3 << 5)
|
||||
#define ALCCTL3_ALCMAX_12 (4 << 5)
|
||||
#define ALCCTL3_ALCMAX_18 (5 << 5)
|
||||
#define ALCCTL3_ALCMAX_24 (6 << 5)
|
||||
#define ALCCTL3_ALCMAX_30 (7 << 5)
|
||||
|
||||
#define NGCTL 0x27
|
||||
#define NGCTL_NGDELEAY_MASK (3 << 0)
|
||||
#define NGCTL_NGDELEAY_50 (0 << 0)
|
||||
#define NGCTL_NGDELEAY_100 (1 << 0)
|
||||
#define NGCTL_NGDELEAY_150 (2 << 0)
|
||||
#define NGCTL_NGDELEAY_200 (3 << 0)
|
||||
#define NGCTL_THRESH_MASK (7 << 2)
|
||||
#define NGCTL_THRESH_SHIFT 2
|
||||
#define NGCTL_NG_BOOST30 (1 << 5)
|
||||
#define NGCTL_NG (1 << 6)
|
||||
#define NGCTL_NGALL (1 << 7)
|
||||
|
||||
#define ALSZDIS 0x28
|
||||
#define ALSZDIS_LIMSRDIS (1 << 3)
|
||||
#define ALSZDIS_ALCAZCDIS (1 << 4)
|
||||
#define ALSZDIS_ALCASRDIS (1 << 5)
|
||||
#define ALSZDIS_ALCBZCDIS (1 << 6)
|
||||
#define ALSZDIS_ALCBSRDIS (1 << 7)
|
||||
|
||||
#define STATUS 0x29
|
||||
#define STATUS_ADCAOVFL (1 << 0)
|
||||
#define STATUS_ADCBOVFL (1 << 1)
|
||||
#define STATUS_MIXAOVFL (1 << 2)
|
||||
#define STATUS_MIXBOVFL (1 << 3)
|
||||
#define STATUS_DSPAOVFL (1 << 4)
|
||||
#define STATUS_DSPBOVFL (1 << 5)
|
||||
#define STATUS_SPCLKERR (1 << 6)
|
||||
#define STATUS_HPDETECT (1 << 7)
|
||||
|
||||
#define CPCTL 0x2a
|
||||
#define CPCTL_CHGFREQ_MASK (0xf << 0)
|
||||
#define CPCTL_CHGFREQ_SHIFT 0
|
||||
|
||||
#define HIDDEN2E 0x2e
|
||||
#define HIDDEN2E_DEFAULT 0x30
|
||||
|
||||
#define HIDDEN32 0x32
|
||||
#define HIDDEN32_DEFAULT 0x07
|
||||
|
||||
#define HIDDEN33 0x33
|
||||
#define HIDDEN33_DEFAULT 0xff
|
||||
|
||||
#define HIDDEN34 0x34
|
||||
#define HIDDEN34_DEFAULT 0xf8
|
||||
|
||||
#define HIDDEN35 0x35
|
||||
#define HIDDEN35_DEFAULT 0xdc
|
||||
|
||||
#define HIDDEN36 0x36
|
||||
#define HIDDEN36_DEFAULT 0xfc
|
||||
|
||||
#define HIDDEN37 0x37
|
||||
#define HIDDEN37_DEFAULT 0xac
|
||||
|
||||
#define HIDDEN3A 0x3a
|
||||
#define HIDDEN3A_DEFAULT 0xf8
|
||||
|
||||
#define HIDDEN3C 0x3c
|
||||
#define HIDDEN3C_DEFAULT 0xd3
|
||||
|
||||
#define HIDDEN3D 0x3d
|
||||
#define HIDDEN3D_DEFAULT 0x23
|
||||
|
||||
#define HIDDEN3E 0x3e
|
||||
#define HIDDEN3E_DEFAULT 0x81
|
||||
|
||||
#define HIDDEN3F 0x3f
|
||||
#define HIDDEN3F_DEFAULT 0x46
|
||||
|
||||
|
||||
#endif /* __CS42L55_H__ */
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: wmcodec.h 17847 2008-06-28 18:10:04Z bagder $
|
||||
*
|
||||
* Copyright (C) 2006 by Marcoen Hirschberg
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
unsigned char cscodec_read(int reg);
|
||||
void cscodec_write(int reg, unsigned char data);
|
||||
void cscodec_power(bool state);
|
||||
void cscodec_clock(bool state);
|
||||
void cscodec_reset(bool state);
|
||||
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: i2c-s5l8700.h 21533 2009-06-27 20:11:11Z bertrik $
|
||||
*
|
||||
* Copyright (C) 2009 by Bertrik Sikken
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef _I2C_S5l8702_H
|
||||
#define _I2C_S5l8702_H
|
||||
|
||||
#include "config.h"
|
||||
|
||||
void i2c_init(void);
|
||||
int i2c_write(int bus, unsigned char slave, int address, int len, const unsigned char *data);
|
||||
int i2c_read(int bus, unsigned char slave, int address, int len, unsigned char *data);
|
||||
|
||||
#endif /* _I2C_S5l8702_H */
|
||||
|
||||
|
|
@ -0,0 +1,631 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: s5l8700.h 28791 2010-12-11 09:39:33Z Buschel $
|
||||
*
|
||||
* Copyright (C) 2008 by Marcoen Hirschberg, Bart van Adrichem
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __S5L8702_H__
|
||||
#define __S5L8702_H__
|
||||
|
||||
#include <inttypes.h>
|
||||
|
||||
#define REG8_PTR_T volatile uint8_t *
|
||||
#define REG16_PTR_T volatile uint16_t *
|
||||
#define REG32_PTR_T volatile uint32_t *
|
||||
|
||||
//TODO: Figure out
|
||||
#define TIMER_FREQ (1843200 * 4 * 26 / 1 / 4) /* 47923200 Hz */
|
||||
|
||||
#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
|
||||
|
||||
#define DRAM_ORIG 0x08000000
|
||||
#define IRAM_ORIG 0
|
||||
|
||||
#define DRAM_SIZE (MEMORYSIZE * 0x100000)
|
||||
#define IRAM_SIZE 0x40000
|
||||
|
||||
#define TTB_SIZE 0x4000
|
||||
#define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE)
|
||||
|
||||
/////SYSCON/////
|
||||
#define CLKCON0C (*((uint32_t volatile*)(0x3C50000C)))
|
||||
#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 \
|
||||
+ ((i) == 4 ? 0x6C : \
|
||||
((i) == 3 ? 0x68 : \
|
||||
((i) == 2 ? 0x58 : \
|
||||
((i) == 1 ? 0x4C : \
|
||||
0x48)))))))
|
||||
|
||||
|
||||
/////TIMER/////
|
||||
#define TACON (*((uint32_t volatile*)(0x3C700000)))
|
||||
#define TACMD (*((uint32_t volatile*)(0x3C700004)))
|
||||
#define TADATA0 (*((uint32_t volatile*)(0x3C700008)))
|
||||
#define TADATA1 (*((uint32_t volatile*)(0x3C70000C)))
|
||||
#define TAPRE (*((uint32_t volatile*)(0x3C700010)))
|
||||
#define TACNT (*((uint32_t volatile*)(0x3C700014)))
|
||||
#define TBCON (*((uint32_t volatile*)(0x3C700020)))
|
||||
#define TBCMD (*((uint32_t volatile*)(0x3C700024)))
|
||||
#define TBDATA0 (*((uint32_t volatile*)(0x3C700028)))
|
||||
#define TBDATA1 (*((uint32_t volatile*)(0x3C70002C)))
|
||||
#define TBPRE (*((uint32_t volatile*)(0x3C700030)))
|
||||
#define TBCNT (*((uint32_t volatile*)(0x3C700034)))
|
||||
#define TCCON (*((uint32_t volatile*)(0x3C700040)))
|
||||
#define TCCMD (*((uint32_t volatile*)(0x3C700044)))
|
||||
#define TCDATA0 (*((uint32_t volatile*)(0x3C700048)))
|
||||
#define TCDATA1 (*((uint32_t volatile*)(0x3C70004C)))
|
||||
#define TCPRE (*((uint32_t volatile*)(0x3C700050)))
|
||||
#define TCCNT (*((uint32_t volatile*)(0x3C700054)))
|
||||
#define TDCON (*((uint32_t volatile*)(0x3C700060)))
|
||||
#define TDCMD (*((uint32_t volatile*)(0x3C700064)))
|
||||
#define TDDATA0 (*((uint32_t volatile*)(0x3C700068)))
|
||||
#define TDDATA1 (*((uint32_t volatile*)(0x3C70006C)))
|
||||
#define TDPRE (*((uint32_t volatile*)(0x3C700070)))
|
||||
#define TDCNT (*((uint32_t volatile*)(0x3C700074)))
|
||||
#define TECON (*((uint32_t volatile*)(0x3C7000A0)))
|
||||
#define TECMD (*((uint32_t volatile*)(0x3C7000A4)))
|
||||
#define TEDATA0 (*((uint32_t volatile*)(0x3C7000A8)))
|
||||
#define TEDATA1 (*((uint32_t volatile*)(0x3C7000AC)))
|
||||
#define TEPRE (*((uint32_t volatile*)(0x3C7000B0)))
|
||||
#define TECNT (*((uint32_t volatile*)(0x3C7000B4)))
|
||||
#define TFCON (*((uint32_t volatile*)(0x3C7000C0)))
|
||||
#define TFCMD (*((uint32_t volatile*)(0x3C7000C4)))
|
||||
#define TFDATA0 (*((uint32_t volatile*)(0x3C7000C8)))
|
||||
#define TFDATA1 (*((uint32_t volatile*)(0x3C7000CC)))
|
||||
#define TFPRE (*((uint32_t volatile*)(0x3C7000D0)))
|
||||
#define TFCNT (*((uint32_t volatile*)(0x3C7000D4)))
|
||||
#define TGCON (*((uint32_t volatile*)(0x3C7000E0)))
|
||||
#define TGCMD (*((uint32_t volatile*)(0x3C7000E4)))
|
||||
#define TGDATA0 (*((uint32_t volatile*)(0x3C7000E8)))
|
||||
#define TGDATA1 (*((uint32_t volatile*)(0x3C7000EC)))
|
||||
#define TGPRE (*((uint32_t volatile*)(0x3C7000F0)))
|
||||
#define TGCNT (*((uint32_t volatile*)(0x3C7000F4)))
|
||||
#define THCON (*((uint32_t volatile*)(0x3C700100)))
|
||||
#define THCMD (*((uint32_t volatile*)(0x3C700104)))
|
||||
#define THDATA0 (*((uint32_t volatile*)(0x3C700108)))
|
||||
#define THDATA1 (*((uint32_t volatile*)(0x3C70010C)))
|
||||
#define THPRE (*((uint32_t volatile*)(0x3C700110)))
|
||||
#define THCNT (*((uint32_t volatile*)(0x3C700114)))
|
||||
#define USEC_TIMER TFCNT
|
||||
|
||||
|
||||
/////USB/////
|
||||
#define OTGBASE 0x38400000
|
||||
#define PHYBASE 0x3C400000
|
||||
#define SYNOPSYSOTG_CLOCK 0
|
||||
#define SYNOPSYSOTG_AHBCFG 0x2B
|
||||
|
||||
|
||||
/////I2C/////
|
||||
#define IICCON(bus) (*((uint32_t volatile*)(0x3C600000 + 0x300000 * (bus))))
|
||||
#define IICSTAT(bus) (*((uint32_t volatile*)(0x3C600004 + 0x300000 * (bus))))
|
||||
#define IICADD(bus) (*((uint32_t volatile*)(0x3C600008 + 0x300000 * (bus))))
|
||||
#define IICDS(bus) (*((uint32_t volatile*)(0x3C60000C + 0x300000 * (bus))))
|
||||
|
||||
|
||||
/////INTERRUPT CONTROLLERS/////
|
||||
#define VICIRQSTATUS(v) (*((uint32_t volatile*)(0x38E00000 + 0x1000 * (v))))
|
||||
#define VICFIQSTATUS(v) (*((uint32_t volatile*)(0x38E00004 + 0x1000 * (v))))
|
||||
#define VICRAWINTR(v) (*((uint32_t volatile*)(0x38E00008 + 0x1000 * (v))))
|
||||
#define VICINTSELECT(v) (*((uint32_t volatile*)(0x38E0000C + 0x1000 * (v))))
|
||||
#define VICINTENABLE(v) (*((uint32_t volatile*)(0x38E00010 + 0x1000 * (v))))
|
||||
#define VICINTENCLEAR(v) (*((uint32_t volatile*)(0x38E00014 + 0x1000 * (v))))
|
||||
#define VICSOFTINT(v) (*((uint32_t volatile*)(0x38E00018 + 0x1000 * (v))))
|
||||
#define VICSOFTINTCLEAR(v) (*((uint32_t volatile*)(0x38E0001C + 0x1000 * (v))))
|
||||
#define VICPROTECTION(v) (*((uint32_t volatile*)(0x38E00020 + 0x1000 * (v))))
|
||||
#define VICSWPRIORITYMASK(v) (*((uint32_t volatile*)(0x38E00024 + 0x1000 * (v))))
|
||||
#define VICPRIORITYDAISY(v) (*((uint32_t volatile*)(0x38E00028 + 0x1000 * (v))))
|
||||
#define VICVECTADDR(v, i) (*((uint32_t volatile*)(0x38E00100 + 0x1000 * (v) + 4 * (i))))
|
||||
#define VICVECTPRIORITY(v, i) (*((uint32_t volatile*)(0x38E00200 + 0x1000 * (v) + 4 * (i))))
|
||||
#define VICADDRESS(v) (*((const void* volatile*)(0x38E00F00 + 0x1000 * (v))))
|
||||
#define VIC0IRQSTATUS (*((uint32_t volatile*)(0x38E00000)))
|
||||
#define VIC0FIQSTATUS (*((uint32_t volatile*)(0x38E00004)))
|
||||
#define VIC0RAWINTR (*((uint32_t volatile*)(0x38E00008)))
|
||||
#define VIC0INTSELECT (*((uint32_t volatile*)(0x38E0000C)))
|
||||
#define VIC0INTENABLE (*((uint32_t volatile*)(0x38E00010)))
|
||||
#define VIC0INTENCLEAR (*((uint32_t volatile*)(0x38E00014)))
|
||||
#define VIC0SOFTINT (*((uint32_t volatile*)(0x38E00018)))
|
||||
#define VIC0SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0001C)))
|
||||
#define VIC0PROTECTION (*((uint32_t volatile*)(0x38E00020)))
|
||||
#define VIC0SWPRIORITYMASK (*((uint32_t volatile*)(0x38E00024)))
|
||||
#define VIC0PRIORITYDAISY (*((uint32_t volatile*)(0x38E00028)))
|
||||
#define VIC0VECTADDR(i) (*((const void* volatile*)(0x38E00100 + 4 * (i))))
|
||||
#define VIC0VECTADDR0 (*((const void* volatile*)(0x38E00100)))
|
||||
#define VIC0VECTADDR1 (*((const void* volatile*)(0x38E00104)))
|
||||
#define VIC0VECTADDR2 (*((const void* volatile*)(0x38E00108)))
|
||||
#define VIC0VECTADDR3 (*((const void* volatile*)(0x38E0010C)))
|
||||
#define VIC0VECTADDR4 (*((const void* volatile*)(0x38E00110)))
|
||||
#define VIC0VECTADDR5 (*((const void* volatile*)(0x38E00114)))
|
||||
#define VIC0VECTADDR6 (*((const void* volatile*)(0x38E00118)))
|
||||
#define VIC0VECTADDR7 (*((const void* volatile*)(0x38E0011C)))
|
||||
#define VIC0VECTADDR8 (*((const void* volatile*)(0x38E00120)))
|
||||
#define VIC0VECTADDR9 (*((const void* volatile*)(0x38E00124)))
|
||||
#define VIC0VECTADDR10 (*((const void* volatile*)(0x38E00128)))
|
||||
#define VIC0VECTADDR11 (*((const void* volatile*)(0x38E0012C)))
|
||||
#define VIC0VECTADDR12 (*((const void* volatile*)(0x38E00130)))
|
||||
#define VIC0VECTADDR13 (*((const void* volatile*)(0x38E00134)))
|
||||
#define VIC0VECTADDR14 (*((const void* volatile*)(0x38E00138)))
|
||||
#define VIC0VECTADDR15 (*((const void* volatile*)(0x38E0013C)))
|
||||
#define VIC0VECTADDR16 (*((const void* volatile*)(0x38E00140)))
|
||||
#define VIC0VECTADDR17 (*((const void* volatile*)(0x38E00144)))
|
||||
#define VIC0VECTADDR18 (*((const void* volatile*)(0x38E00148)))
|
||||
#define VIC0VECTADDR19 (*((const void* volatile*)(0x38E0014C)))
|
||||
#define VIC0VECTADDR20 (*((const void* volatile*)(0x38E00150)))
|
||||
#define VIC0VECTADDR21 (*((const void* volatile*)(0x38E00154)))
|
||||
#define VIC0VECTADDR22 (*((const void* volatile*)(0x38E00158)))
|
||||
#define VIC0VECTADDR23 (*((const void* volatile*)(0x38E0015C)))
|
||||
#define VIC0VECTADDR24 (*((const void* volatile*)(0x38E00160)))
|
||||
#define VIC0VECTADDR25 (*((const void* volatile*)(0x38E00164)))
|
||||
#define VIC0VECTADDR26 (*((const void* volatile*)(0x38E00168)))
|
||||
#define VIC0VECTADDR27 (*((const void* volatile*)(0x38E0016C)))
|
||||
#define VIC0VECTADDR28 (*((const void* volatile*)(0x38E00170)))
|
||||
#define VIC0VECTADDR29 (*((const void* volatile*)(0x38E00174)))
|
||||
#define VIC0VECTADDR30 (*((const void* volatile*)(0x38E00178)))
|
||||
#define VIC0VECTADDR31 (*((const void* volatile*)(0x38E0017C)))
|
||||
#define VIC0VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E00200 + 4 * (i))))
|
||||
#define VIC0VECTPRIORITY0 (*((uint32_t volatile*)(0x38E00200)))
|
||||
#define VIC0VECTPRIORITY1 (*((uint32_t volatile*)(0x38E00204)))
|
||||
#define VIC0VECTPRIORITY2 (*((uint32_t volatile*)(0x38E00208)))
|
||||
#define VIC0VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0020C)))
|
||||
#define VIC0VECTPRIORITY4 (*((uint32_t volatile*)(0x38E00210)))
|
||||
#define VIC0VECTPRIORITY5 (*((uint32_t volatile*)(0x38E00214)))
|
||||
#define VIC0VECTPRIORITY6 (*((uint32_t volatile*)(0x38E00218)))
|
||||
#define VIC0VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0021C)))
|
||||
#define VIC0VECTPRIORITY8 (*((uint32_t volatile*)(0x38E00220)))
|
||||
#define VIC0VECTPRIORITY9 (*((uint32_t volatile*)(0x38E00224)))
|
||||
#define VIC0VECTPRIORITY10 (*((uint32_t volatile*)(0x38E00228)))
|
||||
#define VIC0VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0022C)))
|
||||
#define VIC0VECTPRIORITY12 (*((uint32_t volatile*)(0x38E00230)))
|
||||
#define VIC0VECTPRIORITY13 (*((uint32_t volatile*)(0x38E00234)))
|
||||
#define VIC0VECTPRIORITY14 (*((uint32_t volatile*)(0x38E00238)))
|
||||
#define VIC0VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0023C)))
|
||||
#define VIC0VECTPRIORITY16 (*((uint32_t volatile*)(0x38E00240)))
|
||||
#define VIC0VECTPRIORITY17 (*((uint32_t volatile*)(0x38E00244)))
|
||||
#define VIC0VECTPRIORITY18 (*((uint32_t volatile*)(0x38E00248)))
|
||||
#define VIC0VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0024C)))
|
||||
#define VIC0VECTPRIORITY20 (*((uint32_t volatile*)(0x38E00250)))
|
||||
#define VIC0VECTPRIORITY21 (*((uint32_t volatile*)(0x38E00254)))
|
||||
#define VIC0VECTPRIORITY22 (*((uint32_t volatile*)(0x38E00258)))
|
||||
#define VIC0VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0025C)))
|
||||
#define VIC0VECTPRIORITY24 (*((uint32_t volatile*)(0x38E00260)))
|
||||
#define VIC0VECTPRIORITY25 (*((uint32_t volatile*)(0x38E00264)))
|
||||
#define VIC0VECTPRIORITY26 (*((uint32_t volatile*)(0x38E00268)))
|
||||
#define VIC0VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0026C)))
|
||||
#define VIC0VECTPRIORITY28 (*((uint32_t volatile*)(0x38E00270)))
|
||||
#define VIC0VECTPRIORITY29 (*((uint32_t volatile*)(0x38E00274)))
|
||||
#define VIC0VECTPRIORITY30 (*((uint32_t volatile*)(0x38E00278)))
|
||||
#define VIC0VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0027C)))
|
||||
#define VIC0ADDRESS (*((void* volatile*)(0x38E00F00)))
|
||||
#define VIC1IRQSTATUS (*((uint32_t volatile*)(0x38E01000)))
|
||||
#define VIC1FIQSTATUS (*((uint32_t volatile*)(0x38E01004)))
|
||||
#define VIC1RAWINTR (*((uint32_t volatile*)(0x38E01008)))
|
||||
#define VIC1INTSELECT (*((uint32_t volatile*)(0x38E0100C)))
|
||||
#define VIC1INTENABLE (*((uint32_t volatile*)(0x38E01010)))
|
||||
#define VIC1INTENCLEAR (*((uint32_t volatile*)(0x38E01014)))
|
||||
#define VIC1SOFTINT (*((uint32_t volatile*)(0x38E01018)))
|
||||
#define VIC1SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0101C)))
|
||||
#define VIC1PROTECTION (*((uint32_t volatile*)(0x38E01020)))
|
||||
#define VIC1SWPRIORITYMASK (*((uint32_t volatile*)(0x38E01024)))
|
||||
#define VIC1PRIORITYDAISY (*((uint32_t volatile*)(0x38E01028)))
|
||||
#define VIC1VECTADDR(i) (*((const void* volatile*)(0x38E01100 + 4 * (i))))
|
||||
#define VIC1VECTADDR0 (*((const void* volatile*)(0x38E01100)))
|
||||
#define VIC1VECTADDR1 (*((const void* volatile*)(0x38E01104)))
|
||||
#define VIC1VECTADDR2 (*((const void* volatile*)(0x38E01108)))
|
||||
#define VIC1VECTADDR3 (*((const void* volatile*)(0x38E0110C)))
|
||||
#define VIC1VECTADDR4 (*((const void* volatile*)(0x38E01110)))
|
||||
#define VIC1VECTADDR5 (*((const void* volatile*)(0x38E01114)))
|
||||
#define VIC1VECTADDR6 (*((const void* volatile*)(0x38E01118)))
|
||||
#define VIC1VECTADDR7 (*((const void* volatile*)(0x38E0111C)))
|
||||
#define VIC1VECTADDR8 (*((const void* volatile*)(0x38E01120)))
|
||||
#define VIC1VECTADDR9 (*((const void* volatile*)(0x38E01124)))
|
||||
#define VIC1VECTADDR10 (*((const void* volatile*)(0x38E01128)))
|
||||
#define VIC1VECTADDR11 (*((const void* volatile*)(0x38E0112C)))
|
||||
#define VIC1VECTADDR12 (*((const void* volatile*)(0x38E01130)))
|
||||
#define VIC1VECTADDR13 (*((const void* volatile*)(0x38E01134)))
|
||||
#define VIC1VECTADDR14 (*((const void* volatile*)(0x38E01138)))
|
||||
#define VIC1VECTADDR15 (*((const void* volatile*)(0x38E0113C)))
|
||||
#define VIC1VECTADDR16 (*((const void* volatile*)(0x38E01140)))
|
||||
#define VIC1VECTADDR17 (*((const void* volatile*)(0x38E01144)))
|
||||
#define VIC1VECTADDR18 (*((const void* volatile*)(0x38E01148)))
|
||||
#define VIC1VECTADDR19 (*((const void* volatile*)(0x38E0114C)))
|
||||
#define VIC1VECTADDR20 (*((const void* volatile*)(0x38E01150)))
|
||||
#define VIC1VECTADDR21 (*((const void* volatile*)(0x38E01154)))
|
||||
#define VIC1VECTADDR22 (*((const void* volatile*)(0x38E01158)))
|
||||
#define VIC1VECTADDR23 (*((const void* volatile*)(0x38E0115C)))
|
||||
#define VIC1VECTADDR24 (*((const void* volatile*)(0x38E01160)))
|
||||
#define VIC1VECTADDR25 (*((const void* volatile*)(0x38E01164)))
|
||||
#define VIC1VECTADDR26 (*((const void* volatile*)(0x38E01168)))
|
||||
#define VIC1VECTADDR27 (*((const void* volatile*)(0x38E0116C)))
|
||||
#define VIC1VECTADDR28 (*((const void* volatile*)(0x38E01170)))
|
||||
#define VIC1VECTADDR29 (*((const void* volatile*)(0x38E01174)))
|
||||
#define VIC1VECTADDR30 (*((const void* volatile*)(0x38E01178)))
|
||||
#define VIC1VECTADDR31 (*((const void* volatile*)(0x38E0117C)))
|
||||
#define VIC1VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E01200 + 4 * (i))))
|
||||
#define VIC1VECTPRIORITY0 (*((uint32_t volatile*)(0x38E01200)))
|
||||
#define VIC1VECTPRIORITY1 (*((uint32_t volatile*)(0x38E01204)))
|
||||
#define VIC1VECTPRIORITY2 (*((uint32_t volatile*)(0x38E01208)))
|
||||
#define VIC1VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0120C)))
|
||||
#define VIC1VECTPRIORITY4 (*((uint32_t volatile*)(0x38E01210)))
|
||||
#define VIC1VECTPRIORITY5 (*((uint32_t volatile*)(0x38E01214)))
|
||||
#define VIC1VECTPRIORITY6 (*((uint32_t volatile*)(0x38E01218)))
|
||||
#define VIC1VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0121C)))
|
||||
#define VIC1VECTPRIORITY8 (*((uint32_t volatile*)(0x38E01220)))
|
||||
#define VIC1VECTPRIORITY9 (*((uint32_t volatile*)(0x38E01224)))
|
||||
#define VIC1VECTPRIORITY10 (*((uint32_t volatile*)(0x38E01228)))
|
||||
#define VIC1VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0122C)))
|
||||
#define VIC1VECTPRIORITY12 (*((uint32_t volatile*)(0x38E01230)))
|
||||
#define VIC1VECTPRIORITY13 (*((uint32_t volatile*)(0x38E01234)))
|
||||
#define VIC1VECTPRIORITY14 (*((uint32_t volatile*)(0x38E01238)))
|
||||
#define VIC1VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0123C)))
|
||||
#define VIC1VECTPRIORITY16 (*((uint32_t volatile*)(0x38E01240)))
|
||||
#define VIC1VECTPRIORITY17 (*((uint32_t volatile*)(0x38E01244)))
|
||||
#define VIC1VECTPRIORITY18 (*((uint32_t volatile*)(0x38E01248)))
|
||||
#define VIC1VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0124C)))
|
||||
#define VIC1VECTPRIORITY20 (*((uint32_t volatile*)(0x38E01250)))
|
||||
#define VIC1VECTPRIORITY21 (*((uint32_t volatile*)(0x38E01254)))
|
||||
#define VIC1VECTPRIORITY22 (*((uint32_t volatile*)(0x38E01258)))
|
||||
#define VIC1VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0125C)))
|
||||
#define VIC1VECTPRIORITY24 (*((uint32_t volatile*)(0x38E01260)))
|
||||
#define VIC1VECTPRIORITY25 (*((uint32_t volatile*)(0x38E01264)))
|
||||
#define VIC1VECTPRIORITY26 (*((uint32_t volatile*)(0x38E01268)))
|
||||
#define VIC1VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0126C)))
|
||||
#define VIC1VECTPRIORITY28 (*((uint32_t volatile*)(0x38E01270)))
|
||||
#define VIC1VECTPRIORITY29 (*((uint32_t volatile*)(0x38E01274)))
|
||||
#define VIC1VECTPRIORITY30 (*((uint32_t volatile*)(0x38E01278)))
|
||||
#define VIC1VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0127C)))
|
||||
#define VIC1ADDRESS (*((void* volatile*)(0x38E01F00)))
|
||||
|
||||
|
||||
/////GPIO/////
|
||||
#define PCON(i) (*((uint32_t volatile*)(0x3cf00000 + ((i) << 5))))
|
||||
#define PDAT(i) (*((uint32_t volatile*)(0x3cf00004 + ((i) << 5))))
|
||||
#define PUNA(i) (*((uint32_t volatile*)(0x3cf00008 + ((i) << 5))))
|
||||
#define PUNB(i) (*((uint32_t volatile*)(0x3cf0000c + ((i) << 5))))
|
||||
#define PCON0 (*((uint32_t volatile*)(0x3cf00000)))
|
||||
#define PDAT0 (*((uint32_t volatile*)(0x3cf00004)))
|
||||
#define PCON1 (*((uint32_t volatile*)(0x3cf00020)))
|
||||
#define PDAT1 (*((uint32_t volatile*)(0x3cf00024)))
|
||||
#define PCON2 (*((uint32_t volatile*)(0x3cf00040)))
|
||||
#define PDAT2 (*((uint32_t volatile*)(0x3cf00044)))
|
||||
#define PCON3 (*((uint32_t volatile*)(0x3cf00060)))
|
||||
#define PDAT3 (*((uint32_t volatile*)(0x3cf00064)))
|
||||
#define PCON4 (*((uint32_t volatile*)(0x3cf00080)))
|
||||
#define PDAT4 (*((uint32_t volatile*)(0x3cf00084)))
|
||||
#define PCON5 (*((uint32_t volatile*)(0x3cf000a0)))
|
||||
#define PDAT5 (*((uint32_t volatile*)(0x3cf000a4)))
|
||||
#define PCON6 (*((uint32_t volatile*)(0x3cf000c0)))
|
||||
#define PDAT6 (*((uint32_t volatile*)(0x3cf000c4)))
|
||||
#define PCON7 (*((uint32_t volatile*)(0x3cf000e0)))
|
||||
#define PDAT7 (*((uint32_t volatile*)(0x3cf000e4)))
|
||||
#define PCON8 (*((uint32_t volatile*)(0x3cf00100)))
|
||||
#define PDAT8 (*((uint32_t volatile*)(0x3cf00104)))
|
||||
#define PCON9 (*((uint32_t volatile*)(0x3cf00120)))
|
||||
#define PDAT9 (*((uint32_t volatile*)(0x3cf00124)))
|
||||
#define PCONA (*((uint32_t volatile*)(0x3cf00140)))
|
||||
#define PDATA (*((uint32_t volatile*)(0x3cf00144)))
|
||||
#define PCONB (*((uint32_t volatile*)(0x3cf00160)))
|
||||
#define PDATB (*((uint32_t volatile*)(0x3cf00164)))
|
||||
#define PCONC (*((uint32_t volatile*)(0x3cf00180)))
|
||||
#define PDATC (*((uint32_t volatile*)(0x3cf00184)))
|
||||
#define PCOND (*((uint32_t volatile*)(0x3cf001a0)))
|
||||
#define PDATD (*((uint32_t volatile*)(0x3cf001a4)))
|
||||
#define PCONE (*((uint32_t volatile*)(0x3cf001c0)))
|
||||
#define PDATE (*((uint32_t volatile*)(0x3cf001c4)))
|
||||
#define PCONF (*((uint32_t volatile*)(0x3cf001e0)))
|
||||
#define PDATF (*((uint32_t volatile*)(0x3cf001e4)))
|
||||
#define GPIOCMD (*((uint32_t volatile*)(0x3cf00200)))
|
||||
|
||||
|
||||
/////SPI/////
|
||||
#define SPIBASE(i) ((i) == 2 ? 0x3d200000 : \
|
||||
(i) == 1 ? 0x3ce00000 : \
|
||||
0x3c300000)
|
||||
#define SPICLKGATE(i) ((i) == 2 ? 0x2f : \
|
||||
(i) == 1 ? 0x2b : \
|
||||
0x22)
|
||||
#define SPIDMA(i) ((i) == 2 ? 0xd : \
|
||||
(i) == 1 ? 0xf : \
|
||||
0x5)
|
||||
#define SPICTRL(i) (*((uint32_t volatile*)(SPIBASE(i))))
|
||||
#define SPISETUP(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x4)))
|
||||
#define SPISTATUS(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x8)))
|
||||
#define SPIUNKREG1(i) (*((uint32_t volatile*)(SPIBASE(i) + 0xc)))
|
||||
#define SPITXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x10)))
|
||||
#define SPIRXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x20)))
|
||||
#define SPICLKDIV(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x30)))
|
||||
#define SPIRXLIMIT(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x34)))
|
||||
#define SPIUNKREG3(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x38)))
|
||||
|
||||
|
||||
/////AES/////
|
||||
#define AESCONTROL (*((uint32_t volatile*)(0x38c00000)))
|
||||
#define AESGO (*((uint32_t volatile*)(0x38c00004)))
|
||||
#define AESUNKREG0 (*((uint32_t volatile*)(0x38c00008)))
|
||||
#define AESSTATUS (*((uint32_t volatile*)(0x38c0000c)))
|
||||
#define AESUNKREG1 (*((uint32_t volatile*)(0x38c00010)))
|
||||
#define AESKEYLEN (*((uint32_t volatile*)(0x38c00014)))
|
||||
#define AESOUTSIZE (*((uint32_t volatile*)(0x38c00018)))
|
||||
#define AESOUTADDR (*((void* volatile*)(0x38c00020)))
|
||||
#define AESINSIZE (*((uint32_t volatile*)(0x38c00024)))
|
||||
#define AESINADDR (*((const void* volatile*)(0x38c00028)))
|
||||
#define AESAUXSIZE (*((uint32_t volatile*)(0x38c0002c)))
|
||||
#define AESAUXADDR (*((void* volatile*)(0x38c00030)))
|
||||
#define AESSIZE3 (*((uint32_t volatile*)(0x38c00034)))
|
||||
#define AESKEY ((uint32_t volatile*)(0x38c0004c))
|
||||
#define AESTYPE (*((uint32_t volatile*)(0x38c0006c)))
|
||||
#define AESIV ((uint32_t volatile*)(0x38c00074))
|
||||
#define AESTYPE2 (*((uint32_t volatile*)(0x38c00088)))
|
||||
#define AESUNKREG2 (*((uint32_t volatile*)(0x38c0008c)))
|
||||
|
||||
|
||||
/////SHA1/////
|
||||
#define SHA1CONFIG (*((uint32_t volatile*)(0x38000000)))
|
||||
#define SHA1RESET (*((uint32_t volatile*)(0x38000004)))
|
||||
#define SHA1RESULT ((uint32_t volatile*)(0x38000020))
|
||||
#define SHA1DATAIN ((uint32_t volatile*)(0x38000040))
|
||||
|
||||
|
||||
/////DMA/////
|
||||
#ifndef ASM
|
||||
struct dma_lli
|
||||
{
|
||||
const void* srcaddr;
|
||||
void* dstaddr;
|
||||
const struct dma_lli* nextlli;
|
||||
uint32_t control;
|
||||
};
|
||||
#endif
|
||||
#define DMACINTSTS(d) (*((uint32_t volatile*)(0x38200000 + 0x1700000 * (d))))
|
||||
#define DMACINTTCSTS(d) (*((uint32_t volatile*)(0x38200004 + 0x1700000 * (d))))
|
||||
#define DMACINTTCCLR(d) (*((uint32_t volatile*)(0x38200008 + 0x1700000 * (d))))
|
||||
#define DMACINTERRSTS(d) (*((uint32_t volatile*)(0x3820000c + 0x1700000 * (d))))
|
||||
#define DMACINTERRCLR(d) (*((uint32_t volatile*)(0x38200010 + 0x1700000 * (d))))
|
||||
#define DMACRAWINTTCSTS(d) (*((uint32_t volatile*)(0x38200014 + 0x1700000 * (d))))
|
||||
#define DMACRAWINTERRSTS(d) (*((uint32_t volatile*)(0x38200018 + 0x1700000 * (d))))
|
||||
#define DMACENABLEDCHANS(d) (*((uint32_t volatile*)(0x3820001c + 0x1700000 * (d))))
|
||||
#define DMACSOFTBREQ(d) (*((uint32_t volatile*)(0x38200020 + 0x1700000 * (d))))
|
||||
#define DMACSOFTSREQ(d) (*((uint32_t volatile*)(0x38200024 + 0x1700000 * (d))))
|
||||
#define DMACSOFTLBREQ(d) (*((uint32_t volatile*)(0x38200028 + 0x1700000 * (d))))
|
||||
#define DMACSOFTLSREQ(d) (*((uint32_t volatile*)(0x3820002c + 0x1700000 * (d))))
|
||||
#define DMACCONFIG(d) (*((uint32_t volatile*)(0x38200030 + 0x1700000 * (d))))
|
||||
#define DMACSYNC(d) (*((uint32_t volatile*)(0x38200034 + 0x1700000 * (d))))
|
||||
#define DMACCLLI(d, c) (*((struct dma_lli volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c))))
|
||||
#define DMACCSRCADDR(d, c) (*((const void* volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c))))
|
||||
#define DMACCDESTADDR(d, c) (*((void* volatile*)(0x38200104 + 0x1700000 * (d) + 0x20 * (c))))
|
||||
#define DMACCNEXTLLI(d, c) (*((const void* volatile*)(0x38200108 + 0x1700000 * (d) + 0x20 * (c))))
|
||||
#define DMACCCONTROL(d, c) (*((uint32_t volatile*)(0x3820010c + 0x1700000 * (d) + 0x20 * (c))))
|
||||
#define DMACCCONFIG(d, c) (*((uint32_t volatile*)(0x38200110 + 0x1700000 * (d) + 0x20 * (c))))
|
||||
#define DMAC0INTSTS (*((uint32_t volatile*)(0x38200000)))
|
||||
#define DMAC0INTTCSTS (*((uint32_t volatile*)(0x38200004)))
|
||||
#define DMAC0INTTCCLR (*((uint32_t volatile*)(0x38200008)))
|
||||
#define DMAC0INTERRSTS (*((uint32_t volatile*)(0x3820000c)))
|
||||
#define DMAC0INTERRCLR (*((uint32_t volatile*)(0x38200010)))
|
||||
#define DMAC0RAWINTTCSTS (*((uint32_t volatile*)(0x38200014)))
|
||||
#define DMAC0RAWINTERRSTS (*((uint32_t volatile*)(0x38200018)))
|
||||
#define DMAC0ENABLEDCHANS (*((uint32_t volatile*)(0x3820001c)))
|
||||
#define DMAC0SOFTBREQ (*((uint32_t volatile*)(0x38200020)))
|
||||
#define DMAC0SOFTSREQ (*((uint32_t volatile*)(0x38200024)))
|
||||
#define DMAC0SOFTLBREQ (*((uint32_t volatile*)(0x38200028)))
|
||||
#define DMAC0SOFTLSREQ (*((uint32_t volatile*)(0x3820002c)))
|
||||
#define DMAC0CONFIG (*((uint32_t volatile*)(0x38200030)))
|
||||
#define DMAC0SYNC (*((uint32_t volatile*)(0x38200034)))
|
||||
#define DMAC0CLLI(c) (*((struct dma_lli volatile*)(0x38200100 + 0x20 * (c))))
|
||||
#define DMAC0CSRCADDR(c) (*((const void* volatile*)(0x38200100 + 0x20 * (c))))
|
||||
#define DMAC0CDESTADDR(c) (*((void* volatile*)(0x38200104 + 0x20 * (c))))
|
||||
#define DMAC0CNEXTLLI(c) (*((const void* volatile*)(0x38200108 + 0x20 * (c))))
|
||||
#define DMAC0CCONTROL(c) (*((uint32_t volatile*)(0x3820010c + 0x20 * (c))))
|
||||
#define DMAC0CCONFIG(c) (*((uint32_t volatile*)(0x38200110 + 0x20 * (c))))
|
||||
#define DMAC0C0LLI (*((struct dma_lli volatile*)(0x38200100)))
|
||||
#define DMAC0C0SRCADDR (*((const void* volatile*)(0x38200100)))
|
||||
#define DMAC0C0DESTADDR (*((void* volatile*)(0x38200104)))
|
||||
#define DMAC0C0NEXTLLI (*((const struct dma_lli* volatile*)(0x38200108)))
|
||||
#define DMAC0C0CONTROL (*((uint32_t volatile*)(0x3820010c)))
|
||||
#define DMAC0C0CONFIG (*((uint32_t volatile*)(0x38200110)))
|
||||
#define DMAC0C1LLI (*((struct dma_lli volatile*)(0x38200120)))
|
||||
#define DMAC0C1SRCADDR (*((const void* volatile*)(0x38200120)))
|
||||
#define DMAC0C1DESTADDR (*((void* volatile*)(0x38200124)))
|
||||
#define DMAC0C1NEXTLLI (*((const struct dma_lli* volatile*)(0x38200128)))
|
||||
#define DMAC0C1CONTROL (*((uint32_t volatile*)(0x3820012c)))
|
||||
#define DMAC0C1CONFIG (*((uint32_t volatile*)(0x38200130)))
|
||||
#define DMAC0C2LLI (*((struct dma_lli volatile*)(0x38200140)))
|
||||
#define DMAC0C2SRCADDR (*((const void* volatile*)(0x38200140)))
|
||||
#define DMAC0C2DESTADDR (*((void* volatile*)(0x38200144)))
|
||||
#define DMAC0C2NEXTLLI (*((const struct dma_lli* volatile*)(0x38200148)))
|
||||
#define DMAC0C2CONTROL (*((uint32_t volatile*)(0x3820014c)))
|
||||
#define DMAC0C2CONFIG (*((uint32_t volatile*)(0x38200150)))
|
||||
#define DMAC0C3LLI (*((struct dma_lli volatile*)(0x38200160)))
|
||||
#define DMAC0C3SRCADDR (*((const void* volatile*)(0x38200160)))
|
||||
#define DMAC0C3DESTADDR (*((void* volatile*)(0x38200164)))
|
||||
#define DMAC0C3NEXTLLI (*((const struct dma_lli* volatile*)(0x38200168)))
|
||||
#define DMAC0C3CONTROL (*((uint32_t volatile*)(0x3820016c)))
|
||||
#define DMAC0C3CONFIG (*((uint32_t volatile*)(0x38200170)))
|
||||
#define DMAC0C4LLI (*((struct dma_lli volatile*)(0x38200180)))
|
||||
#define DMAC0C4SRCADDR (*((const void* volatile*)(0x38200180)))
|
||||
#define DMAC0C4DESTADDR (*((void* volatile*)(0x38200184)))
|
||||
#define DMAC0C4NEXTLLI (*((const struct dma_lli* volatile*)(0x38200188)))
|
||||
#define DMAC0C4CONTROL (*((uint32_t volatile*)(0x3820018c)))
|
||||
#define DMAC0C4CONFIG (*((uint32_t volatile*)(0x38200190)))
|
||||
#define DMAC0C5LLI (*((struct dma_lli volatile*)(0x382001a0)))
|
||||
#define DMAC0C5SRCADDR (*((const void* volatile*)(0x382001a0)))
|
||||
#define DMAC0C5DESTADDR (*((void* volatile*)(0x382001a4)))
|
||||
#define DMAC0C5NEXTLLI (*((const struct dma_lli* volatile*)(0x382001a8)))
|
||||
#define DMAC0C5CONTROL (*((uint32_t volatile*)(0x382001ac)))
|
||||
#define DMAC0C5CONFIG (*((uint32_t volatile*)(0x382001b0)))
|
||||
#define DMAC0C6LLI (*((struct dma_lli volatile*)(0x382001c0)))
|
||||
#define DMAC0C6SRCADDR (*((const void* volatile*)(0x382001c0)))
|
||||
#define DMAC0C6DESTADDR (*((void* volatile*)(0x382001c4)))
|
||||
#define DMAC0C6NEXTLLI (*((const struct dma_lli* volatile*)(0x382001c8)))
|
||||
#define DMAC0C6CONTROL (*((uint32_t volatile*)(0x382001cc)))
|
||||
#define DMAC0C6CONFIG (*((uint32_t volatile*)(0x382001d0)))
|
||||
#define DMAC0C7LLI (*((struct dma_lli volatile*)(0x382001e0)))
|
||||
#define DMAC0C7SRCADDR (*((const void* volatile*)(0x382001e0)))
|
||||
#define DMAC0C7DESTADDR (*((void* volatile*)(0x382001e4)))
|
||||
#define DMAC0C7NEXTLLI (*((const struct dma_lli* volatile*)(0x382001e8)))
|
||||
#define DMAC0C7CONTROL (*((uint32_t volatile*)(0x382001ec)))
|
||||
#define DMAC0C7CONFIG (*((uint32_t volatile*)(0x382001f0)))
|
||||
#define DMAC1INTSTS (*((uint32_t volatile*)(0x39900000)))
|
||||
#define DMAC1INTTCSTS (*((uint32_t volatile*)(0x39900004)))
|
||||
#define DMAC1INTTCCLR (*((uint32_t volatile*)(0x39900008)))
|
||||
#define DMAC1INTERRSTS (*((uint32_t volatile*)(0x3990000c)))
|
||||
#define DMAC1INTERRCLR (*((uint32_t volatile*)(0x39900010)))
|
||||
#define DMAC1RAWINTTCSTS (*((uint32_t volatile*)(0x39900014)))
|
||||
#define DMAC1RAWINTERRSTS (*((uint32_t volatile*)(0x39900018)))
|
||||
#define DMAC1ENABLEDCHANS (*((uint32_t volatile*)(0x3990001c)))
|
||||
#define DMAC1SOFTBREQ (*((uint32_t volatile*)(0x39900020)))
|
||||
#define DMAC1SOFTSREQ (*((uint32_t volatile*)(0x39900024)))
|
||||
#define DMAC1SOFTLBREQ (*((uint32_t volatile*)(0x39900028)))
|
||||
#define DMAC1SOFTLSREQ (*((uint32_t volatile*)(0x3990002c)))
|
||||
#define DMAC1CONFIG (*((uint32_t volatile*)(0x39900030)))
|
||||
#define DMAC1SYNC (*((uint32_t volatile*)(0x39900034)))
|
||||
#define DMAC1CLLI(c) (*((struct dma_lli volatile*)(0x39900100 + 0x20 * (c))))
|
||||
#define DMAC1CSRCADDR(c) (*((const void* volatile*)(0x39900100 + 0x20 * (c))))
|
||||
#define DMAC1CDESTADDR(c) (*((void* volatile*)(0x39900104 + 0x20 * (c))))
|
||||
#define DMAC1CNEXTLLI(c) (*((const void* volatile*)(0x39900108 + 0x20 * (c))))
|
||||
#define DMAC1CCONTROL(c) (*((uint32_t volatile*)(0x3990010c + 0x20 * (c))))
|
||||
#define DMAC1CCONFIG(c) (*((uint32_t volatile*)(0x39900110 + 0x20 * (c))))
|
||||
#define DMAC1C0LLI (*((struct dma_lli volatile*)(0x39900100)))
|
||||
#define DMAC1C0SRCADDR (*((const void* volatile*)(0x39900100)))
|
||||
#define DMAC1C0DESTADDR (*((void* volatile*)(0x39900104)))
|
||||
#define DMAC1C0NEXTLLI (*((const struct dma_lli* volatile*)(0x39900108)))
|
||||
#define DMAC1C0CONTROL (*((uint32_t volatile*)(0x3990010c)))
|
||||
#define DMAC1C0CONFIG (*((uint32_t volatile*)(0x39900110)))
|
||||
#define DMAC1C1LLI (*((struct dma_lli volatile*)(0x39900120)))
|
||||
#define DMAC1C1SRCADDR (*((const void* volatile*)(0x39900120)))
|
||||
#define DMAC1C1DESTADDR (*((void* volatile*)(0x39900124)))
|
||||
#define DMAC1C1NEXTLLI (*((const struct dma_lli* volatile*)(0x39900128)))
|
||||
#define DMAC1C1CONTROL (*((uint32_t volatile*)(0x3990012c)))
|
||||
#define DMAC1C1CONFIG (*((uint32_t volatile*)(0x39900130)))
|
||||
#define DMAC1C2LLI (*((struct dma_lli volatile*)(0x39900140)))
|
||||
#define DMAC1C2SRCADDR (*((const void* volatile*)(0x39900140)))
|
||||
#define DMAC1C2DESTADDR (*((void* volatile*)(0x39900144)))
|
||||
#define DMAC1C2NEXTLLI (*((const struct dma_lli* volatile*)(0x39900148)))
|
||||
#define DMAC1C2CONTROL (*((uint32_t volatile*)(0x3990014c)))
|
||||
#define DMAC1C2CONFIG (*((uint32_t volatile*)(0x39900150)))
|
||||
#define DMAC1C3LLI (*((struct dma_lli volatile*)(0x39900160)))
|
||||
#define DMAC1C3SRCADDR (*((const void* volatile*)(0x39900160)))
|
||||
#define DMAC1C3DESTADDR (*((void* volatile*)(0x39900164)))
|
||||
#define DMAC1C3NEXTLLI (*((volatile void**)(0x39900168)))
|
||||
#define DMAC1C3CONTROL (*((uint32_t volatile*)(0x3990016c)))
|
||||
#define DMAC1C3CONFIG (*((uint32_t volatile*)(0x39900170)))
|
||||
#define DMAC1C4LLI (*((struct dma_lli volatile*)(0x39900180)))
|
||||
#define DMAC1C4SRCADDR (*((const void* volatile*)(0x39900180)))
|
||||
#define DMAC1C4DESTADDR (*((void* volatile*)(0x39900184)))
|
||||
#define DMAC1C4NEXTLLI (*((const struct dma_lli* volatile*)(0x39900188)))
|
||||
#define DMAC1C4CONTROL (*((uint32_t volatile*)(0x3990018c)))
|
||||
#define DMAC1C4CONFIG (*((uint32_t volatile*)(0x39900190)))
|
||||
#define DMAC1C5LLI (*((struct dma_lli volatile*)(0x399001a0)))
|
||||
#define DMAC1C5SRCADDR (*((const void* volatile*)(0x399001a0)))
|
||||
#define DMAC1C5DESTADDR (*((void* volatile*)(0x399001a4)))
|
||||
#define DMAC1C5NEXTLLI (*((const struct dma_lli* volatile*)(0x399001a8)))
|
||||
#define DMAC1C5CONTROL (*((uint32_t volatile*)(0x399001ac)))
|
||||
#define DMAC1C5CONFIG (*((uint32_t volatile*)(0x399001b0)))
|
||||
#define DMAC1C6LLI (*((struct dma_lli volatile*)(0x399001c0)))
|
||||
#define DMAC1C6SRCADDR (*((const void* volatile*)(0x399001c0)))
|
||||
#define DMAC1C6DESTADDR (*((void* volatile*)(0x399001c4)))
|
||||
#define DMAC1C6NEXTLLI (*((const struct dma_lli* volatile*)(0x399001c8)))
|
||||
#define DMAC1C6CONTROL (*((uint32_t volatile*)(0x399001cc)))
|
||||
#define DMAC1C6CONFIG (*((uint32_t volatile*)(0x399001d0)))
|
||||
#define DMAC1C7LLI (*((struct dma_lli volatile*)(0x399001e0)))
|
||||
#define DMAC1C7SRCADDR (*((const void* volatile*)(0x399001e0)))
|
||||
#define DMAC1C7DESTADDR (*((void* volatile*)(0x399001e4)))
|
||||
#define DMAC1C7NEXTLLI (*((const struct dma_lli* volatile*)(0x399001e8)))
|
||||
#define DMAC1C7CONTROL (*((uint32_t volatile*)(0x399001ec)))
|
||||
#define DMAC1C7CONFIG (*((uint32_t volatile*)(0x399001f0)))
|
||||
|
||||
|
||||
/////LCD/////
|
||||
#define LCD_BASE (*((uint32_t volatile*)(0x38300000)))
|
||||
#define LCD_WCMD (*((uint32_t volatile*)(0x38300004)))
|
||||
#define LCD_STATUS (*((uint32_t volatile*)(0x3830001c)))
|
||||
#define LCD_WDATA (*((uint32_t volatile*)(0x38300040)))
|
||||
|
||||
|
||||
/////ATA/////
|
||||
#define ATA_CCONTROL (*((uint32_t volatile*)(0x38700000)))
|
||||
#define ATA_CSTATUS (*((uint32_t volatile*)(0x38700004)))
|
||||
#define ATA_CCOMMAND (*((uint32_t volatile*)(0x38700008)))
|
||||
#define ATA_SWRST (*((uint32_t volatile*)(0x3870000c)))
|
||||
#define ATA_IRQ (*((uint32_t volatile*)(0x38700010)))
|
||||
#define ATA_IRQ_MASK (*((uint32_t volatile*)(0x38700014)))
|
||||
#define ATA_CFG (*((uint32_t volatile*)(0x38700018)))
|
||||
#define ATA_MDMA_TIME (*((uint32_t volatile*)(0x38700028)))
|
||||
#define ATA_PIO_TIME (*((uint32_t volatile*)(0x3870002c)))
|
||||
#define ATA_UDMA_TIME (*((uint32_t volatile*)(0x38700030)))
|
||||
#define ATA_XFR_NUM (*((uint32_t volatile*)(0x38700034)))
|
||||
#define ATA_XFR_CNT (*((uint32_t volatile*)(0x38700038)))
|
||||
#define ATA_TBUF_START (*((void* volatile*)(0x3870003c)))
|
||||
#define ATA_TBUF_SIZE (*((uint32_t volatile*)(0x38700040)))
|
||||
#define ATA_SBUF_START (*((void* volatile*)(0x38700044)))
|
||||
#define ATA_SBUF_SIZE (*((uint32_t volatile*)(0x38700048)))
|
||||
#define ATA_CADR_TBUF (*((void* volatile*)(0x3870004c)))
|
||||
#define ATA_CADR_SBUF (*((void* volatile*)(0x38700050)))
|
||||
#define ATA_DATA ((uint32_t volatile*)(0x38700054))
|
||||
#define ATA_ERROR ((uint32_t volatile*)(0x38700058))
|
||||
#define ATA_NSECTOR ((uint32_t volatile*)(0x3870005c))
|
||||
#define ATA_SECTOR ((uint32_t volatile*)(0x38700060))
|
||||
#define ATA_LCYL ((uint32_t volatile*)(0x38700064))
|
||||
#define ATA_HCYL ((uint32_t volatile*)(0x38700068))
|
||||
#define ATA_SELECT ((uint32_t volatile*)(0x3870006c))
|
||||
#define ATA_COMMAND ((uint32_t volatile*)(0x38700070))
|
||||
#define ATA_CONTROL ((uint32_t volatile*)(0x38700074))
|
||||
#define ATA_PIO_READY (*((uint32_t volatile*)(0x38700078)))
|
||||
#define ATA_PIO_RDATA (*((uint32_t volatile*)(0x3870007c)))
|
||||
#define ATA_BUS_FIFO_STATUS (*((uint32_t volatile*)(0x38700080)))
|
||||
#define ATA_FIFO_STATUS (*((uint32_t volatile*)(0x38700084)))
|
||||
#define ATA_DMA_ADDR (*((void* volatile*)(0x38700088)))
|
||||
|
||||
|
||||
/////CLICKWHEEL/////
|
||||
#define WHEEL00 (*((uint32_t volatile*)(0x3C200000)))
|
||||
#define WHEEL04 (*((uint32_t volatile*)(0x3C200004)))
|
||||
#define WHEEL08 (*((uint32_t volatile*)(0x3C200008)))
|
||||
#define WHEEL0C (*((uint32_t volatile*)(0x3C20000C)))
|
||||
#define WHEEL10 (*((uint32_t volatile*)(0x3C200010)))
|
||||
#define WHEELINT (*((uint32_t volatile*)(0x3C200014)))
|
||||
#define WHEELRX (*((uint32_t volatile*)(0x3C200018)))
|
||||
#define WHEELTX (*((uint32_t volatile*)(0x3C20001C)))
|
||||
|
||||
|
||||
/////I2S/////
|
||||
#define I2SCLKCON (*((volatile uint32_t*)(0x3CA00000)))
|
||||
#define I2STXCON (*((volatile uint32_t*)(0x3CA00004)))
|
||||
#define I2STXCOM (*((volatile uint32_t*)(0x3CA00008)))
|
||||
#define I2STXDB0 (*((volatile uint32_t*)(0x3CA00010)))
|
||||
#define I2SRXCON (*((volatile uint32_t*)(0x3CA00030)))
|
||||
#define I2SRXCOM (*((volatile uint32_t*)(0x3CA00034)))
|
||||
#define I2SRXDB (*((volatile uint32_t*)(0x3CA00038)))
|
||||
#define I2SSTATUS (*((volatile uint32_t*)(0x3CA0003C)))
|
||||
#define I2S40 (*((volatile uint32_t*)(0x3CA00040)))
|
||||
|
||||
|
||||
/////CLOCK GATES/////
|
||||
#define CLOCKGATE_USB_1 2
|
||||
#define CLOCKGATE_USB_2 35
|
||||
|
||||
|
||||
/////INTERRUPTS/////
|
||||
#define IRQ_TIMER 8
|
||||
#define IRQ_USB_FUNC 19
|
||||
#define IRQ_DMAC(d) 16 + d
|
||||
#define IRQ_DMAC0 16
|
||||
#define IRQ_DMAC1 17
|
||||
#define IRQ_WHEEL 23
|
||||
#define IRQ_ATA 29
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -18,6 +18,7 @@
|
|||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#define ASM
|
||||
#include "config.h"
|
||||
#include "cpu.h"
|
||||
|
||||
|
|
@ -27,7 +28,7 @@
|
|||
/* MMU present but unused */
|
||||
#define HAVE_TEST_AND_CLEAN_CACHE
|
||||
|
||||
#elif CONFIG_CPU == DM320 || CONFIG_CPU == AS3525v2
|
||||
#elif CONFIG_CPU == DM320 || CONFIG_CPU == AS3525v2 || CONFIG_CPU == S5L8702
|
||||
#define USE_MMU
|
||||
#define HAVE_TEST_AND_CLEAN_CACHE
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,95 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id$
|
||||
*
|
||||
* Copyright (C) 2006-2007 Robert Keevil
|
||||
*
|
||||
* All files in this archive are subject to the GNU General Public License.
|
||||
* See the file COPYING in the source tree root for full license agreement.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include "system.h"
|
||||
#include "kernel.h"
|
||||
#include "piezo.h"
|
||||
|
||||
static unsigned int duration;
|
||||
static bool beeping;
|
||||
|
||||
void INT_TIMERD(void)
|
||||
{
|
||||
/* clear interrupt */
|
||||
TDCON = TDCON;
|
||||
if (!(--duration))
|
||||
{
|
||||
beeping = 0;
|
||||
TDCMD = (1 << 1); /* TD_CLR */
|
||||
}
|
||||
}
|
||||
|
||||
void piezo_start(unsigned short cycles, unsigned short periods)
|
||||
{
|
||||
#ifndef SIMULATOR
|
||||
duration = periods;
|
||||
beeping = 1;
|
||||
/* configure timer for 100 kHz */
|
||||
TDCMD = (1 << 1); /* TD_CLR */
|
||||
TDPRE = 30 - 1; /* prescaler */
|
||||
TDCON = (1 << 13) | /* TD_INT1_EN */
|
||||
(0 << 12) | /* TD_INT0_EN */
|
||||
(0 << 11) | /* TD_START */
|
||||
(2 << 8) | /* TD_CS = PCLK / 16 */
|
||||
(1 << 4); /* TD_MODE_SEL = PWM mode */
|
||||
TDDATA0 = cycles; /* set interval period */
|
||||
TDDATA1 = cycles << 1; /* set interval period */
|
||||
TDCMD = (1 << 0); /* TD_EN */
|
||||
|
||||
/* enable timer interrupt */
|
||||
INTMSK |= INTMSK_TIMERD;
|
||||
#endif
|
||||
}
|
||||
|
||||
void piezo_stop(void)
|
||||
{
|
||||
#ifndef SIMULATOR
|
||||
TDCMD = (1 << 1); /* TD_CLR */
|
||||
#endif
|
||||
}
|
||||
|
||||
void piezo_clear(void)
|
||||
{
|
||||
piezo_stop();
|
||||
}
|
||||
|
||||
bool piezo_busy(void)
|
||||
{
|
||||
return beeping;
|
||||
}
|
||||
|
||||
void piezo_init(void)
|
||||
{
|
||||
beeping = 0;
|
||||
}
|
||||
|
||||
void piezo_button_beep(bool beep, bool force)
|
||||
{
|
||||
if (force)
|
||||
while (beeping)
|
||||
yield();
|
||||
|
||||
if (!beeping)
|
||||
{
|
||||
if (beep)
|
||||
piezo_start(22, 457);
|
||||
else
|
||||
piezo_start(40, 4);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id$
|
||||
*
|
||||
* Copyright (C) 2006-2007 Robert Keevil
|
||||
*
|
||||
* All files in this archive are subject to the GNU General Public License.
|
||||
* See the file COPYING in the source tree root for full license agreement.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void piezo_init(void);
|
||||
void piezo_stop(void);
|
||||
void piezo_clear(void);
|
||||
bool piezo_busy(void);
|
||||
void piezo_button_beep(bool beep, bool force);
|
||||
|
|
@ -0,0 +1,142 @@
|
|||
#define ASM
|
||||
#include "config.h"
|
||||
#include "cpu.h"
|
||||
|
||||
ENTRY(start)
|
||||
|
||||
OUTPUT_FORMAT(elf32-littlearm)
|
||||
OUTPUT_ARCH(arm)
|
||||
STARTUP(target/arm/s5l8702/crt0.o)
|
||||
|
||||
#define PLUGINSIZE PLUGIN_BUFFER_SIZE
|
||||
#define CODECSIZE CODEC_SIZE
|
||||
|
||||
#define IRAMORIG 0x0
|
||||
#define DRAMORIG 0x08000000
|
||||
|
||||
/* End of the audio buffer, where the codec buffer starts */
|
||||
#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
|
||||
|
||||
#define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - TTB_SIZE)
|
||||
#define CODECORIG (ENDAUDIOADDR)
|
||||
#define IRAMSIZE (56*1024) /* 256KB total - 56KB for core, 200KB for codecs */
|
||||
|
||||
/* Where the codec buffer ends, and the plugin buffer starts */
|
||||
#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
|
||||
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
loadaddress = DRAMORIG;
|
||||
|
||||
.intvect : {
|
||||
_intvectstart = . ;
|
||||
*(.intvect)
|
||||
_intvectend = _newstart ;
|
||||
} >IRAM AT> DRAM
|
||||
_intvectcopy = LOADADDR(.intvect) ;
|
||||
|
||||
.text :
|
||||
{
|
||||
_loadaddress = .;
|
||||
_textstart = .;
|
||||
*(.init.text)
|
||||
*(.text)
|
||||
*(.text*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
. = ALIGN(0x4);
|
||||
} > DRAM
|
||||
|
||||
.rodata :
|
||||
{
|
||||
*(.rodata*)
|
||||
. = ALIGN(0x4);
|
||||
} > DRAM
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data*)
|
||||
. = ALIGN(0x4);
|
||||
} > DRAM
|
||||
|
||||
/DISCARD/ :
|
||||
{
|
||||
*(.eh_frame)
|
||||
}
|
||||
|
||||
.iram :
|
||||
{
|
||||
_iramstart = .;
|
||||
*(.icode)
|
||||
*(.irodata)
|
||||
*(.idata)
|
||||
. = ALIGN(0x4);
|
||||
_iramend = .;
|
||||
} > IRAM AT> DRAM
|
||||
_iramcopy = LOADADDR(.iram) ;
|
||||
|
||||
.ibss (NOLOAD) :
|
||||
{
|
||||
_iedata = .;
|
||||
*(.qharray)
|
||||
*(.ibss)
|
||||
. = ALIGN(0x4);
|
||||
_iend = .;
|
||||
} > IRAM
|
||||
|
||||
.stack (NOLOAD) :
|
||||
{
|
||||
*(.stack)
|
||||
stackbegin = .;
|
||||
_stackbegin = .;
|
||||
. += 0x4000;
|
||||
stackend = .;
|
||||
_stackend = .;
|
||||
_irqstackbegin = .;
|
||||
. += 0x400;
|
||||
_irqstackend = .;
|
||||
_fiqstackbegin = .;
|
||||
. += 0x400;
|
||||
_fiqstackend = .;
|
||||
} > IRAM
|
||||
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
_edata = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(0x4);
|
||||
_end = .;
|
||||
} > DRAM
|
||||
|
||||
.audiobuf (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_audiobuffer = .;
|
||||
audiobuffer = .;
|
||||
} > DRAM
|
||||
|
||||
.audiobufend ENDAUDIOADDR (NOLOAD) :
|
||||
{
|
||||
audiobufend = .;
|
||||
_audiobufend = .;
|
||||
} > DRAM
|
||||
|
||||
.codec CODECORIG (NOLOAD) :
|
||||
{
|
||||
codecbuf = .;
|
||||
_codecbuf = .;
|
||||
} > DRAM
|
||||
|
||||
.plugin ENDADDR (NOLOAD) :
|
||||
{
|
||||
_pluginbuf = .;
|
||||
pluginbuf = .;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,94 @@
|
|||
#define ASM
|
||||
#include "config.h"
|
||||
|
||||
ENTRY(start)
|
||||
#ifdef ROCKBOX_LITTLE_ENDIAN
|
||||
OUTPUT_FORMAT(elf32-littlearm)
|
||||
#else
|
||||
OUTPUT_FORMAT(elf32-bigarm)
|
||||
#endif
|
||||
OUTPUT_ARCH(arm)
|
||||
STARTUP(target/arm/s5l8702/crt0.o)
|
||||
|
||||
#ifdef IPOD_NANO2G
|
||||
#define DRAMORIG 0x08000000 + ((MEMORYSIZE - 1) * 0x100000)
|
||||
#define DRAMSIZE 0x00100000
|
||||
#else
|
||||
#define DRAMORIG 0x08000000
|
||||
#define DRAMSIZE (DRAM_SIZE - TTB_SIZE)
|
||||
#endif
|
||||
|
||||
#define IRAMORIG 0x22000000
|
||||
#define IRAMSIZE 256K
|
||||
|
||||
MEMORY
|
||||
{
|
||||
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
|
||||
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
|
||||
}
|
||||
|
||||
#define LOAD_AREA IRAM
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
#ifdef NEEDS_INTVECT_COPYING
|
||||
.intvect : {
|
||||
_intvectstart = . ;
|
||||
*(.intvect)
|
||||
_intvectend = _newstart ;
|
||||
} >IRAM AT> LOAD_AREA
|
||||
_intvectcopy = LOADADDR(.intvect) ;
|
||||
#endif
|
||||
|
||||
.text : {
|
||||
#ifndef NEEDS_INTVECT_COPYING
|
||||
*(.intvect)
|
||||
#endif
|
||||
*(.init.text)
|
||||
*(.text*)
|
||||
*(.glue_7*)
|
||||
} > LOAD_AREA
|
||||
|
||||
.rodata : {
|
||||
*(.rodata*)
|
||||
. = ALIGN(0x4);
|
||||
} > LOAD_AREA
|
||||
|
||||
.data : {
|
||||
_datastart = . ;
|
||||
*(.irodata)
|
||||
*(.icode)
|
||||
*(.idata)
|
||||
*(.data*)
|
||||
*(.ncdata*);
|
||||
. = ALIGN(0x4);
|
||||
_dataend = . ;
|
||||
} > IRAM AT> LOAD_AREA
|
||||
_datacopy = LOADADDR(.data) ;
|
||||
|
||||
.stack (NOLOAD) :
|
||||
{
|
||||
*(.stack)
|
||||
_stackbegin = .;
|
||||
stackbegin = .;
|
||||
. += 0x2000;
|
||||
_stackend = .;
|
||||
stackend = .;
|
||||
_irqstackbegin = .;
|
||||
. += 0x400;
|
||||
_irqstackend = .;
|
||||
_fiqstackbegin = .;
|
||||
. += 0x400;
|
||||
_fiqstackend = .;
|
||||
} > IRAM
|
||||
|
||||
.bss (NOLOAD) : {
|
||||
_edata = .;
|
||||
*(.bss*);
|
||||
*(.ibss);
|
||||
*(.ncbss*);
|
||||
*(COMMON);
|
||||
. = ALIGN(0x4);
|
||||
_end = .;
|
||||
} > IRAM
|
||||
}
|
||||
|
|
@ -0,0 +1,207 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: crt0.S 18776 2008-10-11 18:32:17Z gevaerts $
|
||||
*
|
||||
* Copyright (C) 2008 by Marcoen Hirschberg
|
||||
* Copyright (C) 2008 by Denes Balatoni
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#define ASM
|
||||
#include "config.h"
|
||||
#include "cpu.h"
|
||||
|
||||
#define CACHE_NONE 0
|
||||
#define CACHE_ALL 0x0C
|
||||
|
||||
.section .intvect,"ax",%progbits
|
||||
.global start
|
||||
.global _newstart
|
||||
/* Exception vectors */
|
||||
start:
|
||||
b _newstart
|
||||
ldr pc, =undef_instr_handler
|
||||
ldr pc, =software_int_handler
|
||||
ldr pc, =prefetch_abort_handler
|
||||
ldr pc, =data_abort_handler
|
||||
ldr pc, =reserved_handler
|
||||
ldr pc, =irq_handler
|
||||
ldr pc, =fiq_handler
|
||||
.ltorg
|
||||
_newstart:
|
||||
#if !defined(BOOTLOADER)
|
||||
ldr pc, =newstart2 // we do not want to execute from 0x0 as iram will be mapped there
|
||||
.section .init.text,"ax",%progbits
|
||||
newstart2:
|
||||
#endif
|
||||
msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
/* Relocate ourself to IRAM - we have been loaded to DRAM */
|
||||
mov r0, #0x08000000 /* source (DRAM) */
|
||||
mov r1, #0x22000000 /* dest (IRAM) */
|
||||
ldr r2, =_dataend
|
||||
1:
|
||||
cmp r2, r1
|
||||
ldrhi r3, [r0], #4
|
||||
strhi r3, [r1], #4
|
||||
bhi 1b
|
||||
|
||||
ldr pc, =start_loc /* jump to the relocated start_loc: */
|
||||
start_loc:
|
||||
#endif
|
||||
|
||||
mrc 15, 0, r0, c1, c0, 0
|
||||
bic r0, r0, #0x1000
|
||||
bic r0, r0, #0x5
|
||||
mcr 15, 0, r0, c1, c0, 0 // disable caches and protection unit
|
||||
|
||||
.cleancache:
|
||||
mrc p15, 0, r15,c7,c10,3
|
||||
bne .cleancache
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0,c7,c10,4
|
||||
mcr p15, 0, r0,c7,c5,0
|
||||
bl ttb_init
|
||||
|
||||
mov r0, #0 @ physical address
|
||||
mov r1, #0 @ virtual address
|
||||
mov r2, #0x380 @ size (all memory)
|
||||
mov r3, #CACHE_ALL
|
||||
bl map_section
|
||||
|
||||
mov r0, #0x38000000 @ physical address
|
||||
mov r1, #0x38000000 @ virtual address
|
||||
mov r2, #0x80 @ size (AHB/APB)
|
||||
mov r3, #CACHE_NONE
|
||||
bl map_section
|
||||
|
||||
bl enable_mmu
|
||||
|
||||
mrc 15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #0x5
|
||||
orr r0, r0, #0x1000
|
||||
mcr 15, 0, r0, c1, c0, 0 // re-enable protection unit and caches
|
||||
|
||||
ldr r1, =0x38e00000
|
||||
add r2, r1, #0x00001000
|
||||
add r3, r1, #0x00002000
|
||||
sub r4, r0, #1
|
||||
str r4, [r1,#0x14]
|
||||
str r4, [r2,#0x14]
|
||||
str r4, [r1,#0xf00]
|
||||
str r4, [r2,#0xf00]
|
||||
str r4, [r3,#0x08]
|
||||
str r4, [r3,#0x0c]
|
||||
str r0, [r1,#0x14]
|
||||
str r0, [r2,#0x14]
|
||||
|
||||
#if !defined(BOOTLOADER)
|
||||
/* Copy interrupt vectors to iram */
|
||||
ldr r2, =_intvectstart
|
||||
ldr r3, =_intvectend
|
||||
ldr r4, =_intvectcopy
|
||||
1:
|
||||
cmp r3, r2
|
||||
ldrhi r1, [r4], #4
|
||||
strhi r1, [r2], #4
|
||||
bhi 1b
|
||||
#endif
|
||||
|
||||
/* Initialise bss section to zero */
|
||||
ldr r2, =_edata
|
||||
ldr r3, =_end
|
||||
mov r4, #0
|
||||
1:
|
||||
cmp r3, r2
|
||||
strhi r4, [r2], #4
|
||||
bhi 1b
|
||||
|
||||
#ifndef BOOTLOADER
|
||||
/* Copy icode and data to ram */
|
||||
ldr r2, =_iramstart
|
||||
ldr r3, =_iramend
|
||||
ldr r4, =_iramcopy
|
||||
1:
|
||||
cmp r3, r2
|
||||
ldrhi r1, [r4], #4
|
||||
strhi r1, [r2], #4
|
||||
bhi 1b
|
||||
|
||||
/* Initialise ibss section to zero */
|
||||
ldr r2, =_iedata
|
||||
ldr r3, =_iend
|
||||
mov r4, #0
|
||||
1:
|
||||
cmp r3, r2
|
||||
strhi r4, [r2], #4
|
||||
bhi 1b
|
||||
#endif
|
||||
|
||||
/* Set up some stack and munge it with 0xdeadbeef */
|
||||
ldr sp, =stackend
|
||||
ldr r2, =stackbegin
|
||||
ldr r3, =0xdeadbeef
|
||||
1:
|
||||
cmp sp, r2
|
||||
strhi r3, [r2], #4
|
||||
bhi 1b
|
||||
|
||||
/* Set up stack for IRQ mode */
|
||||
msr cpsr_c, #0xd2
|
||||
ldr sp, =_irqstackend
|
||||
|
||||
/* Set up stack for FIQ mode */
|
||||
msr cpsr_c, #0xd1
|
||||
ldr sp, =_fiqstackend
|
||||
|
||||
/* Let abort and undefined modes use IRQ stack */
|
||||
msr cpsr_c, #0xd7
|
||||
ldr sp, =_irqstackend
|
||||
msr cpsr_c, #0xdb
|
||||
ldr sp, =_irqstackend
|
||||
|
||||
/* Switch back to supervisor mode */
|
||||
msr cpsr_c, #0xd3
|
||||
|
||||
bl main
|
||||
|
||||
.text
|
||||
/* .global UIE*/
|
||||
|
||||
/* All illegal exceptions call into UIE with exception address as first
|
||||
* parameter. This is calculated differently depending on which exception
|
||||
* we're in. Second parameter is exception number, used for a string lookup
|
||||
* in UIE. */
|
||||
undef_instr_handler:
|
||||
sub r0, lr, #4
|
||||
mov r1, #0
|
||||
b UIE
|
||||
|
||||
/* We run supervisor mode most of the time, and should never see a software
|
||||
* exception being thrown. Perhaps make it illegal and call UIE? */
|
||||
software_int_handler:
|
||||
reserved_handler:
|
||||
movs pc, lr
|
||||
|
||||
prefetch_abort_handler:
|
||||
sub r0, lr, #4
|
||||
mov r1, #1
|
||||
b UIE
|
||||
|
||||
data_abort_handler:
|
||||
sub r0, lr, #8
|
||||
mov r1, #2
|
||||
b UIE
|
||||
|
|
@ -0,0 +1,151 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: debug-s5l8700.c 28719 2010-12-01 18:35:01Z Buschel $
|
||||
*
|
||||
* Copyright © 2008 Rafaël Carré
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "config.h"
|
||||
#include "kernel.h"
|
||||
#include "debug-target.h"
|
||||
#include "button.h"
|
||||
#include "lcd.h"
|
||||
#include "font.h"
|
||||
#include "storage.h"
|
||||
#include "power.h"
|
||||
#include "pmu-target.h"
|
||||
|
||||
/* Skeleton for adding target specific debug info to the debug menu
|
||||
*/
|
||||
|
||||
#define _DEBUG_PRINTF(a, varargs...) lcd_putsf(0, line++, (a), ##varargs);
|
||||
|
||||
bool __dbg_hw_info(void)
|
||||
{
|
||||
int line;
|
||||
int i;
|
||||
unsigned int state = 0;
|
||||
const unsigned int max_states=2;
|
||||
|
||||
lcd_clear_display();
|
||||
lcd_setfont(FONT_SYSFIXED);
|
||||
|
||||
state=0;
|
||||
while(1)
|
||||
{
|
||||
lcd_clear_display();
|
||||
line = 0;
|
||||
|
||||
if(state == 0)
|
||||
{
|
||||
_DEBUG_PRINTF("CPU:");
|
||||
_DEBUG_PRINTF("current_tick: %d", (unsigned int)current_tick);
|
||||
line++;
|
||||
}
|
||||
else if(state==1)
|
||||
{
|
||||
_DEBUG_PRINTF("PMU:");
|
||||
for(i=0;i<7;i++)
|
||||
{
|
||||
char *device[] = {"(unknown)",
|
||||
"(unknown)",
|
||||
"(unknown)",
|
||||
"(unknown)",
|
||||
"(unknown)",
|
||||
"(unknown)",
|
||||
"(unknown)"};
|
||||
_DEBUG_PRINTF("ldo%d %s: %dmV %s",i,
|
||||
pmu_read(0x2e + (i << 1))?" on":"off",
|
||||
900 + pmu_read(0x2d + (i << 1))*100,
|
||||
device[i]);
|
||||
}
|
||||
_DEBUG_PRINTF("cpu voltage: %dmV",625 + pmu_read(0x1e)*25);
|
||||
_DEBUG_PRINTF("memory voltage: %dmV",625 + pmu_read(0x22)*25);
|
||||
line++;
|
||||
_DEBUG_PRINTF("charging: %s", charging_state() ? "true" : "false");
|
||||
_DEBUG_PRINTF("backlight: %s", pmu_read(0x29) ? "on" : "off");
|
||||
_DEBUG_PRINTF("brightness value: %d", pmu_read(0x28));
|
||||
}
|
||||
else
|
||||
{
|
||||
state=0;
|
||||
}
|
||||
|
||||
|
||||
lcd_update();
|
||||
switch(button_get_w_tmo(HZ/20))
|
||||
{
|
||||
case BUTTON_SCROLL_BACK:
|
||||
if(state!=0) state--;
|
||||
break;
|
||||
|
||||
case BUTTON_SCROLL_FWD:
|
||||
if(state!=max_states-1)
|
||||
{
|
||||
state++;
|
||||
}
|
||||
break;
|
||||
|
||||
case DEBUG_CANCEL:
|
||||
case BUTTON_REL:
|
||||
lcd_setfont(FONT_UI);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
lcd_setfont(FONT_UI);
|
||||
return false;
|
||||
}
|
||||
|
||||
bool dbg_ports(void)
|
||||
{
|
||||
int line;
|
||||
|
||||
lcd_setfont(FONT_SYSFIXED);
|
||||
|
||||
while(1)
|
||||
{
|
||||
lcd_clear_display();
|
||||
line = 0;
|
||||
|
||||
_DEBUG_PRINTF("GPIO 0: %08x",(unsigned int)PDAT(0));
|
||||
_DEBUG_PRINTF("GPIO 1: %08x",(unsigned int)PDAT(1));
|
||||
_DEBUG_PRINTF("GPIO 2: %08x",(unsigned int)PDAT(2));
|
||||
_DEBUG_PRINTF("GPIO 3: %08x",(unsigned int)PDAT(3));
|
||||
_DEBUG_PRINTF("GPIO 4: %08x",(unsigned int)PDAT(4));
|
||||
_DEBUG_PRINTF("GPIO 5: %08x",(unsigned int)PDAT(5));
|
||||
_DEBUG_PRINTF("GPIO 6: %08x",(unsigned int)PDAT(6));
|
||||
_DEBUG_PRINTF("GPIO 7: %08x",(unsigned int)PDAT(7));
|
||||
_DEBUG_PRINTF("GPIO 8: %08x",(unsigned int)PDAT(8));
|
||||
_DEBUG_PRINTF("GPIO 9: %08x",(unsigned int)PDAT(9));
|
||||
_DEBUG_PRINTF("GPIO 10: %08x",(unsigned int)PDAT(10));
|
||||
_DEBUG_PRINTF("GPIO 11: %08x",(unsigned int)PDAT(11));
|
||||
_DEBUG_PRINTF("GPIO 12: %08x",(unsigned int)PDAT(12));
|
||||
_DEBUG_PRINTF("GPIO 13: %08x",(unsigned int)PDAT(13));
|
||||
_DEBUG_PRINTF("GPIO 14: %08x",(unsigned int)PDAT(14));
|
||||
_DEBUG_PRINTF("GPIO 15: %08x",(unsigned int)PDAT(15));
|
||||
_DEBUG_PRINTF("USEC : %08x",(unsigned int)USEC_TIMER);
|
||||
|
||||
lcd_update();
|
||||
if (button_get_w_tmo(HZ/10) == (DEBUG_CANCEL|BUTTON_REL))
|
||||
break;
|
||||
}
|
||||
lcd_setfont(FONT_UI);
|
||||
return false;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: debug-target.h 28522 2010-11-06 14:24:25Z wodz $
|
||||
*
|
||||
* Copyright (C) 2007 by Karl Kurbjun
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef _DEBUG_TARGET_H_
|
||||
#define _DEBUG_TARGET_H_
|
||||
|
||||
#include <stdbool.h>
|
||||
|
||||
#define DEBUG_CANCEL BUTTON_MENU
|
||||
|
||||
bool __dbg_hw_info(void);
|
||||
bool dbg_ports(void);
|
||||
|
||||
#endif /* _DEBUG_TARGET_H_ */
|
||||
|
||||
|
|
@ -0,0 +1,186 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: i2c-s5l8700.c 28589 2010-11-14 15:19:30Z theseven $
|
||||
*
|
||||
* Copyright (C) 2009 by Bertrik Sikken
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include "config.h"
|
||||
#include "system.h"
|
||||
#include "kernel.h"
|
||||
#include "i2c-s5l8702.h"
|
||||
|
||||
/* Driver for the s5l8700 built-in I2C controller in master mode
|
||||
|
||||
Both the i2c_read and i2c_write function take the following arguments:
|
||||
* slave, the address of the i2c slave device to read from / write to
|
||||
* address, optional sub-address in the i2c slave (unused if -1)
|
||||
* len, number of bytes to be transfered
|
||||
* data, pointer to data to be transfered
|
||||
A return value < 0 indicates an error.
|
||||
|
||||
Note:
|
||||
* blocks the calling thread for the entire duraton of the i2c transfer but
|
||||
uses wakeup_wait/wakeup_signal to allow other threads to run.
|
||||
* ACK from slave is not checked, so functions never return an error
|
||||
*/
|
||||
|
||||
static struct mutex i2c_mtx[2];
|
||||
|
||||
void i2c_init(void)
|
||||
{
|
||||
mutex_init(&i2c_mtx[0]);
|
||||
mutex_init(&i2c_mtx[1]);
|
||||
|
||||
/* initial config */
|
||||
IICADD(0) = 0;
|
||||
IICADD(1) = 0;
|
||||
IICCON(0) = (1 << 7) | /* ACK_GEN */
|
||||
(0 << 6) | /* CLKSEL = PCLK/16 */
|
||||
(1 << 5) | /* INT_EN */
|
||||
(1 << 4) | /* IRQ clear */
|
||||
(3 << 0); /* CK_REG */
|
||||
IICCON(1) = (1 << 7) | /* ACK_GEN */
|
||||
(0 << 6) | /* CLKSEL = PCLK/16 */
|
||||
(1 << 5) | /* INT_EN */
|
||||
(1 << 4) | /* IRQ clear */
|
||||
(3 << 0); /* CK_REG */
|
||||
|
||||
/* serial output on */
|
||||
IICSTAT(0) = (1 << 4);
|
||||
IICSTAT(1) = (1 << 4);
|
||||
}
|
||||
|
||||
int i2c_write(int bus, unsigned char slave, int address, int len, const unsigned char *data)
|
||||
{
|
||||
mutex_lock(&i2c_mtx[bus]);
|
||||
long timeout = current_tick + HZ / 50;
|
||||
|
||||
/* START */
|
||||
IICDS(bus) = slave & ~1;
|
||||
IICSTAT(bus) = 0xF0;
|
||||
IICCON(bus) = 0xB3;
|
||||
while ((IICCON(bus) & 0x10) == 0)
|
||||
if (TIME_AFTER(current_tick, timeout))
|
||||
{
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
if (address >= 0) {
|
||||
/* write address */
|
||||
IICDS(bus) = address;
|
||||
IICCON(bus) = 0xB3;
|
||||
while ((IICCON(bus) & 0x10) == 0)
|
||||
if (TIME_AFTER(current_tick, timeout))
|
||||
{
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 2;
|
||||
}
|
||||
}
|
||||
|
||||
/* write data */
|
||||
while (len--) {
|
||||
IICDS(bus) = *data++;
|
||||
IICCON(bus) = 0xB3;
|
||||
while ((IICCON(bus) & 0x10) == 0)
|
||||
if (TIME_AFTER(current_tick, timeout))
|
||||
{
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 4;
|
||||
}
|
||||
}
|
||||
|
||||
/* STOP */
|
||||
IICSTAT(bus) = 0xD0;
|
||||
IICCON(bus) = 0xB3;
|
||||
while ((IICSTAT(bus) & (1 << 5)) != 0)
|
||||
if (TIME_AFTER(current_tick, timeout))
|
||||
{
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 5;
|
||||
}
|
||||
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_read(int bus, unsigned char slave, int address, int len, unsigned char *data)
|
||||
{
|
||||
mutex_lock(&i2c_mtx[bus]);
|
||||
long timeout = current_tick + HZ / 50;
|
||||
|
||||
if (address >= 0) {
|
||||
/* START */
|
||||
IICDS(bus) = slave & ~1;
|
||||
IICSTAT(bus) = 0xF0;
|
||||
IICCON(bus) = 0xB3;
|
||||
while ((IICCON(bus) & 0x10) == 0)
|
||||
if (TIME_AFTER(current_tick, timeout))
|
||||
{
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* write address */
|
||||
IICDS(bus) = address;
|
||||
IICCON(bus) = 0xB3;
|
||||
while ((IICCON(bus) & 0x10) == 0)
|
||||
if (TIME_AFTER(current_tick, timeout))
|
||||
{
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 2;
|
||||
}
|
||||
}
|
||||
|
||||
/* (repeated) START */
|
||||
IICDS(bus) = slave | 1;
|
||||
IICSTAT(bus) = 0xB0;
|
||||
IICCON(bus) = 0xB3;
|
||||
while ((IICCON(bus) & 0x10) == 0)
|
||||
if (TIME_AFTER(current_tick, timeout))
|
||||
{
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 3;
|
||||
}
|
||||
|
||||
while (len--) {
|
||||
IICCON(bus) = (len == 0) ? 0x33 : 0xB3; /* NAK or ACK */
|
||||
while ((IICCON(bus) & 0x10) == 0)
|
||||
if (TIME_AFTER(current_tick, timeout))
|
||||
{
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 4;
|
||||
}
|
||||
*data++ = IICDS(bus);
|
||||
}
|
||||
|
||||
/* STOP */
|
||||
IICSTAT(bus) = 0x90;
|
||||
IICCON(bus) = 0xB3;
|
||||
while ((IICSTAT(bus) & (1 << 5)) != 0)
|
||||
if (TIME_AFTER(current_tick, timeout))
|
||||
{
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 5;
|
||||
}
|
||||
|
||||
mutex_unlock(&i2c_mtx[bus]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: adc-s5l8700.c 21775 2009-07-11 14:12:02Z bertrik $
|
||||
*
|
||||
* Copyright (C) 2009 by Bertrik Sikken
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include "config.h"
|
||||
|
||||
#include "inttypes.h"
|
||||
#include "s5l8702.h"
|
||||
#include "adc.h"
|
||||
#include "adc-target.h"
|
||||
#include "pmu-target.h"
|
||||
#include "kernel.h"
|
||||
|
||||
unsigned short adc_read(int channel)
|
||||
{
|
||||
return pmu_read_adc(channel);
|
||||
}
|
||||
|
||||
void adc_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: adc-target.h 21734 2009-07-09 20:17:47Z bertrik $
|
||||
*
|
||||
* Copyright (C) 2006 by Barry Wardell
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef _ADC_TARGET_H_
|
||||
#define _ADC_TARGET_H_
|
||||
|
||||
#define NUM_ADC_CHANNELS 4
|
||||
|
||||
#define ADC_UNKNOWN_0 0
|
||||
#define ADC_UNKNOWN_1 1
|
||||
#define ADC_BATTERY 2
|
||||
#define ADC_UNKNOWN_3 3
|
||||
|
||||
#define ADC_UNREG_POWER ADC_BATTERY /* For compatibility */
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,197 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: ata-meg-fx.c 27935 2010-08-28 23:12:11Z funman $
|
||||
*
|
||||
* Copyright (C) 2011 by Michael Sparmann
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include "config.h"
|
||||
#include "cpu.h"
|
||||
#include "kernel.h"
|
||||
#include "thread.h"
|
||||
#include "system.h"
|
||||
#include "power.h"
|
||||
#include "panic.h"
|
||||
#include "pmu-target.h"
|
||||
#include "ata.h"
|
||||
#include "ata-target.h"
|
||||
#include "s5l8702.h"
|
||||
|
||||
|
||||
static struct wakeup ata_wakeup;
|
||||
|
||||
#ifdef HAVE_ATA_DMA
|
||||
static uint32_t ata_dma_flags;
|
||||
#endif
|
||||
|
||||
|
||||
void ata_reset(void)
|
||||
{
|
||||
ATA_SWRST = 1;
|
||||
sleep(HZ / 100);
|
||||
ATA_SWRST = 0;
|
||||
sleep(HZ / 10);
|
||||
}
|
||||
|
||||
void ata_enable(bool on)
|
||||
{
|
||||
if (on)
|
||||
{
|
||||
PWRCON(0) &= ~(1 << 5);
|
||||
ATA_CFG = 0x41;
|
||||
sleep(HZ / 100);
|
||||
ATA_CFG = 0x40;
|
||||
sleep(HZ / 20);
|
||||
ata_reset();
|
||||
ATA_CCONTROL = 1;
|
||||
sleep(HZ / 5);
|
||||
ATA_PIO_TIME = 0x191f7;
|
||||
*ATA_HCYL = 0;
|
||||
while (!(ATA_PIO_READY & 2)) yield();
|
||||
}
|
||||
else
|
||||
{
|
||||
ATA_CCONTROL = 0;
|
||||
while (!(ATA_CCONTROL & 2)) yield();
|
||||
PWRCON(1) |= 1 << 5;
|
||||
}
|
||||
}
|
||||
|
||||
bool ata_is_coldstart(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
void ata_device_init(void)
|
||||
{
|
||||
VIC0INTENABLE = 1 << IRQ_ATA;
|
||||
}
|
||||
|
||||
uint16_t ata_read_cbr(uint32_t volatile* reg)
|
||||
{
|
||||
while (!(ATA_PIO_READY & 2));
|
||||
volatile uint32_t __attribute__((unused)) dummy = *reg;
|
||||
while (!(ATA_PIO_READY & 1));
|
||||
return ATA_PIO_RDATA;
|
||||
}
|
||||
|
||||
void ata_write_cbr(uint32_t volatile* reg, uint16_t data)
|
||||
{
|
||||
while (!(ATA_PIO_READY & 2));
|
||||
*reg = data;
|
||||
}
|
||||
|
||||
void ata_set_pio_timings(int mode)
|
||||
{
|
||||
if (mode >= 4) ATA_PIO_TIME = 0x7083;
|
||||
if (mode >= 3) ATA_PIO_TIME = 0x2072;
|
||||
else ATA_PIO_TIME = 0x11f3;
|
||||
}
|
||||
|
||||
#ifdef HAVE_ATA_DMA
|
||||
static void ata_set_mdma_timings(unsigned int mode)
|
||||
{
|
||||
if (mode >= 2) ATA_MDMA_TIME = 0x5072;
|
||||
if (mode >= 1) ATA_MDMA_TIME = 0x7083;
|
||||
else ATA_MDMA_TIME = 0x1c175;
|
||||
}
|
||||
|
||||
static void ata_set_udma_timings(unsigned int mode)
|
||||
{
|
||||
if (mode >= 4) ATA_UDMA_TIME = 0x2010a52;
|
||||
if (mode >= 3) ATA_UDMA_TIME = 0x2020a52;
|
||||
if (mode >= 2) ATA_UDMA_TIME = 0x3030a52;
|
||||
if (mode >= 1) ATA_UDMA_TIME = 0x3050a52;
|
||||
else ATA_UDMA_TIME = 0x5071152;
|
||||
}
|
||||
|
||||
void ata_dma_set_mode(unsigned char mode)
|
||||
{
|
||||
unsigned int modeidx = mode & 0x07;
|
||||
unsigned int dmamode = mode & 0xf8;
|
||||
|
||||
if (dmamode == 0x40 && modeidx <= ATA_MAX_UDMA)
|
||||
{
|
||||
/* Using Ultra DMA */
|
||||
ata_set_udma_timings(dmamode);
|
||||
ata_dma_flags = 0x60c;
|
||||
}
|
||||
else if (dmamode == 0x20 && modeidx <= ATA_MAX_MWDMA)
|
||||
{
|
||||
/* Using Multiword DMA */
|
||||
ata_set_mdma_timings(dmamode);
|
||||
ata_dma_flags = 0x408;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Don't understand this - force PIO. */
|
||||
ata_dma_flags = 0;
|
||||
}
|
||||
}
|
||||
|
||||
bool ata_dma_setup(void *addr, unsigned long bytes, bool write)
|
||||
{
|
||||
if ((((int)addr) & 0xf) || (((int)bytes) & 0xf) || !ata_dma_flags)
|
||||
return false;
|
||||
|
||||
if (write) clean_dcache();
|
||||
else invalidate_dcache();
|
||||
ATA_CCOMMAND = 2;
|
||||
|
||||
if (write)
|
||||
{
|
||||
ATA_SBUF_START = addr;
|
||||
ATA_SBUF_SIZE = bytes;
|
||||
ATA_CFG |= 0x10;
|
||||
}
|
||||
else
|
||||
{
|
||||
ATA_TBUF_START = addr;
|
||||
ATA_TBUF_SIZE = bytes;
|
||||
ATA_CFG &= ~0x10;
|
||||
}
|
||||
ATA_XFR_NUM = bytes - 1;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool ata_dma_finish(void)
|
||||
{
|
||||
ATA_CFG |= ata_dma_flags;
|
||||
ATA_CFG &= ~0x180;
|
||||
wakeup_wait(&ata_wakeup, TIMEOUT_NOBLOCK);
|
||||
ATA_IRQ = 0x1f;
|
||||
ATA_IRQ_MASK = 1;
|
||||
ATA_CCOMMAND = 1;
|
||||
if (wakeup_wait(&ata_wakeup, HZ / 2) != OBJ_WAIT_SUCCEEDED)
|
||||
{
|
||||
ATA_CCOMMAND = 2;
|
||||
ATA_CFG &= ~0x100c;
|
||||
return false;
|
||||
}
|
||||
ATA_CCOMMAND = 2;
|
||||
ATA_CFG &= ~0x100c;
|
||||
return true;
|
||||
}
|
||||
#endif /* HAVE_ATA_DMA */
|
||||
|
||||
void INT_ATA(void)
|
||||
{
|
||||
uint32_t ata_irq = ATA_IRQ;
|
||||
ATA_IRQ = ata_irq;
|
||||
if (ata_irq & ATA_IRQ_MASK) wakeup_signal(&ata_wakeup);
|
||||
ATA_IRQ_MASK = 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: ata-target.h 25525 2010-04-07 20:01:21Z torne $
|
||||
*
|
||||
* Copyright (C) 2011 by Michael Sparmann
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef ATA_TARGET_H
|
||||
#define ATA_TARGET_H
|
||||
|
||||
#include "inttypes.h"
|
||||
#include "s5l8702.h"
|
||||
|
||||
#ifdef BOOTLOADER
|
||||
#define ATA_DRIVER_CLOSE
|
||||
#endif
|
||||
|
||||
#define ATA_SWAP_IDENTIFY(word) (swap16(word))
|
||||
|
||||
void ata_reset(void);
|
||||
void ata_device_init(void);
|
||||
bool ata_is_coldstart(void);
|
||||
uint16_t ata_read_cbr(uint32_t volatile* reg);
|
||||
void ata_write_cbr(uint32_t volatile* reg, uint16_t data);
|
||||
|
||||
#define ATA_OUT8(reg, data) ata_write_cbr(reg, data)
|
||||
#define ATA_OUT16(reg, data) ata_write_cbr(reg, data)
|
||||
#define ATA_IN8(reg) ata_read_cbr(reg)
|
||||
#define ATA_IN16(reg) ata_read_cbr(reg)
|
||||
|
||||
#define ATA_SET_DEVICE_FEATURES
|
||||
void ata_set_pio_timings(int mode);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: audio-nano2g.c 23095 2009-10-11 09:17:12Z dave $
|
||||
*
|
||||
* Copyright (C) 2006 by Michael Sevakis
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include "system.h"
|
||||
#include "cpu.h"
|
||||
#include "audio.h"
|
||||
#include "sound.h"
|
||||
|
||||
#if INPUT_SRC_CAPS != 0
|
||||
void audio_set_output_source(int source)
|
||||
{
|
||||
if ((unsigned)source >= AUDIO_NUM_SOURCES)
|
||||
source = AUDIO_SRC_PLAYBACK;
|
||||
} /* audio_set_output_source */
|
||||
|
||||
void audio_input_mux(int source, unsigned flags)
|
||||
{
|
||||
(void)flags;
|
||||
/* Prevent pops from unneeded switching */
|
||||
static int last_source = AUDIO_SRC_PLAYBACK;
|
||||
|
||||
switch (source)
|
||||
{
|
||||
default: /* playback - no recording */
|
||||
source = AUDIO_SRC_PLAYBACK;
|
||||
case AUDIO_SRC_PLAYBACK:
|
||||
#ifdef HAVE_RECORDING
|
||||
if (source != last_source)
|
||||
{
|
||||
audiohw_set_monitor(false);
|
||||
audiohw_disable_recording();
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
#ifdef HAVE_LINE_REC
|
||||
case AUDIO_SRC_LINEIN: /* recording only */
|
||||
if (source != last_source)
|
||||
{
|
||||
audiohw_set_monitor(false);
|
||||
audiohw_enable_recording(false); /* source line */
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
} /* end switch */
|
||||
|
||||
last_source = source;
|
||||
} /* audio_input_mux */
|
||||
#endif /* INPUT_SRC_CAPS != 0 */
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: backlight-nano2g.c 28601 2010-11-14 20:39:18Z theseven $
|
||||
*
|
||||
* Copyright (C) 2009 by Dave Chapman
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "config.h"
|
||||
#include "kernel.h"
|
||||
#include "backlight.h"
|
||||
#include "backlight-target.h"
|
||||
#include "pmu-target.h"
|
||||
|
||||
#ifdef HAVE_LCD_SLEEP
|
||||
bool lcd_active(void);
|
||||
void lcd_awake(void);
|
||||
void lcd_update(void);
|
||||
#endif
|
||||
|
||||
void _backlight_set_brightness(int brightness)
|
||||
{
|
||||
pmu_write(0x28, brightness);
|
||||
}
|
||||
|
||||
void _backlight_on(void)
|
||||
{
|
||||
#ifdef HAVE_LCD_SLEEP
|
||||
if (!lcd_active())
|
||||
{
|
||||
lcd_awake();
|
||||
lcd_update();
|
||||
sleep(HZ/8);
|
||||
}
|
||||
#endif
|
||||
pmu_write(0x29, 1);
|
||||
}
|
||||
|
||||
void _backlight_off(void)
|
||||
{
|
||||
pmu_write(0x29, 0);
|
||||
}
|
||||
|
||||
bool _backlight_init(void)
|
||||
{
|
||||
pmu_write(0x2a, 6);
|
||||
pmu_write(0x28, 0x20);
|
||||
pmu_write(0x2b, 20);
|
||||
|
||||
_backlight_on();
|
||||
|
||||
return true;
|
||||
}
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: backlight-target.h 21478 2009-06-23 18:11:03Z bertrik $
|
||||
*
|
||||
* Copyright (C) 2008 by Marcoen Hirschberg
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef BACKLIGHT_TARGET_H
|
||||
#define BACKLIGHT_TARGET_H
|
||||
|
||||
bool _backlight_init(void);
|
||||
void _backlight_on(void);
|
||||
void _backlight_off(void);
|
||||
void _backlight_set_brightness(int brightness);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: button-target.h 21828 2009-07-12 22:16:51Z dave $
|
||||
*
|
||||
* Copyright (C) 2006 by Barry Wardell
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef _BUTTON_TARGET_H_
|
||||
#define _BUTTON_TARGET_H_
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "config.h"
|
||||
|
||||
#define HAS_BUTTON_HOLD
|
||||
|
||||
bool button_hold(void);
|
||||
void button_init_device(void);
|
||||
int button_read_device(void);
|
||||
|
||||
void ipod_mini_button_int(void);
|
||||
void ipod_3g_button_int(void);
|
||||
void ipod_4g_button_int(void);
|
||||
|
||||
/* iPod specific button codes */
|
||||
|
||||
#define BUTTON_SELECT 0x00000001
|
||||
#define BUTTON_MENU 0x00000002
|
||||
|
||||
#define BUTTON_LEFT 0x00000004
|
||||
#define BUTTON_RIGHT 0x00000008
|
||||
#define BUTTON_SCROLL_FWD 0x00000010
|
||||
#define BUTTON_SCROLL_BACK 0x00000020
|
||||
|
||||
#define BUTTON_PLAY 0x00000040
|
||||
|
||||
#define BUTTON_MAIN (BUTTON_SELECT|BUTTON_MENU\
|
||||
|BUTTON_LEFT|BUTTON_RIGHT|BUTTON_SCROLL_FWD\
|
||||
|BUTTON_SCROLL_BACK|BUTTON_PLAY)
|
||||
|
||||
/* Remote control's buttons */
|
||||
#ifdef IPOD_ACCESSORY_PROTOCOL
|
||||
#define BUTTON_RC_PLAY 0x00100000
|
||||
#define BUTTON_RC_STOP 0x00080000
|
||||
|
||||
#define BUTTON_RC_LEFT 0x00040000
|
||||
#define BUTTON_RC_RIGHT 0x00020000
|
||||
#define BUTTON_RC_VOL_UP 0x00010000
|
||||
#define BUTTON_RC_VOL_DOWN 0x00008000
|
||||
|
||||
#define BUTTON_REMOTE (BUTTON_RC_PLAY|BUTTON_RC_STOP\
|
||||
|BUTTON_RC_LEFT|BUTTON_RC_RIGHT\
|
||||
|BUTTON_RC_VOL_UP|BUTTON_RC_VOL_DOWN)
|
||||
#else
|
||||
#define BUTTON_REMOTE 0
|
||||
#endif
|
||||
|
||||
/* This is for later
|
||||
#define BUTTON_SCROLL_TOUCH 0x00000200
|
||||
*/
|
||||
|
||||
|
||||
#define POWEROFF_BUTTON BUTTON_PLAY
|
||||
#define POWEROFF_COUNT 40
|
||||
|
||||
#endif /* _BUTTON_TARGET_H_ */
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: wmcodec-s5l8700.c 22025 2009-07-25 00:49:13Z dave $
|
||||
*
|
||||
* S5L8702-specific code for Cirrus codecs
|
||||
*
|
||||
* Copyright (c) 2010 Michael Sparmann
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include "system.h"
|
||||
#include "audiohw.h"
|
||||
#include "i2c-s5l8702.h"
|
||||
#include "s5l8702.h"
|
||||
#include "cscodec.h"
|
||||
|
||||
void audiohw_init(void)
|
||||
{
|
||||
#ifdef HAVE_CS42L55
|
||||
audiohw_preinit();
|
||||
#endif
|
||||
}
|
||||
|
||||
unsigned char cscodec_read(int reg)
|
||||
{
|
||||
unsigned char data;
|
||||
i2c_read(0, 0x94, reg, 1, &data);
|
||||
return data;
|
||||
}
|
||||
|
||||
void cscodec_write(int reg, unsigned char data)
|
||||
{
|
||||
i2c_write(0, 0x94, reg, 1, &data);
|
||||
}
|
||||
|
||||
void cscodec_power(bool state)
|
||||
{
|
||||
(void)state; //TODO: Figure out which LDO this is
|
||||
}
|
||||
|
||||
void cscodec_reset(bool state)
|
||||
{
|
||||
if (state) PDAT(3) &= ~8;
|
||||
else PDAT(3) |= 8;
|
||||
}
|
||||
|
||||
void cscodec_clock(bool state)
|
||||
{
|
||||
if (state) CLKCON0C &= ~0xffff;
|
||||
else CLKCON0C |= 0x8000;
|
||||
}
|
||||
|
|
@ -0,0 +1,295 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: lcd-as-video.S 26756 2010-06-11 04:41:36Z funman $
|
||||
*
|
||||
* Copyright (C) 2010 by Andree Buschmann
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* #define FORCE_FIFO_WAIT
|
||||
*
|
||||
* This is not needed in YUV blitting when the LCD IF is fast enough. In this
|
||||
* case YUV-to-RGB conversion per pixel needs longer than the transfer of a
|
||||
* pixel via the LCD IF. For iPod nano 2G this is true if the LCD IF is
|
||||
* configured to use LCD_PHTIME = 0x00 (see lcd-nano2g.c).
|
||||
****************************************************************************/
|
||||
|
||||
#include "config.h"
|
||||
|
||||
.section .icode, "ax", %progbits
|
||||
|
||||
/****************************************************************************
|
||||
* void lcd_write_line(const fb_data *addr,
|
||||
* int pixelcount,
|
||||
* const unsigned int lcd_base_addr);
|
||||
*
|
||||
* Writes pixelcount pixels from src-pointer (lcd_framebuffer) to LCD dataport.
|
||||
*/
|
||||
.align 2
|
||||
.global lcd_write_line
|
||||
.type lcd_write_line, %function
|
||||
/* r0 = addr, must be aligned */
|
||||
/* r1 = pixel count, must be even */
|
||||
lcd_write_line: /* r2 = LCD_BASE */
|
||||
stmfd sp!, {r4-r6, lr} /* save non-scratch registers */
|
||||
add r12, r2, #0x40 /* LCD_WDATA = LCD data port */
|
||||
|
||||
.loop:
|
||||
ldmia r0!, {r3, r5} /* read 2 pixel (=8 byte) */
|
||||
|
||||
/* wait for FIFO half full */
|
||||
.fifo_wait:
|
||||
ldr lr, [r2, #0x1C] /* while (LCD_STATUS & 0x08); */
|
||||
tst lr, #0x8
|
||||
bgt .fifo_wait
|
||||
|
||||
mov r4, r3, asr #16 /* r3 = 1st pixel, r4 = 2nd pixel */
|
||||
mov r6, r5, asr #16 /* r5 = 3rd pixel, r6 = 4th pixel */
|
||||
stmia r12, {r3-r6} /* write pixels (lowest 16 bit used) */
|
||||
|
||||
subs r1, r1, #4
|
||||
bgt .loop
|
||||
|
||||
ldmpc regs=r4-r6
|
||||
|
||||
/****************************************************************************
|
||||
* extern void lcd_write_yuv420_lines(unsigned char const * const src[3],
|
||||
* const unsigned LCD_BASE,
|
||||
* int width,
|
||||
* int stride);
|
||||
*
|
||||
* Conversion from Motion JPEG and MPEG Y'PbPr to RGB is:
|
||||
* |R| |1.164 0.000 1.596| |Y' - 16|
|
||||
* |G| = |1.164 -0.391 -0.813| |Pb - 128|
|
||||
* |B| |1.164 2.018 0.000| |Pr - 128|
|
||||
*
|
||||
* Scaled, normalized, rounded and tweaked to yield RGB 565:
|
||||
* |R| |74 0 101| |Y' - 16| >> 9
|
||||
* |G| = |74 -24 -51| |Cb - 128| >> 8
|
||||
* |B| |74 128 0| |Cr - 128| >> 9
|
||||
*
|
||||
* Converts two lines from YUV to RGB565 and writes to LCD at once. First loop
|
||||
* loads Cb/Cr, calculates the chroma offset and saves them to buffer. Within
|
||||
* the second loop these chroma offset are reloaded from buffer. Within each
|
||||
* loop two pixels are calculated and written to LCD.
|
||||
*/
|
||||
.align 2
|
||||
.global lcd_write_yuv420_lines
|
||||
.type lcd_write_yuv420_lines, %function
|
||||
lcd_write_yuv420_lines:
|
||||
/* r0 = src = yuv_src */
|
||||
/* r1 = dst = LCD_BASE */
|
||||
/* r2 = width */
|
||||
/* r3 = stride */
|
||||
stmfd sp!, { r4-r10, lr } /* save non-scratch */
|
||||
ldmia r0, { r9, r10, r12 } /* r9 = yuv_src[0] = Y'_p */
|
||||
/* r10 = yuv_src[1] = Cb_p */
|
||||
/* r12 = yuv_src[2] = Cr_p */
|
||||
add r3, r9, r3 /* r3 = &ysrc[stride] */
|
||||
add r4, r2, r2, asr #1 /* chroma buffer lenght = width/2 *3 */
|
||||
mov r4, r4, asl #2 /* use words for str/ldm possibility */
|
||||
add r4, r4, #19 /* plus room for 4 additional words, */
|
||||
bic r4, r4, #3 /* rounded up to multiples of 4 byte */
|
||||
sub sp, sp, r4 /* and allocate on stack */
|
||||
stmia sp, {r1-r4} /* LCD_BASE, width, &ysrc[stride], stack_alloc */
|
||||
|
||||
mov r7, r2 /* r7 = loop count */
|
||||
add r8, sp, #16 /* chroma buffer */
|
||||
add lr, r1, #0x40 /* LCD data port = LCD_BASE + 0x40 */
|
||||
|
||||
/* 1st loop start */
|
||||
10: /* loop start */
|
||||
|
||||
ldrb r0, [r10], #1 /* r0 = *usrc++ = *Cb_p++ */
|
||||
ldrb r1, [r12], #1 /* r1 = *vsrc++ = *Cr_p++ */
|
||||
|
||||
sub r0, r0, #128 /* r0 = Cb-128 */
|
||||
sub r1, r1, #128 /* r1 = Cr-128 */
|
||||
|
||||
add r2, r1, r1, asl #1 /* r2 = Cr*51 + Cb*24 */
|
||||
add r2, r2, r2, asl #4
|
||||
add r2, r2, r0, asl #3
|
||||
add r2, r2, r0, asl #4
|
||||
|
||||
add r4, r1, r1, asl #2 /* r1 = Cr*101 */
|
||||
add r4, r4, r1, asl #5
|
||||
add r1, r4, r1, asl #6
|
||||
|
||||
add r1, r1, #256 /* r1 = rv = (r1 + 256) >> 9 */
|
||||
mov r1, r1, asr #9
|
||||
rsb r2, r2, #128 /* r2 = guv = (-r2 + 128) >> 8 */
|
||||
mov r2, r2, asr #8
|
||||
add r0, r0, #2 /* r0 = bu = (Cb*128 + 256) >> 9 */
|
||||
mov r0, r0, asr #2
|
||||
stmia r8!, {r0-r2} /* store r0, r1 and r2 to chroma buffer */
|
||||
|
||||
/* 1st loop, first pixel */
|
||||
ldrb r5, [r9], #1 /* r5 = *ysrc++ = *Y'_p++ */
|
||||
sub r5, r5, #16 /* r5 = (Y'-16) * 74 */
|
||||
add r3, r5, r5, asl #2
|
||||
add r5, r3, r5, asl #5
|
||||
|
||||
add r6, r1, r5, asr #8 /* r6 = r = (Y >> 9) + rv */
|
||||
add r3, r2, r5, asr #7 /* r3 = g = (Y >> 8) + guv */
|
||||
add r4, r0, r5, asr #8 /* r4 = b = (Y >> 9) + bu */
|
||||
|
||||
orr r5, r6, r4 /* check if clamping is needed... */
|
||||
orr r5, r5, r3, asr #1 /* ...at all */
|
||||
cmp r5, #31
|
||||
bls 15f /* -> no clamp */
|
||||
cmp r6, #31 /* clamp r */
|
||||
mvnhi r6, r6, asr #31
|
||||
andhi r6, r6, #31
|
||||
cmp r3, #63 /* clamp g */
|
||||
mvnhi r3, r3, asr #31
|
||||
andhi r3, r3, #63
|
||||
cmp r4, #31 /* clamp b */
|
||||
mvnhi r4, r4, asr #31
|
||||
andhi r4, r4, #31
|
||||
15: /* no clamp */
|
||||
|
||||
/* calculate pixel_1 and save to r4 for later pixel packing */
|
||||
orr r4, r4, r3, lsl #5 /* pixel_1 = r<<11 | g<<5 | b */
|
||||
orr r4, r4, r6, lsl #11 /* r4 = pixel_1 */
|
||||
|
||||
/* 1st loop, second pixel */
|
||||
ldrb r5, [r9], #1 /* r5 = *ysrc++ = *Y'_p++ */
|
||||
sub r5, r5, #16 /* r5 = (Y'-16) * 74 */
|
||||
add r3, r5, r5, asl #2
|
||||
add r5, r3, r5, asl #5
|
||||
|
||||
add r6, r1, r5, asr #8 /* r6 = r = (Y >> 9) + rv */
|
||||
add r3, r2, r5, asr #7 /* r3 = g = (Y >> 8) + guv */
|
||||
add r5, r0, r5, asr #8 /* r5 = b = (Y >> 9) + bu */
|
||||
|
||||
orr r0, r6, r5 /* check if clamping is needed... */
|
||||
orr r0, r0, r3, asr #1 /* ...at all */
|
||||
cmp r0, #31
|
||||
bls 15f /* -> no clamp */
|
||||
cmp r6, #31 /* clamp r */
|
||||
mvnhi r6, r6, asr #31
|
||||
andhi r6, r6, #31
|
||||
cmp r3, #63 /* clamp g */
|
||||
mvnhi r3, r3, asr #31
|
||||
andhi r3, r3, #63
|
||||
cmp r5, #31 /* clamp b */
|
||||
mvnhi r5, r5, asr #31
|
||||
andhi r5, r5, #31
|
||||
15: /* no clamp */
|
||||
|
||||
/* calculate pixel_2 and pack with pixel_1 before writing */
|
||||
orr r5, r5, r3, lsl #5 /* pixel_2 = r<<11 | g<<5 | b */
|
||||
orr r5, r5, r6, lsl #11 /* r5 = pixel_2 */
|
||||
#ifdef FORCE_FIFO_WAIT
|
||||
/* wait for FIFO half full */
|
||||
.fifo_wait1:
|
||||
ldr r3, [lr, #-0x24] /* while (LCD_STATUS & 0x08); */
|
||||
tst r3, #0x8
|
||||
bgt .fifo_wait1
|
||||
#endif
|
||||
stmia lr, {r4,r5} /* write pixel_1 and pixel_2 */
|
||||
|
||||
subs r7, r7, #2 /* check for loop end */
|
||||
bgt 10b /* back to beginning */
|
||||
/* 1st loop end */
|
||||
|
||||
/* Reload several registers for pointer rewinding for next loop */
|
||||
add r8, sp, #16 /* chroma buffer */
|
||||
ldmia sp, { r1, r7, r9} /* r1 = LCD_BASE */
|
||||
/* r7 = loop count */
|
||||
/* r9 = &ysrc[stride] */
|
||||
|
||||
/* 2nd loop start */
|
||||
20: /* loop start */
|
||||
/* restore r0 (bu), r1 (rv) and r2 (guv) from chroma buffer */
|
||||
ldmia r8!, {r0-r2}
|
||||
|
||||
/* 2nd loop, first pixel */
|
||||
ldrb r5, [r9], #1 /* r5 = *ysrc++ = *Y'_p++ */
|
||||
sub r5, r5, #16 /* r5 = (Y'-16) * 74 */
|
||||
add r3, r5, r5, asl #2
|
||||
add r5, r3, r5, asl #5
|
||||
|
||||
add r6, r1, r5, asr #8 /* r6 = r = (Y >> 9) + rv */
|
||||
add r3, r2, r5, asr #7 /* r3 = g = (Y >> 8) + guv */
|
||||
add r4, r0, r5, asr #8 /* r4 = b = (Y >> 9) + bu */
|
||||
|
||||
orr r5, r6, r4 /* check if clamping is needed... */
|
||||
orr r5, r5, r3, asr #1 /* ...at all */
|
||||
cmp r5, #31
|
||||
bls 15f /* -> no clamp */
|
||||
cmp r6, #31 /* clamp r */
|
||||
mvnhi r6, r6, asr #31
|
||||
andhi r6, r6, #31
|
||||
cmp r3, #63 /* clamp g */
|
||||
mvnhi r3, r3, asr #31
|
||||
andhi r3, r3, #63
|
||||
cmp r4, #31 /* clamp b */
|
||||
mvnhi r4, r4, asr #31
|
||||
andhi r4, r4, #31
|
||||
15: /* no clamp */
|
||||
/* calculate pixel_1 and save to r4 for later pixel packing */
|
||||
orr r4, r4, r3, lsl #5 /* pixel_1 = r<<11 | g<<5 | b */
|
||||
orr r4, r4, r6, lsl #11 /* r4 = pixel_1 */
|
||||
|
||||
/* 2nd loop, second pixel */
|
||||
ldrb r5, [r9], #1 /* r5 = *ysrc++ = *Y'_p++ */
|
||||
sub r5, r5, #16 /* r5 = (Y'-16) * 74 */
|
||||
add r3, r5, r5, asl #2
|
||||
add r5, r3, r5, asl #5
|
||||
|
||||
add r6, r1, r5, asr #8 /* r6 = r = (Y >> 9) + rv */
|
||||
add r3, r2, r5, asr #7 /* r3 = g = (Y >> 8) + guv */
|
||||
add r5, r0, r5, asr #8 /* r5 = b = (Y >> 9) + bu */
|
||||
|
||||
orr r0, r6, r5 /* check if clamping is needed... */
|
||||
orr r0, r0, r3, asr #1 /* ...at all */
|
||||
cmp r0, #31
|
||||
bls 15f /* -> no clamp */
|
||||
cmp r6, #31 /* clamp r */
|
||||
mvnhi r6, r6, asr #31
|
||||
andhi r6, r6, #31
|
||||
cmp r3, #63 /* clamp g */
|
||||
mvnhi r3, r3, asr #31
|
||||
andhi r3, r3, #63
|
||||
cmp r5, #31 /* clamp b */
|
||||
mvnhi r5, r5, asr #31
|
||||
andhi r5, r5, #31
|
||||
15: /* no clamp */
|
||||
|
||||
/* calculate pixel_2 and pack with pixel_1 before writing */
|
||||
orr r5, r5, r3, lsl #5 /* pixel_2 = r<<11 | g<<5 | b */
|
||||
orr r5, r5, r6, lsl #11 /* r5 = pixel_2 */
|
||||
#ifdef FORCE_FIFO_WAIT
|
||||
/* wait for FIFO half full */
|
||||
.fifo_wait2:
|
||||
ldr r3, [lr, #-0x24] /* while (LCD_STATUS & 0x08); */
|
||||
tst r3, #0x8
|
||||
bgt .fifo_wait2
|
||||
#endif
|
||||
stmia lr, {r4,r5} /* write pixel_1 and pixel_2 */
|
||||
|
||||
subs r7, r7, #2 /* check for loop end */
|
||||
bgt 20b /* back to beginning */
|
||||
/* 2nd loop end */
|
||||
|
||||
ldr r3, [sp, #12]
|
||||
add sp, sp, r3 /* deallocate buffer */
|
||||
ldmpc regs=r4-r10 /* restore registers */
|
||||
|
||||
.ltorg
|
||||
.size lcd_write_yuv420_lines, .-lcd_write_yuv420_lines
|
||||
|
|
@ -0,0 +1,286 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: lcd-nano2g.c 28868 2010-12-21 06:59:17Z Buschel $
|
||||
*
|
||||
* Copyright (C) 2009 by Dave Chapman
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include "config.h"
|
||||
|
||||
#include "hwcompat.h"
|
||||
#include "kernel.h"
|
||||
#include "lcd.h"
|
||||
#include "system.h"
|
||||
#include "cpu.h"
|
||||
#include "pmu-target.h"
|
||||
#include "power.h"
|
||||
|
||||
|
||||
#define R_HORIZ_GRAM_ADDR_SET 0x200
|
||||
#define R_VERT_GRAM_ADDR_SET 0x201
|
||||
#define R_WRITE_DATA_TO_GRAM 0x202
|
||||
#define R_HORIZ_ADDR_START_POS 0x210
|
||||
#define R_HORIZ_ADDR_END_POS 0x211
|
||||
#define R_VERT_ADDR_START_POS 0x212
|
||||
#define R_VERT_ADDR_END_POS 0x213
|
||||
|
||||
|
||||
/* LCD type 1 register defines */
|
||||
|
||||
#define R_COLUMN_ADDR_SET 0x2a
|
||||
#define R_ROW_ADDR_SET 0x2b
|
||||
#define R_MEMORY_WRITE 0x2c
|
||||
|
||||
|
||||
/** globals **/
|
||||
|
||||
int lcd_type; /* also needed in debug-s5l8702.c */
|
||||
|
||||
|
||||
static inline void s5l_lcd_write_cmd_data(int cmd, int data)
|
||||
{
|
||||
while (LCD_STATUS & 0x10);
|
||||
LCD_WCMD = cmd;
|
||||
|
||||
while (LCD_STATUS & 0x10);
|
||||
LCD_WDATA = data;
|
||||
}
|
||||
|
||||
static inline void s5l_lcd_write_cmd(unsigned short cmd)
|
||||
{
|
||||
while (LCD_STATUS & 0x10);
|
||||
LCD_WCMD = cmd;
|
||||
}
|
||||
|
||||
static inline void s5l_lcd_write_data(unsigned short data)
|
||||
{
|
||||
while (LCD_STATUS & 0x10);
|
||||
LCD_WDATA = data;
|
||||
}
|
||||
|
||||
/*** hardware configuration ***/
|
||||
|
||||
int lcd_default_contrast(void)
|
||||
{
|
||||
return 0x1f;
|
||||
}
|
||||
|
||||
void lcd_set_contrast(int val)
|
||||
{
|
||||
(void)val;
|
||||
}
|
||||
|
||||
void lcd_set_invert_display(bool yesno)
|
||||
{
|
||||
(void)yesno;
|
||||
}
|
||||
|
||||
void lcd_set_flip(bool yesno)
|
||||
{
|
||||
(void)yesno;
|
||||
}
|
||||
|
||||
bool lcd_active(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
void lcd_shutdown(void)
|
||||
{
|
||||
pmu_write(0x2b, 0); /* Kill the backlight, instantly. */
|
||||
pmu_write(0x29, 0);
|
||||
|
||||
if (lcd_type == 3)
|
||||
{
|
||||
s5l_lcd_write_cmd_data(0x7, 0x172);
|
||||
s5l_lcd_write_cmd_data(0x30, 0x3ff);
|
||||
sleep(HZ / 10);
|
||||
s5l_lcd_write_cmd_data(0x7, 0x120);
|
||||
s5l_lcd_write_cmd_data(0x30, 0x0);
|
||||
s5l_lcd_write_cmd_data(0x100, 0x780);
|
||||
s5l_lcd_write_cmd_data(0x7, 0x0);
|
||||
s5l_lcd_write_cmd_data(0x101, 0x260);
|
||||
s5l_lcd_write_cmd_data(0x102, 0xa9);
|
||||
sleep(HZ / 30);
|
||||
s5l_lcd_write_cmd_data(0x100, 0x700);
|
||||
s5l_lcd_write_cmd_data(0x100, 0x704);
|
||||
}
|
||||
else if (lcd_type == 1)
|
||||
{
|
||||
s5l_lcd_write_cmd(0x28);
|
||||
s5l_lcd_write_cmd(0x10);
|
||||
sleep(HZ / 10);
|
||||
}
|
||||
else
|
||||
{
|
||||
s5l_lcd_write_cmd(0x28);
|
||||
sleep(HZ / 20);
|
||||
s5l_lcd_write_cmd(0x10);
|
||||
sleep(HZ / 20);
|
||||
}
|
||||
}
|
||||
|
||||
void lcd_sleep(void)
|
||||
{
|
||||
lcd_shutdown();
|
||||
}
|
||||
|
||||
/* LCD init */
|
||||
void lcd_init_device(void)
|
||||
{
|
||||
/* Detect lcd type */
|
||||
lcd_type = (PDAT6 & 0x30) >> 4;
|
||||
}
|
||||
|
||||
/*** Update functions ***/
|
||||
|
||||
static inline void lcd_write_pixel(fb_data pixel)
|
||||
{
|
||||
LCD_WDATA = pixel;
|
||||
}
|
||||
|
||||
/* Update the display.
|
||||
This must be called after all other LCD functions that change the display. */
|
||||
void lcd_update(void) ICODE_ATTR;
|
||||
void lcd_update(void)
|
||||
{
|
||||
lcd_update_rect(0, 0, LCD_WIDTH, LCD_HEIGHT);
|
||||
}
|
||||
|
||||
/* Line write helper function. */
|
||||
extern void lcd_write_line(const fb_data *addr,
|
||||
int pixelcount,
|
||||
const unsigned int lcd_base_addr);
|
||||
|
||||
/* Update a fraction of the display. */
|
||||
void lcd_update_rect(int, int, int, int) ICODE_ATTR;
|
||||
void lcd_update_rect(int x, int y, int width, int height)
|
||||
{
|
||||
int y0, x0, y1, x1;
|
||||
fb_data* p;
|
||||
|
||||
/* Both x and width need to be preprocessed due to asm optimizations */
|
||||
x = x & ~1; /* ensure x is even */
|
||||
width = (width + 3) & ~3; /* ensure width is a multiple of 4 */
|
||||
|
||||
x0 = x; /* start horiz */
|
||||
y0 = y; /* start vert */
|
||||
x1 = (x + width) - 1; /* max horiz */
|
||||
y1 = (y + height) - 1; /* max vert */
|
||||
|
||||
if (lcd_type & 2) {
|
||||
s5l_lcd_write_cmd_data(R_HORIZ_ADDR_START_POS, x0);
|
||||
s5l_lcd_write_cmd_data(R_HORIZ_ADDR_END_POS, x1);
|
||||
s5l_lcd_write_cmd_data(R_VERT_ADDR_START_POS, y0);
|
||||
s5l_lcd_write_cmd_data(R_VERT_ADDR_END_POS, y1);
|
||||
|
||||
s5l_lcd_write_cmd_data(R_HORIZ_GRAM_ADDR_SET, (x1 << 8) | x0);
|
||||
s5l_lcd_write_cmd_data(R_VERT_GRAM_ADDR_SET, (y1 << 8) | y0);
|
||||
|
||||
s5l_lcd_write_cmd(R_WRITE_DATA_TO_GRAM);
|
||||
} else {
|
||||
s5l_lcd_write_cmd(R_COLUMN_ADDR_SET);
|
||||
s5l_lcd_write_data(x0 >> 8);
|
||||
s5l_lcd_write_data(x0 & 0xff);
|
||||
s5l_lcd_write_data(x1 >> 8);
|
||||
s5l_lcd_write_data(x1 & 0xff);
|
||||
|
||||
s5l_lcd_write_cmd(R_ROW_ADDR_SET);
|
||||
s5l_lcd_write_data(y0 >> 8);
|
||||
s5l_lcd_write_data(y0 & 0xff);
|
||||
s5l_lcd_write_data(y1 >> 8);
|
||||
s5l_lcd_write_data(y1 & 0xff);
|
||||
|
||||
s5l_lcd_write_cmd(R_MEMORY_WRITE);
|
||||
}
|
||||
for (y = y0; y <= y1; y++)
|
||||
for (x = x0; x <= x1; x++)
|
||||
s5l_lcd_write_data(lcd_framebuffer[y][x]);
|
||||
return;
|
||||
|
||||
/* Copy display bitmap to hardware */
|
||||
p = &lcd_framebuffer[y0][x0];
|
||||
if (LCD_WIDTH == width) {
|
||||
/* Write all lines at once */
|
||||
lcd_write_line(p, height*LCD_WIDTH, LCD_BASE);
|
||||
} else {
|
||||
y1 = height;
|
||||
do {
|
||||
/* Write a single line */
|
||||
lcd_write_line(p, width, LCD_BASE);
|
||||
p += LCD_WIDTH;
|
||||
} while (--y1 > 0 );
|
||||
}
|
||||
}
|
||||
|
||||
/* Line write helper function for lcd_yuv_blit. Writes two lines of yuv420. */
|
||||
extern void lcd_write_yuv420_lines(unsigned char const * const src[3],
|
||||
const unsigned int lcd_baseadress,
|
||||
int width,
|
||||
int stride);
|
||||
|
||||
/* Blit a YUV bitmap directly to the LCD */
|
||||
void lcd_blit_yuv(unsigned char * const src[3],
|
||||
int src_x, int src_y, int stride,
|
||||
int x, int y, int width, int height)
|
||||
{
|
||||
unsigned int z, y0, x0, y1, x1;;
|
||||
unsigned char const * yuv_src[3];
|
||||
|
||||
width = (width + 1) & ~1; /* ensure width is even */
|
||||
|
||||
x0 = x; /* start horiz */
|
||||
y0 = y; /* start vert */
|
||||
x1 = (x + width) - 1; /* max horiz */
|
||||
y1 = (y + height) - 1; /* max vert */
|
||||
|
||||
if (lcd_type & 2) {
|
||||
s5l_lcd_write_cmd_data(R_HORIZ_ADDR_START_POS, x0);
|
||||
s5l_lcd_write_cmd_data(R_HORIZ_ADDR_END_POS, x1);
|
||||
s5l_lcd_write_cmd_data(R_VERT_ADDR_START_POS, y0);
|
||||
s5l_lcd_write_cmd_data(R_VERT_ADDR_END_POS, y1);
|
||||
|
||||
s5l_lcd_write_cmd_data(R_HORIZ_GRAM_ADDR_SET, (x1 << 8) | x0);
|
||||
s5l_lcd_write_cmd_data(R_VERT_GRAM_ADDR_SET, (y1 << 8) | y0);
|
||||
|
||||
s5l_lcd_write_cmd(0);
|
||||
s5l_lcd_write_cmd(R_WRITE_DATA_TO_GRAM);
|
||||
} else {
|
||||
s5l_lcd_write_cmd(R_COLUMN_ADDR_SET);
|
||||
s5l_lcd_write_data(x0); /* Start column */
|
||||
s5l_lcd_write_data(x1); /* End column */
|
||||
|
||||
s5l_lcd_write_cmd(R_ROW_ADDR_SET);
|
||||
s5l_lcd_write_data(y0); /* Start row */
|
||||
s5l_lcd_write_data(y1); /* End row */
|
||||
|
||||
s5l_lcd_write_cmd(R_MEMORY_WRITE);
|
||||
}
|
||||
|
||||
z = stride * src_y;
|
||||
yuv_src[0] = src[0] + z + src_x;
|
||||
yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1);
|
||||
yuv_src[2] = src[2] + (yuv_src[1] - src[1]);
|
||||
|
||||
height >>= 1;
|
||||
|
||||
do {
|
||||
lcd_write_yuv420_lines(yuv_src, LCD_BASE, width, stride);
|
||||
yuv_src[0] += stride << 1;
|
||||
yuv_src[1] += stride >> 1; /* Skip down one chroma line */
|
||||
yuv_src[2] += stride >> 1;
|
||||
} while (--height > 0);
|
||||
}
|
||||
|
|
@ -0,0 +1,143 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: pmu-nano2g.c 27752 2010-08-08 10:49:32Z bertrik $
|
||||
*
|
||||
* Copyright © 2008 Rafaël Carré
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include "config.h"
|
||||
#include "kernel.h"
|
||||
#include "i2c-s5l8702.h"
|
||||
#include "pmu-target.h"
|
||||
|
||||
static struct mutex pmu_adc_mutex;
|
||||
|
||||
int pmu_read_multiple(int address, int count, unsigned char* buffer)
|
||||
{
|
||||
return i2c_read(0, 0xe6, address, count, buffer);
|
||||
}
|
||||
|
||||
int pmu_write_multiple(int address, int count, unsigned char* buffer)
|
||||
{
|
||||
return i2c_write(0, 0xe6, address, count, buffer);
|
||||
}
|
||||
|
||||
unsigned char pmu_read(int address)
|
||||
{
|
||||
unsigned char tmp;
|
||||
|
||||
pmu_read_multiple(address, 1, &tmp);
|
||||
|
||||
return tmp;
|
||||
}
|
||||
|
||||
int pmu_write(int address, unsigned char val)
|
||||
{
|
||||
return pmu_write_multiple(address, 1, &val);
|
||||
}
|
||||
|
||||
void pmu_init(void)
|
||||
{
|
||||
mutex_init(&pmu_adc_mutex);
|
||||
}
|
||||
|
||||
int pmu_read_adc(unsigned int adc)
|
||||
{
|
||||
int data = 0;
|
||||
mutex_lock(&pmu_adc_mutex);
|
||||
pmu_write(0x54, 5 | (adc << 4));
|
||||
while ((data & 0x80) == 0)
|
||||
{
|
||||
yield();
|
||||
data = pmu_read(0x57);
|
||||
}
|
||||
int value = (pmu_read(0x55) << 2) | (data & 3);
|
||||
mutex_unlock(&pmu_adc_mutex);
|
||||
return value;
|
||||
}
|
||||
|
||||
/* millivolts */
|
||||
int pmu_read_battery_voltage(void)
|
||||
{
|
||||
return pmu_read_adc(0) * 6;
|
||||
}
|
||||
|
||||
/* milliamps */
|
||||
int pmu_read_battery_current(void)
|
||||
{
|
||||
// return pmu_read_adc(2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void pmu_ldo_on_in_standby(unsigned int ldo, int onoff)
|
||||
{
|
||||
if (ldo < 4)
|
||||
{
|
||||
unsigned char newval = pmu_read(0x3B) & ~(1 << (2 * ldo));
|
||||
if (onoff) newval |= 1 << (2 * ldo);
|
||||
pmu_write(0x3B, newval);
|
||||
}
|
||||
else if (ldo < 8)
|
||||
{
|
||||
unsigned char newval = pmu_read(0x3C) & ~(1 << (2 * (ldo - 4)));
|
||||
if (onoff) newval |= 1 << (2 * (ldo - 4));
|
||||
pmu_write(0x3C, newval);
|
||||
}
|
||||
}
|
||||
|
||||
void pmu_ldo_set_voltage(unsigned int ldo, unsigned char voltage)
|
||||
{
|
||||
if (ldo > 6) return;
|
||||
pmu_write(0x2d + (ldo << 1), voltage);
|
||||
}
|
||||
|
||||
void pmu_hdd_power(bool on)
|
||||
{
|
||||
pmu_write(0x1b, on ? 1 : 0);
|
||||
}
|
||||
|
||||
void pmu_ldo_power_on(unsigned int ldo)
|
||||
{
|
||||
if (ldo > 6) return;
|
||||
pmu_write(0x2e + (ldo << 1), 1);
|
||||
}
|
||||
|
||||
void pmu_ldo_power_off(unsigned int ldo)
|
||||
{
|
||||
if (ldo > 6) return;
|
||||
pmu_write(0x2e + (ldo << 1), 0);
|
||||
}
|
||||
|
||||
void pmu_set_wake_condition(unsigned char condition)
|
||||
{
|
||||
pmu_write(0xd, condition);
|
||||
}
|
||||
|
||||
void pmu_enter_standby(void)
|
||||
{
|
||||
pmu_write(0xc, 1);
|
||||
}
|
||||
|
||||
void pmu_read_rtc(unsigned char* buffer)
|
||||
{
|
||||
pmu_read_multiple(0x59, 7, buffer);
|
||||
}
|
||||
|
||||
void pmu_write_rtc(unsigned char* buffer)
|
||||
{
|
||||
pmu_write_multiple(0x59, 7, buffer);
|
||||
}
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: pmu-target.h 24721 2010-02-17 15:54:48Z theseven $
|
||||
*
|
||||
* Copyright © 2009 Michael Sparmann
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __PMU_TARGET_H__
|
||||
#define __PMU_TARGET_H__
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "config.h"
|
||||
|
||||
unsigned char pmu_read(int address);
|
||||
int pmu_write(int address, unsigned char val);
|
||||
int pmu_read_multiple(int address, int count, unsigned char* buffer);
|
||||
int pmu_write_multiple(int address, int count, unsigned char* buffer);
|
||||
int pmu_read_adc(unsigned int adc);
|
||||
int pmu_read_battery_voltage(void);
|
||||
int pmu_read_battery_current(void);
|
||||
void pmu_init(void);
|
||||
void pmu_ldo_on_in_standby(unsigned int ldo, int onoff);
|
||||
void pmu_ldo_set_voltage(unsigned int ldo, unsigned char voltage);
|
||||
void pmu_ldo_power_on(unsigned int ldo);
|
||||
void pmu_ldo_power_off(unsigned int ldo);
|
||||
void pmu_set_wake_condition(unsigned char condition);
|
||||
void pmu_enter_standby(void);
|
||||
void pmu_read_rtc(unsigned char* buffer);
|
||||
void pmu_write_rtc(unsigned char* buffer);
|
||||
void pmu_hdd_power(bool on);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,75 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: power-nano2g.c 28190 2010-10-01 18:09:10Z Buschel $
|
||||
*
|
||||
* Copyright © 2009 Bertrik Sikken
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include <stdbool.h>
|
||||
#include "config.h"
|
||||
#include "inttypes.h"
|
||||
#include "s5l8702.h"
|
||||
#include "power.h"
|
||||
#include "panic.h"
|
||||
#include "pmu-target.h"
|
||||
#include "usb_core.h" /* for usb_charging_maxcurrent_change */
|
||||
|
||||
static int idepowered;
|
||||
|
||||
void power_off(void)
|
||||
{
|
||||
pmu_set_wake_condition(0x42); /* USB inserted or EXTON1 */
|
||||
pmu_enter_standby();
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
void power_init(void)
|
||||
{
|
||||
idepowered = false;
|
||||
}
|
||||
|
||||
void ide_power_enable(bool on)
|
||||
{
|
||||
idepowered = on;
|
||||
pmu_hdd_power(on);
|
||||
}
|
||||
|
||||
bool ide_powered()
|
||||
{
|
||||
return idepowered;
|
||||
}
|
||||
|
||||
#if CONFIG_CHARGING
|
||||
|
||||
#ifdef HAVE_USB_CHARGING_ENABLE
|
||||
void usb_charging_maxcurrent_change(int maxcurrent)
|
||||
{
|
||||
bool on = (maxcurrent >= 500);
|
||||
GPIOCMD = 0xb060e | (on ? 1 : 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
unsigned int power_input_status(void)
|
||||
{
|
||||
return (PDAT(12) & 8) ? POWER_INPUT_NONE : POWER_INPUT_MAIN_CHARGER;
|
||||
}
|
||||
|
||||
bool charging_state(void)
|
||||
{
|
||||
return false; //TODO: Figure out
|
||||
}
|
||||
#endif /* CONFIG_CHARGING */
|
||||
|
|
@ -0,0 +1,88 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: powermgmt-nano2g.c 28159 2010-09-24 22:42:06Z Buschel $
|
||||
*
|
||||
* Copyright © 2008 Rafaël Carré
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include "config.h"
|
||||
#include "powermgmt.h"
|
||||
#include "pmu-target.h"
|
||||
#include "power.h"
|
||||
#include "audiohw.h"
|
||||
|
||||
const unsigned short battery_level_dangerous[BATTERY_TYPES_COUNT] =
|
||||
{
|
||||
3600
|
||||
};
|
||||
|
||||
const unsigned short battery_level_shutoff[BATTERY_TYPES_COUNT] =
|
||||
{
|
||||
3350
|
||||
};
|
||||
|
||||
/* voltages (millivolt) of 0%, 10%, ... 100% when charging disabled */
|
||||
const unsigned short percent_to_volt_discharge[BATTERY_TYPES_COUNT][11] =
|
||||
{
|
||||
{ 3550, 3783, 3830, 3882, 3911, 3949, 3996, 4067, 4148, 4228, 4310 }
|
||||
};
|
||||
|
||||
#if CONFIG_CHARGING
|
||||
/* voltages (millivolt) of 0%, 10%, ... 100% when charging enabled */
|
||||
const unsigned short percent_to_volt_charge[11] =
|
||||
{
|
||||
3550, 3783, 3830, 3882, 3911, 3949, 3996, 4067, 4148, 4228, 4310
|
||||
};
|
||||
#endif /* CONFIG_CHARGING */
|
||||
|
||||
/* ADC should read 0x3ff=6.00V */
|
||||
#define BATTERY_SCALE_FACTOR 6000
|
||||
/* full-scale ADC readout (2^10) in millivolt */
|
||||
|
||||
|
||||
/* Returns battery voltage from ADC [millivolts] */
|
||||
unsigned int battery_adc_voltage(void)
|
||||
{
|
||||
int compensation = (10 * (pmu_read_battery_current() - 7)) / 12;
|
||||
if (charging_state()) return pmu_read_battery_voltage() - compensation;
|
||||
return pmu_read_battery_voltage() + compensation;
|
||||
}
|
||||
|
||||
|
||||
#ifdef HAVE_ACCESSORY_SUPPLY
|
||||
void accessory_supply_set(bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
/* Accessory voltage supply on */
|
||||
//TODO: pmu_ldo_power_on(6);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Accessory voltage supply off */
|
||||
//TODO: pmu_ldo_power_off(6);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_LINEOUT_POWEROFF
|
||||
void lineout_set(bool enable)
|
||||
{
|
||||
/* Call audio hardware driver implementation */
|
||||
audiohw_enable_lineout(enable);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: rtc-nano2g.c 23114 2009-10-11 18:20:56Z theseven $
|
||||
*
|
||||
* Copyright (C) 2002 by Linus Nielsen Feltzing, Uwe Freese, Laurent Baum
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include "config.h"
|
||||
#include "rtc.h"
|
||||
#include "kernel.h"
|
||||
#include "system.h"
|
||||
#include "pmu-target.h"
|
||||
|
||||
void rtc_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
int rtc_read_datetime(struct tm *tm)
|
||||
{
|
||||
unsigned int i;
|
||||
unsigned char buf[7];
|
||||
|
||||
pmu_read_rtc(buf);
|
||||
|
||||
for (i = 0; i < sizeof(buf); i++)
|
||||
buf[i] = BCD2DEC(buf[i]);
|
||||
|
||||
tm->tm_sec = buf[0];
|
||||
tm->tm_min = buf[1];
|
||||
tm->tm_hour = buf[2];
|
||||
tm->tm_wday = buf[3];
|
||||
tm->tm_mday = buf[4];
|
||||
tm->tm_mon = buf[5] - 1;
|
||||
tm->tm_year = buf[6] + 100;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int rtc_write_datetime(const struct tm *tm)
|
||||
{
|
||||
unsigned int i;
|
||||
unsigned char buf[7];
|
||||
|
||||
buf[0] = tm->tm_sec;
|
||||
buf[1] = tm->tm_min;
|
||||
buf[2] = tm->tm_hour;
|
||||
buf[3] = tm->tm_wday;
|
||||
buf[4] = tm->tm_mday;
|
||||
buf[5] = tm->tm_mon + 1;
|
||||
buf[6] = tm->tm_year - 100;
|
||||
|
||||
for (i = 0; i < sizeof(buf); i++)
|
||||
buf[i] = DEC2BCD(buf[i]);
|
||||
|
||||
pmu_write_rtc(buf);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: kernel-s5l8700.c 28795 2010-12-11 17:52:52Z Buschel $
|
||||
*
|
||||
* Copyright © 2009 Bertrik Sikken
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include "config.h"
|
||||
#include "system.h"
|
||||
#include "kernel.h"
|
||||
|
||||
/* S5L8702 driver for the kernel timer
|
||||
|
||||
Timer B is configured as a 10 kHz timer
|
||||
*/
|
||||
|
||||
void INT_TIMERB(void)
|
||||
{
|
||||
/* clear interrupt */
|
||||
TBCON = TBCON;
|
||||
|
||||
call_tick_tasks(); /* Run through the list of tick tasks */
|
||||
}
|
||||
|
||||
void tick_start(unsigned int interval_in_ms)
|
||||
{
|
||||
int cycles = 10 * interval_in_ms;
|
||||
|
||||
/* configure timer for 10 kHz */
|
||||
TBCMD = (1 << 1); /* TB_CLR */
|
||||
TBPRE = 208 - 1; /* prescaler */
|
||||
TBCON = (0 << 13) | /* TB_INT1_EN */
|
||||
(1 << 12) | /* TB_INT0_EN */
|
||||
(0 << 11) | /* TB_START */
|
||||
(2 << 8) | /* TB_CS = PCLK / 16 */
|
||||
(0 << 4); /* TB_MODE_SEL = interval mode */
|
||||
TBDATA0 = cycles; /* set interval period */
|
||||
TBCMD = (1 << 0); /* TB_EN */
|
||||
|
||||
/* enable timer interrupt */
|
||||
VIC0INTENABLE = 1 << IRQ_TIMER;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,219 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: pcm-s5l8700.c 28600 2010-11-14 19:49:20Z Buschel $
|
||||
*
|
||||
* Copyright © 2011 Michael Sparmann
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include <string.h>
|
||||
|
||||
#include "config.h"
|
||||
#include "system.h"
|
||||
#include "audio.h"
|
||||
#include "s5l8702.h"
|
||||
#include "panic.h"
|
||||
#include "audiohw.h"
|
||||
#include "pcm.h"
|
||||
#include "pcm_sampr.h"
|
||||
#include "mmu-arm.h"
|
||||
|
||||
/* S5L8702 PCM driver tunables: */
|
||||
#define LLIMAX (2047) /* Maximum number of samples per LLI */
|
||||
#define CHUNKSIZE (8700) /* Maximum number of samples to handle with one IRQ */
|
||||
/* (bigger chunks will be segmented internally) */
|
||||
#define WATERMARK (512) /* Number of remaining samples to schedule IRQ at */
|
||||
|
||||
static volatile int locked = 0;
|
||||
static const int zerosample = 0;
|
||||
static unsigned char dblbuf[WATERMARK * 4] IBSS_ATTR;
|
||||
struct dma_lli lli[(CHUNKSIZE - WATERMARK + LLIMAX - 1) / LLIMAX + 1]
|
||||
__attribute__((aligned(16)));
|
||||
static const unsigned char* dataptr;
|
||||
static size_t remaining;
|
||||
|
||||
/* Mask the DMA interrupt */
|
||||
void pcm_play_lock(void)
|
||||
{
|
||||
if (locked++ == 0) {
|
||||
//TODO: Urgh, I don't like that at all...
|
||||
VIC0INTENCLEAR = 1 << IRQ_DMAC0;
|
||||
}
|
||||
}
|
||||
|
||||
/* Unmask the DMA interrupt if enabled */
|
||||
void pcm_play_unlock(void)
|
||||
{
|
||||
if (--locked == 0) {
|
||||
VIC0INTENABLE = 1 << IRQ_DMAC0;
|
||||
}
|
||||
}
|
||||
|
||||
void INT_DMAC0C0(void) ICODE_ATTR;
|
||||
void INT_DMAC0C0(void)
|
||||
{
|
||||
DMAC0INTTCCLR = 1;
|
||||
if (!remaining) pcm_play_get_more_callback((void**)&dataptr, &remaining);
|
||||
if (!remaining)
|
||||
{
|
||||
lli->nextlli = NULL;
|
||||
lli->control = 0x75249000;
|
||||
clean_dcache();
|
||||
return;
|
||||
}
|
||||
uint32_t lastsize = MIN(WATERMARK * 4, remaining);
|
||||
remaining -= lastsize;
|
||||
struct dma_lli* lastlli;
|
||||
if (remaining) lastlli = &lli[ARRAYLEN(lli) - 1];
|
||||
else lastlli = lli;
|
||||
uint32_t chunksize = MIN(CHUNKSIZE * 4 - lastsize, remaining);
|
||||
if (remaining > chunksize && chunksize > remaining - WATERMARK * 4)
|
||||
chunksize = remaining - WATERMARK * 4;
|
||||
remaining -= chunksize;
|
||||
bool last = !chunksize;
|
||||
int i = 0;
|
||||
while (chunksize)
|
||||
{
|
||||
uint32_t thislli = MIN(LLIMAX * 4, chunksize);
|
||||
chunksize -= thislli;
|
||||
lli[i].srcaddr = (void*)dataptr;
|
||||
lli[i].dstaddr = (void*)((int)&I2STXDB0);
|
||||
lli[i].nextlli = chunksize ? &lli[i + 1] : lastlli;
|
||||
lli[i].control = (chunksize ? 0x75249000 : 0xf5249000) | (thislli / 2);
|
||||
dataptr += thislli;
|
||||
i++;
|
||||
}
|
||||
if (!remaining) memcpy(dblbuf, dataptr, lastsize);
|
||||
lastlli->srcaddr = remaining ? dataptr : dblbuf;
|
||||
lastlli->dstaddr = (void*)((int)&I2STXDB0);
|
||||
lastlli->nextlli = last ? NULL : lli;
|
||||
lastlli->control = (last ? 0xf5249000 : 0x75249000) | (lastsize / 2);
|
||||
dataptr += lastsize;
|
||||
clean_dcache();
|
||||
if (!(DMAC0C0CONFIG & 1) && (lli[0].control & 0xfff))
|
||||
{
|
||||
DMAC0C0LLI = lli[0];
|
||||
DMAC0C0CONFIG = 0x8a81;
|
||||
}
|
||||
else DMAC0C0NEXTLLI = lli;
|
||||
}
|
||||
|
||||
void pcm_play_dma_start(const void* addr, size_t size)
|
||||
{
|
||||
dataptr = (const unsigned char*)addr;
|
||||
remaining = size;
|
||||
I2STXCOM = 0xe;
|
||||
DMAC0CONFIG |= 4;
|
||||
INT_DMAC0C0();
|
||||
}
|
||||
|
||||
void pcm_play_dma_stop(void)
|
||||
{
|
||||
DMAC0C0CONFIG = 0x8a80;
|
||||
I2STXCOM = 0xa;
|
||||
}
|
||||
|
||||
/* pause playback by disabling LRCK */
|
||||
void pcm_play_dma_pause(bool pause)
|
||||
{
|
||||
if (pause) I2STXCOM |= 1;
|
||||
else I2STXCOM &= ~1;
|
||||
}
|
||||
|
||||
void pcm_play_dma_init(void)
|
||||
{
|
||||
PWRCON(0) &= ~(1 << 4);
|
||||
PWRCON(1) &= ~(1 << 7);
|
||||
I2S40 = 0x110;
|
||||
I2STXCON = 0xb100059;
|
||||
I2SCLKCON = 1;
|
||||
VIC0INTENABLE = 1 << IRQ_DMAC0;
|
||||
|
||||
audiohw_preinit();
|
||||
}
|
||||
|
||||
void pcm_postinit(void)
|
||||
{
|
||||
audiohw_postinit();
|
||||
}
|
||||
|
||||
void pcm_dma_apply_settings(void)
|
||||
{
|
||||
}
|
||||
|
||||
size_t pcm_get_bytes_waiting(void)
|
||||
{
|
||||
int bytes = remaining + (DMAC0C0LLI.control & 0xfff) * 2;
|
||||
const struct dma_lli* lli = DMAC0C0LLI.nextlli;
|
||||
while (lli)
|
||||
{
|
||||
bytes += (lli->control & 0xfff) * 2;
|
||||
lli = lli->nextlli;
|
||||
}
|
||||
return bytes;
|
||||
}
|
||||
|
||||
const void* pcm_play_dma_get_peak_buffer(int *count)
|
||||
{
|
||||
*count = (DMAC0C0LLI.control & 0xfff) * 2;
|
||||
return (void*)(((uint32_t)DMAC0C0LLI.srcaddr) & ~3);
|
||||
}
|
||||
|
||||
#ifdef HAVE_PCM_DMA_ADDRESS
|
||||
void * pcm_dma_addr(void *addr)
|
||||
{
|
||||
return addr;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
** Recording DMA transfer
|
||||
**/
|
||||
#ifdef HAVE_RECORDING
|
||||
void pcm_rec_lock(void)
|
||||
{
|
||||
}
|
||||
|
||||
void pcm_rec_unlock(void)
|
||||
{
|
||||
}
|
||||
|
||||
void pcm_rec_dma_stop(void)
|
||||
{
|
||||
}
|
||||
|
||||
void pcm_rec_dma_start(void *addr, size_t size)
|
||||
{
|
||||
(void)addr;
|
||||
(void)size;
|
||||
}
|
||||
|
||||
void pcm_rec_dma_close(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
void pcm_rec_dma_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
const void * pcm_rec_dma_get_peak_buffer(void)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
#endif /* HAVE_RECORDING */
|
||||
|
|
@ -0,0 +1,268 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: system-s5l8700.c 28935 2010-12-30 20:23:46Z Buschel $
|
||||
*
|
||||
* Copyright (C) 2007 by Rob Purchase
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include "kernel.h"
|
||||
#include "system.h"
|
||||
#include "panic.h"
|
||||
#include "system-target.h"
|
||||
#include "pmu-target.h"
|
||||
|
||||
#define default_interrupt(name) \
|
||||
extern __attribute__((weak,alias("UIRQ"))) void name (void)
|
||||
|
||||
void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
|
||||
void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked, \
|
||||
weak, alias("fiq_dummy")));
|
||||
|
||||
default_interrupt(INT_IRQ0);
|
||||
default_interrupt(INT_IRQ1);
|
||||
default_interrupt(INT_IRQ2);
|
||||
default_interrupt(INT_IRQ3);
|
||||
default_interrupt(INT_IRQ4);
|
||||
default_interrupt(INT_IRQ5);
|
||||
default_interrupt(INT_IRQ6);
|
||||
default_interrupt(INT_IRQ7);
|
||||
default_interrupt(INT_TIMERA);
|
||||
default_interrupt(INT_TIMERB);
|
||||
default_interrupt(INT_TIMERC);
|
||||
default_interrupt(INT_TIMERD);
|
||||
default_interrupt(INT_TIMERE);
|
||||
default_interrupt(INT_TIMERF);
|
||||
default_interrupt(INT_TIMERG);
|
||||
default_interrupt(INT_TIMERH);
|
||||
default_interrupt(INT_IRQ9);
|
||||
default_interrupt(INT_IRQ10);
|
||||
default_interrupt(INT_IRQ11);
|
||||
default_interrupt(INT_IRQ12);
|
||||
default_interrupt(INT_IRQ13);
|
||||
default_interrupt(INT_IRQ14);
|
||||
default_interrupt(INT_IRQ15);
|
||||
default_interrupt(INT_DMAC0C0);
|
||||
default_interrupt(INT_DMAC0C1);
|
||||
default_interrupt(INT_DMAC0C2);
|
||||
default_interrupt(INT_DMAC0C3);
|
||||
default_interrupt(INT_DMAC0C4);
|
||||
default_interrupt(INT_DMAC0C5);
|
||||
default_interrupt(INT_DMAC0C6);
|
||||
default_interrupt(INT_DMAC0C7);
|
||||
default_interrupt(INT_DMAC1C0);
|
||||
default_interrupt(INT_DMAC1C1);
|
||||
default_interrupt(INT_DMAC1C2);
|
||||
default_interrupt(INT_DMAC1C3);
|
||||
default_interrupt(INT_DMAC1C4);
|
||||
default_interrupt(INT_DMAC1C5);
|
||||
default_interrupt(INT_DMAC1C6);
|
||||
default_interrupt(INT_DMAC1C7);
|
||||
default_interrupt(INT_IRQ18);
|
||||
default_interrupt(INT_USB_FUNC);
|
||||
default_interrupt(INT_IRQ20);
|
||||
default_interrupt(INT_IRQ21);
|
||||
default_interrupt(INT_IRQ22);
|
||||
default_interrupt(INT_WHEEL);
|
||||
default_interrupt(INT_IRQ24);
|
||||
default_interrupt(INT_IRQ25);
|
||||
default_interrupt(INT_IRQ26);
|
||||
default_interrupt(INT_IRQ27);
|
||||
default_interrupt(INT_IRQ28);
|
||||
default_interrupt(INT_ATA);
|
||||
default_interrupt(INT_IRQ30);
|
||||
default_interrupt(INT_IRQ31);
|
||||
default_interrupt(INT_IRQ32);
|
||||
default_interrupt(INT_IRQ33);
|
||||
default_interrupt(INT_IRQ34);
|
||||
default_interrupt(INT_IRQ35);
|
||||
default_interrupt(INT_IRQ36);
|
||||
default_interrupt(INT_IRQ37);
|
||||
default_interrupt(INT_IRQ38);
|
||||
default_interrupt(INT_IRQ39);
|
||||
default_interrupt(INT_IRQ40);
|
||||
default_interrupt(INT_IRQ41);
|
||||
default_interrupt(INT_IRQ42);
|
||||
default_interrupt(INT_IRQ43);
|
||||
default_interrupt(INT_IRQ44);
|
||||
default_interrupt(INT_IRQ45);
|
||||
default_interrupt(INT_IRQ46);
|
||||
default_interrupt(INT_IRQ47);
|
||||
default_interrupt(INT_IRQ48);
|
||||
default_interrupt(INT_IRQ49);
|
||||
default_interrupt(INT_IRQ50);
|
||||
default_interrupt(INT_IRQ51);
|
||||
default_interrupt(INT_IRQ52);
|
||||
default_interrupt(INT_IRQ53);
|
||||
default_interrupt(INT_IRQ54);
|
||||
default_interrupt(INT_IRQ55);
|
||||
default_interrupt(INT_IRQ56);
|
||||
default_interrupt(INT_IRQ57);
|
||||
default_interrupt(INT_IRQ58);
|
||||
default_interrupt(INT_IRQ59);
|
||||
default_interrupt(INT_IRQ60);
|
||||
default_interrupt(INT_IRQ61);
|
||||
default_interrupt(INT_IRQ62);
|
||||
default_interrupt(INT_IRQ63);
|
||||
|
||||
|
||||
int current_irq;
|
||||
|
||||
|
||||
void INT_TIMER(void) ICODE_ATTR;
|
||||
void INT_TIMER()
|
||||
{
|
||||
if (TACON & (TACON >> 4) & 0x7000) INT_TIMERA();
|
||||
if (TBCON & (TBCON >> 4) & 0x7000) INT_TIMERB();
|
||||
if (TCCON & (TCCON >> 4) & 0x7000) INT_TIMERC();
|
||||
if (TDCON & (TDCON >> 4) & 0x7000) INT_TIMERD();
|
||||
if (TFCON & (TFCON >> 4) & 0x7000) INT_TIMERF();
|
||||
if (TGCON & (TGCON >> 4) & 0x7000) INT_TIMERG();
|
||||
if (THCON & (THCON >> 4) & 0x7000) INT_TIMERH();
|
||||
}
|
||||
|
||||
void INT_DMAC0(void) ICODE_ATTR;
|
||||
void INT_DMAC0()
|
||||
{
|
||||
uint32_t intsts = DMAC0INTSTS;
|
||||
if (intsts & 1) INT_DMAC0C0();
|
||||
if (intsts & 2) INT_DMAC0C1();
|
||||
if (intsts & 4) INT_DMAC0C2();
|
||||
if (intsts & 8) INT_DMAC0C3();
|
||||
if (intsts & 0x10) INT_DMAC0C4();
|
||||
if (intsts & 0x20) INT_DMAC0C5();
|
||||
if (intsts & 0x40) INT_DMAC0C6();
|
||||
if (intsts & 0x80) INT_DMAC0C7();
|
||||
}
|
||||
|
||||
void INT_DMAC1(void) ICODE_ATTR;
|
||||
void INT_DMAC1()
|
||||
{
|
||||
uint32_t intsts = DMAC1INTSTS;
|
||||
if (intsts & 1) INT_DMAC1C0();
|
||||
if (intsts & 2) INT_DMAC1C1();
|
||||
if (intsts & 4) INT_DMAC1C2();
|
||||
if (intsts & 8) INT_DMAC1C3();
|
||||
if (intsts & 0x10) INT_DMAC1C4();
|
||||
if (intsts & 0x20) INT_DMAC1C5();
|
||||
if (intsts & 0x40) INT_DMAC1C6();
|
||||
if (intsts & 0x80) INT_DMAC1C7();
|
||||
}
|
||||
|
||||
static void (* const irqvector[])(void) =
|
||||
{
|
||||
INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7,
|
||||
INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15,
|
||||
INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_WHEEL,
|
||||
INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31,
|
||||
INT_IRQ32,INT_IRQ33,INT_IRQ34,INT_IRQ35,INT_IRQ36,INT_IRQ37,INT_IRQ38,INT_IRQ39,
|
||||
INT_IRQ40,INT_IRQ41,INT_IRQ42,INT_IRQ43,INT_IRQ55,INT_IRQ56,INT_IRQ57,INT_IRQ58,
|
||||
INT_IRQ48,INT_IRQ49,INT_IRQ50,INT_IRQ51,INT_IRQ52,INT_IRQ53,INT_IRQ54,INT_IRQ55,
|
||||
INT_IRQ56,INT_IRQ57,INT_IRQ58,INT_IRQ59,INT_IRQ60,INT_IRQ61,INT_IRQ62,INT_IRQ63
|
||||
};
|
||||
|
||||
static void UIRQ(void)
|
||||
{
|
||||
panicf("Unhandled IRQ %d!", current_irq);
|
||||
}
|
||||
|
||||
void irq_handler(void)
|
||||
{
|
||||
/*
|
||||
* Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c
|
||||
*/
|
||||
|
||||
asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */
|
||||
"sub sp, sp, #8 \n"); /* Reserve stack */
|
||||
|
||||
void* dummy = VIC0ADDRESS;
|
||||
dummy = VIC1ADDRESS;
|
||||
uint32_t irqs0 = VIC0IRQSTATUS;
|
||||
uint32_t irqs1 = VIC1IRQSTATUS;
|
||||
for (current_irq = 0; irqs0; current_irq++, irqs0 >>= 1)
|
||||
if (irqs0 & 1)
|
||||
irqvector[current_irq]();
|
||||
for (current_irq = 32; irqs1; current_irq++, irqs1 >>= 1)
|
||||
if (irqs1 & 1)
|
||||
irqvector[current_irq]();
|
||||
VIC0ADDRESS = NULL;
|
||||
VIC1ADDRESS = NULL;
|
||||
|
||||
asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */
|
||||
"ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */
|
||||
"subs pc, lr, #4 \n"); /* Return from IRQ */
|
||||
}
|
||||
|
||||
void fiq_dummy(void)
|
||||
{
|
||||
asm volatile (
|
||||
"subs pc, lr, #4 \r\n"
|
||||
);
|
||||
}
|
||||
|
||||
|
||||
void system_init(void)
|
||||
{
|
||||
pmu_init();
|
||||
VIC0INTENABLE = 1 << IRQ_WHEEL;
|
||||
}
|
||||
|
||||
void system_reboot(void)
|
||||
{
|
||||
/* Reset the SoC */
|
||||
asm volatile("msr CPSR_c, #0xd3 \n"
|
||||
"mov r0, #0x100000 \n"
|
||||
"mov r1, #0x3c800000 \n"
|
||||
"str r0, [r1] \n");
|
||||
|
||||
/* Wait for reboot to kick in */
|
||||
while(1);
|
||||
}
|
||||
|
||||
//extern void post_mortem_stub(void);
|
||||
|
||||
void system_exception_wait(void)
|
||||
{
|
||||
// post_mortem_stub();
|
||||
while(1);
|
||||
}
|
||||
|
||||
int system_memory_guard(int newmode)
|
||||
{
|
||||
(void)newmode;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
|
||||
|
||||
void set_cpu_frequency(long frequency)
|
||||
{
|
||||
if (cpu_frequency == frequency)
|
||||
return;
|
||||
|
||||
if (frequency == CPUFREQ_MAX)
|
||||
{
|
||||
//TODO: Figure out and implement
|
||||
}
|
||||
else
|
||||
{
|
||||
//TODO: Figure out and implement
|
||||
}
|
||||
|
||||
cpu_frequency = frequency;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: system-target.h 28791 2010-12-11 09:39:33Z Buschel $
|
||||
*
|
||||
* Copyright (C) 2007 by Dave Chapman
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#ifndef SYSTEM_TARGET_H
|
||||
#define SYSTEM_TARGET_H
|
||||
|
||||
#include "system-arm.h"
|
||||
#include "mmu-arm.h"
|
||||
|
||||
//TODO: Figure out
|
||||
#define CPUFREQ_SLEEP 32768
|
||||
#define CPUFREQ_MAX (1843200 * 4 * 26 / 1) /* 191692800 Hz */
|
||||
#define CPUFREQ_DEFAULT (CPUFREQ_MAX/4) /* 47923200 Hz */
|
||||
#define CPUFREQ_NORMAL (CPUFREQ_MAX/4)
|
||||
|
||||
#define STORAGE_WANTS_ALIGN
|
||||
|
||||
#define inl(a) (*(volatile unsigned long *) (a))
|
||||
#define outl(a,b) (*(volatile unsigned long *) (b) = (a))
|
||||
#define inb(a) (*(volatile unsigned char *) (a))
|
||||
#define outb(a,b) (*(volatile unsigned char *) (b) = (a))
|
||||
#define inw(a) (*(volatile unsigned short*) (a))
|
||||
#define outw(a,b) (*(volatile unsigned short*) (b) = (a))
|
||||
|
||||
static inline void udelay(unsigned usecs)
|
||||
{
|
||||
unsigned stop = USEC_TIMER + usecs;
|
||||
while (TIME_BEFORE(USEC_TIMER, stop));
|
||||
}
|
||||
|
||||
#endif /* SYSTEM_TARGET_H */
|
||||
|
|
@ -0,0 +1,94 @@
|
|||
/***************************************************************************
|
||||
* __________ __ ___.
|
||||
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
||||
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
||||
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
||||
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
||||
* \/ \/ \/ \/ \/
|
||||
* $Id: timer-s5l8700.c 23103 2009-10-11 11:35:14Z theseven $
|
||||
*
|
||||
* Copyright (C) 2009 Bertrik Sikken
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
||||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include "config.h"
|
||||
|
||||
#include "inttypes.h"
|
||||
#include "s5l8702.h"
|
||||
#include "system.h"
|
||||
#include "timer.h"
|
||||
|
||||
//TODO: This needs calibration once we figure out the clocking
|
||||
|
||||
void INT_TIMERC(void)
|
||||
{
|
||||
/* clear interrupt */
|
||||
TCCON = TCCON;
|
||||
|
||||
if (pfn_timer != NULL) {
|
||||
pfn_timer();
|
||||
}
|
||||
}
|
||||
|
||||
bool timer_set(long cycles, bool start)
|
||||
{
|
||||
static const int cs_table[] = {1, 2, 4, 6};
|
||||
int prescale, cs;
|
||||
long count;
|
||||
|
||||
/* stop and clear timer */
|
||||
TCCMD = (1 << 1); /* TD_CLR */
|
||||
|
||||
/* optionally unregister any previously registered timer user */
|
||||
if (start) {
|
||||
if (pfn_unregister != NULL) {
|
||||
pfn_unregister();
|
||||
pfn_unregister = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/* scale the count down with the clock select */
|
||||
for (cs = 0; cs < 4; cs++) {
|
||||
count = cycles >> cs_table[cs];
|
||||
if ((count < 65536) || (cs == 3)) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* scale the count down with the prescaler */
|
||||
prescale = 1;
|
||||
while (count >= 65536) {
|
||||
count >>= 1;
|
||||
prescale <<= 1;
|
||||
}
|
||||
|
||||
/* configure timer */
|
||||
TCCON = (1 << 12) | /* TD_INT0_EN */
|
||||
(cs << 8) | /* TS_CS */
|
||||
(0 << 4); /* TD_MODE_SEL, 0 = interval mode */
|
||||
TCPRE = prescale - 1;
|
||||
TCDATA0 = count;
|
||||
TCCMD = (1 << 0); /* TD_ENABLE */
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool timer_start(void)
|
||||
{
|
||||
TCCMD = (1 << 0); /* TD_ENABLE */
|
||||
return true;
|
||||
}
|
||||
|
||||
void timer_stop(void)
|
||||
{
|
||||
TCCMD = (0 << 0); /* TD_ENABLE */
|
||||
}
|
||||
|
||||
|
|
@ -93,7 +93,8 @@ static inline void load_context(const void* addr)
|
|||
|
||||
#if defined(CPU_TCC780X) || defined(CPU_TCC77X) /* Single core only for now */ \
|
||||
|| CONFIG_CPU == IMX31L || CONFIG_CPU == DM320 || CONFIG_CPU == AS3525 \
|
||||
|| CONFIG_CPU == S3C2440 || CONFIG_CPU == S5L8701 || CONFIG_CPU == AS3525v2
|
||||
|| CONFIG_CPU == S3C2440 || CONFIG_CPU == S5L8701 || CONFIG_CPU == AS3525v2 \
|
||||
|| CONFIG_CPU == S5L8702
|
||||
/* Use the generic ARMv4/v5/v6 wait for IRQ */
|
||||
static inline void core_sleep(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1068,32 +1068,31 @@ cat <<EOF
|
|||
6) AV300 26) Mini 2G
|
||||
==Toshiba== 27) 1G, 2G
|
||||
==Cowon/iAudio== 40) Gigabeat F/X 28) Nano 2G
|
||||
30) X5/X5V/X5L 41) Gigabeat S
|
||||
31) M5/M5L ==SanDisk==
|
||||
32) 7 ==Olympus= 50) Sansa e200
|
||||
33) D2 70) M:Robe 500 51) Sansa e200R
|
||||
34) M3/M3L 71) M:Robe 100 52) Sansa c200
|
||||
53) Sansa m200
|
||||
==Creative== ==Philips== 54) Sansa c100
|
||||
90) Zen Vision:M 30GB 100) GoGear SA9200 55) Sansa Clip
|
||||
91) Zen Vision:M 60GB 101) GoGear HDD1630/ 56) Sansa e200v2
|
||||
92) Zen Vision HDD1830 57) Sansa m200v4
|
||||
102) GoGear HDD6330 58) Sansa Fuze
|
||||
==Onda== 59) Sansa c200v2
|
||||
120) VX747 ==Meizu== 60) Sansa Clipv2
|
||||
121) VX767 110) M6SL 61) Sansa View
|
||||
122) VX747+ 111) M6SP 62) Sansa Clip+
|
||||
123) VX777 112) M3 63) Sansa Fuze v2
|
||||
|
||||
==Logik==
|
||||
==Samsung== ==Tatung== 80) DAX 1GB MP3/DAB
|
||||
140) YH-820 150) Elio TPJ-1022
|
||||
141) YH-920 ==Lyre project==
|
||||
142) YH-925 ==Packard Bell== 130) Lyre proto 1
|
||||
143) YP-S3 160) Vibe 500 131) Mini2440
|
||||
|
||||
==MPIO== == Application ==
|
||||
170) HD200 200) Application
|
||||
30) X5/X5V/X5L 41) Gigabeat S 29) Classic/6G
|
||||
31) M5/M5L
|
||||
32) 7 ==Olympus= ==SanDisk==
|
||||
33) D2 70) M:Robe 500 50) Sansa e200
|
||||
34) M3/M3L 71) M:Robe 100 51) Sansa e200R
|
||||
52) Sansa c200
|
||||
==Creative== ==Philips== 53) Sansa m200
|
||||
90) Zen Vision:M 30GB 100) GoGear SA9200 54) Sansa c100
|
||||
91) Zen Vision:M 60GB 101) GoGear HDD1630/ 55) Sansa Clip
|
||||
92) Zen Vision HDD1830 56) Sansa e200v2
|
||||
102) GoGear HDD6330 57) Sansa m200v4
|
||||
==Onda== 58) Sansa Fuze
|
||||
120) VX747 ==Meizu== 59) Sansa c200v2
|
||||
121) VX767 110) M6SL 60) Sansa Clipv2
|
||||
122) VX747+ 111) M6SP 61) Sansa View
|
||||
123) VX777 112) M3 62) Sansa Clip+
|
||||
63) Sansa Fuze v2
|
||||
==Samsung== ==Tatung==
|
||||
140) YH-820 150) Elio TPJ-1022 ==Logik==
|
||||
141) YH-920 80) DAX 1GB MP3/DAB
|
||||
142) YH-925 ==Packard Bell==
|
||||
143) YP-S3 160) Vibe 500 ==Lyre project==
|
||||
130) Lyre proto 1
|
||||
==MPIO== == Application == 131) Mini2440
|
||||
170) HD200 200) Application
|
||||
171) HD300
|
||||
|
||||
EOF
|
||||
|
|
@ -1660,6 +1659,29 @@ fi
|
|||
t_model="ipodnano2g"
|
||||
;;
|
||||
|
||||
29|ipod6g)
|
||||
target_id=71
|
||||
modelname="ipod6g"
|
||||
target="-DIPOD_6G"
|
||||
memory=64 # always
|
||||
arm926ejscc
|
||||
tool="$rootdir/tools/scramble -add=ip6g"
|
||||
bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
|
||||
bmp2rb_native="$rootdir/tools/bmp2rb -f 4"
|
||||
output="rockbox.ipod"
|
||||
appextra="recorder:gui:radio"
|
||||
plugins="yes"
|
||||
swcodec="yes"
|
||||
bootoutput="bootloader-$modelname.ipod"
|
||||
# toolset is the tools within the tools directory that we build for
|
||||
# this particular target.
|
||||
toolset=$ipodbitmaptools
|
||||
# architecture, manufacturer and model for the target-tree build
|
||||
t_cpu="arm"
|
||||
t_manufacturer="s5l8702"
|
||||
t_model="ipod6g"
|
||||
;;
|
||||
|
||||
30|iaudiox5)
|
||||
target_id=12
|
||||
modelname="iaudiox5"
|
||||
|
|
|
|||
|
|
@ -125,7 +125,8 @@ void usage(void)
|
|||
"\t tpj2, c200, e200, giga, gigs, m100, m500, d2,\n");
|
||||
printf("\t 9200, 1630, 6330, ldax, m200, c100, clip, e2v2,\n"
|
||||
"\t m2v4, fuze, c2v2, clv2, y820, y920, y925, x747,\n"
|
||||
"\t 747p, x777, nn2g, m244, cli+, fuz2, hd20, hd30)\n");
|
||||
"\t 747p, x777, nn2g, m244, cli+, fuz2, hd20, hd30,\n"
|
||||
"\t ip6g)\n");
|
||||
printf("\nNo option results in Archos standard player/recorder format.\n");
|
||||
|
||||
exit(1);
|
||||
|
|
@ -332,6 +333,8 @@ int main (int argc, char** argv)
|
|||
modelnum = 69;
|
||||
else if (!strcmp(&argv[1][5], "hd30")) /* MPIO HD300 */
|
||||
modelnum = 70;
|
||||
else if (!strcmp(&argv[1][5], "ip6g")) /* iPod Classic/6G */
|
||||
modelnum = 71;
|
||||
else {
|
||||
fprintf(stderr, "unsupported model: %s\n", &argv[1][5]);
|
||||
return 2;
|
||||
|
|
|
|||
Loading…
Reference in New Issue