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Make basic cache functions into calls, and get rid of CACHE_FUNCTION_WRAPPERS and CACHE_FUNCTIONS_AS_CALL macros. Rename flush/invalidate_icache to cpucache_flush/invalidate. They're inlined only if an implementation isn't provided by defining HAVE_CPUCACHE_FLUSH/INVALIDATE. 

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19971 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2009-02-11 12:55:51 +00:00
parent 4cd7597172
commit 21f0c9a282
28 changed files with 136 additions and 173 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
apps/codecs.c
View File

@ -113,9 +113,9 @@ struct codec_api ci = {
semaphore_release,
#endif
#ifdef CACHE_FUNCTIONS_AS_CALL
flush_icache,
invalidate_icache,
#if NUM_CORES > 1
cpucache_flush,
cpucache_invalidate,
#endif
/* strings and memory */
@ -232,7 +232,7 @@ static int codec_load_ram(int size, struct codec_api *api)
}
*(hdr->api) = api;
invalidate_icache();
cpucache_invalidate();
status = hdr->entry_point();
sim_codec_close(pd);

24
apps/codecs.h
View File

@ -170,9 +170,9 @@ struct codec_api {
void (*semaphore_release)(struct semaphore *s);
#endif /* NUM_CORES */
#ifdef CACHE_FUNCTIONS_AS_CALL
void (*flush_icache)(void);
void (*invalidate_icache)(void);
#if NUM_CORES > 1
void (*cpucache_flush)(void);
void (*cpucache_invalidate)(void);
#endif
/* strings and memory */
@ -297,22 +297,4 @@ int codec_load_file(const char* codec, struct codec_api *api);
enum codec_status codec_start(void);
enum codec_status codec_main(void);
#ifndef CACHE_FUNCTION_WRAPPERS
#ifdef CACHE_FUNCTIONS_AS_CALL
#define CACHE_FUNCTION_WRAPPERS(api) \
void flush_icache(void) \
{ \
(api)->flush_icache(); \
} \
void invalidate_icache(void) \
{ \
(api)->invalidate_icache(); \
}
#else
#define CACHE_FUNCTION_WRAPPERS(api)
#endif /* CACHE_FUNCTIONS_AS_CALL */
#endif /* CACHE_FUNCTION_WRAPPERS */
#endif

4
apps/codecs/codec_crt0.c
View File

@ -34,8 +34,6 @@ extern unsigned char plugin_end_addr[];
extern enum codec_status codec_main(void);
CACHE_FUNCTION_WRAPPERS(ci);
enum codec_status codec_start(void)
{
#ifndef SIMULATOR
@ -47,7 +45,7 @@ enum codec_status codec_start(void)
#endif
#if NUM_CORES > 1
/* writeback cleared iedata and bss areas */
flush_icache();
ci->cpucache_flush();
#endif
return codec_main();
}

2
apps/codecs/mpa.c
View File

@ -268,7 +268,7 @@ static void mad_synth_thread_quit(void)
die=1;
ci->semaphore_release(&synth_pending_sem);
ci->thread_wait(mad_synth_thread_id);
invalidate_icache();
ci->cpucache_invalidate();
}
#else
static inline void mad_synth_thread_ready(void)

6
apps/codecs/spc.c
View File

@ -302,7 +302,7 @@ static bool emu_thread_process_msg(struct sample_queue_chunk *chunk)
if (id == SPC_EMU_LOAD)
{
struct spc_load *ld = (struct spc_load *)chunk->data;
invalidate_icache();
ci->cpucache_invalidate();
SPC_Init(&spc_emu);
sample_queue.retval = SPC_load_spc(&spc_emu, ld->buf, ld->size);
@ -376,7 +376,7 @@ static bool spc_emu_start(void)
static inline int load_spc_buffer(uint8_t *buf, size_t size)
{
struct spc_load ld = { buf, size };
flush_icache();
ci->cpucache_flush();
return emu_thread_send_msg(SPC_EMU_LOAD, (intptr_t)&ld);
}
@ -386,7 +386,7 @@ static inline void spc_emu_quit(void)
emu_thread_send_msg(SPC_EMU_QUIT, 0);
/* Wait for emu thread to be killed */
ci->thread_wait(emu_thread_id);
invalidate_icache();
ci->cpucache_invalidate();
}
}

4
apps/playback.c
View File

@ -1317,9 +1317,9 @@ static void codec_thread(void)
queue_reply(&codec_queue, 1);
if ((void*)ev.data != NULL)
{
invalidate_icache();
cpucache_invalidate();
((void (*)(void))ev.data)();
flush_icache();
cpucache_flush();
}
break;

12
apps/plugin.c
View File

@ -327,9 +327,9 @@ static const struct plugin_api rockbox_api = {
trigger_cpu_boost,
cancel_cpu_boost,
#endif
#ifdef CACHE_FUNCTIONS_AS_CALL
flush_icache,
invalidate_icache,
#if NUM_CORES > 1
cpucache_flush,
cpucache_invalidate,
#endif
timer_register,
timer_unregister,
@ -694,7 +694,7 @@ int plugin_load(const char* plugin, const void* parameter)
#if NUM_CORES > 1
/* Make sure COP cache is flushed and invalidated before loading */
my_core = switch_core(CURRENT_CORE ^ 1);
invalidate_icache();
cpucache_invalidate();
switch_core(my_core);
#endif
@ -742,7 +742,7 @@ int plugin_load(const char* plugin, const void* parameter)
lcd_remote_update();
#endif
invalidate_icache();
cpucache_invalidate();
oldbars = viewportmanager_set_statusbar(VP_SB_HIDE_ALL);
rc = hdr->entry_point(parameter);
@ -854,7 +854,7 @@ void plugin_iram_init(char *iramstart, char *iramcopy, size_t iram_size,
memset(iramcopy, 0, iram_size);
#if NUM_CORES > 1
/* writeback cleared iedata and iramcopy areas */
flush_icache();
cpucache_flush();
#endif
}
#endif /* PLUGIN_USE_IRAM */

21
apps/plugin.h
View File

@ -438,9 +438,9 @@ struct plugin_api {
void (*trigger_cpu_boost)(void);
void (*cancel_cpu_boost)(void);
#endif
#ifdef CACHE_FUNCTIONS_AS_CALL
void (*flush_icache)(void);
void (*invalidate_icache)(void);
#if NUM_CORES > 1
void (*cpucache_flush)(void);
void (*cpucache_invalidate)(void);
#endif
bool (*timer_register)(int reg_prio, void (*unregister_callback)(void),
long cycles, int int_prio,
@ -854,20 +854,5 @@ extern const struct plugin_api *rb;
enum plugin_status plugin_start(const void* parameter)
NO_PROF_ATTR;
#undef CACHE_FUNCTION_WRAPPERS
#ifdef CACHE_FUNCTIONS_AS_CALL
#define CACHE_FUNCTION_WRAPPERS \
void flush_icache(void) \
{ \
rb->flush_icache(); \
} \
void invalidate_icache(void) \
{ \
rb->invalidate_icache(); \
}
#else
#define CACHE_FUNCTION_WRAPPERS
#endif /* CACHE_FUNCTIONS_AS_CALL */
#endif /* __PCTOOL__ */
#endif

2
apps/plugins/mpegplayer/alloc.c
View File

@ -149,7 +149,7 @@ bool mpeg_alloc_init(unsigned char *buf, size_t mallocsize)
return false;
}
IF_COP(invalidate_icache());
IF_COP(rb->cpucache_invalidate());
return true;
}

2
apps/plugins/mpegplayer/mpegplayer.c
View File

@ -296,8 +296,6 @@ CONFIG_KEYPAD == SANSA_M200_PAD
#endif
#endif
CACHE_FUNCTION_WRAPPERS;
/* One thing we can do here for targets with remotes is having a display
* always on the remote instead of always forcing a popup on the main display */

8
apps/plugins/mpegplayer/video_thread.c
View File

@ -524,7 +524,7 @@ static void video_thread_msg(struct video_thread_data *td)
}
else
{
IF_COP(invalidate_icache());
IF_COP(rb->cpucache_invalidate());
vo_lock();
rb->lcd_update();
vo_unlock();
@ -996,7 +996,7 @@ bool video_thread_init(void)
{
intptr_t rep;
IF_COP(flush_icache());
IF_COP(rb->cpucache_flush());
video_str.hdr.q = &video_str_queue;
rb->queue_init(video_str.hdr.q, false);
@ -1014,7 +1014,7 @@ bool video_thread_init(void)
/* Wait for thread to initialize */
rep = str_send_msg(&video_str, STREAM_NULL, 0);
IF_COP(invalidate_icache());
IF_COP(rb->cpucache_invalidate());
return rep == 0; /* Normally STREAM_NULL should be ignored */
}
@ -1026,7 +1026,7 @@ void video_thread_exit(void)
{
str_post_msg(&video_str, STREAM_QUIT, 0);
rb->thread_wait(video_str.thread);
IF_COP(invalidate_icache());
IF_COP(rb->cpucache_invalidate());
video_str.thread = 0;
}
}

2
apps/plugins/rockboy/dynarec.c
View File

@ -1905,7 +1905,7 @@ void dynamic_recompile (struct dynarec_block *newblock)
PC=oldpc;
setmallocpos(dynapointer);
newblock->length=dynapointer-newblock->block;
invalidate_icache();
IF_COP(rb->cpucache_invalidate());
snprintf(meow,499,"/dyna_0x%x_code.rb",PC);
fd=open(meow,O_WRONLY|O_CREAT|O_TRUNC);
if(fd>=0)

6
apps/plugins/test_codec.c
View File

@ -480,9 +480,9 @@ static void init_ci(void)
ci.profile_func_exit = rb->profile_func_exit;
#endif
#ifdef CACHE_FUNCTIONS_AS_CALL
ci.invalidate_icache = invalidate_icache;
ci.flush_icache = flush_icache;
#if NUM_CORES > 1
ci.cpucache_invalidate = rb->cpucache_invalidate;
ci.cpucache_flush = rb->cpucache_flush;
#endif
#if NUM_CORES > 1

4
bootloader/gigabeat-s.c
View File

@ -311,7 +311,7 @@ static void __attribute__((noreturn)) handle_firmware_load(void)
if (rc == EOK)
{
invalidate_icache();
cpucache_invalidate();
asm volatile ("bx %0": : "r"(start_addr));
}
@ -332,7 +332,7 @@ void main(void)
int rc;
/* Flush and invalidate all caches (because vectors were written) */
invalidate_icache();
cpucache_invalidate();
system_init();
kernel_init();

4
bootloader/gigabeat.c
View File

@ -196,7 +196,7 @@ void main(void)
printf("Loading firmware");
/* Flush out anything pending first */
invalidate_icache();
cpucache_invalidate();
loadbuffer = (unsigned char*) 0x31000000;
buffer_size = (unsigned char*)0x31400000 - loadbuffer;
@ -210,7 +210,7 @@ void main(void)
if (rc == EOK)
{
invalidate_icache();
cpucache_invalidate();
kernel_entry = (void*) loadbuffer;
rc = kernel_entry();
}

16
firmware/export/system.h
View File

@ -272,12 +272,20 @@ static inline uint32_t swap_odd_even32(uint32_t value)
#endif
/* Just define these as empty if not declared */
#ifndef HAVE_INVALIDATE_ICACHE
#define invalidate_icache()
#ifdef HAVE_CPUCACHE_INVALIDATE
void cpucache_invalidate(void);
#else
static inline void cpucache_invalidate(void)
{
}
#endif
#ifndef HAVE_FLUSH_ICACHE
#define flush_icache()
#ifdef HAVE_CPUCACHE_FLUSH
void cpucache_flush(void);
#else
static inline void cpucache_flush(void)
{
}
#endif
#ifdef PROC_NEEDS_CACHEALIGN

6
firmware/rolo.c
View File

@ -75,7 +75,7 @@ void rolo_restart_cop(void)
COP_INT_DIS = -1;
/* Invalidate cache */
invalidate_icache();
cpucache_invalidate();
/* Disable cache */
CACHE_CTL = CACHE_CTL_DISABLE;
@ -147,7 +147,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
CPU_INT_DIS = -1;
/* Flush cache */
flush_icache();
cpucache_flush();
/* Disable cache */
CACHE_CTL = CACHE_CTL_DISABLE;
@ -174,7 +174,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
#elif defined(CPU_TCC780X) || (CONFIG_CPU == S3C2440)
/* Flush and invalidate caches */
invalidate_icache();
cpucache_invalidate();
asm volatile(
"mov pc, %0 \n"

32
firmware/target/arm/imx31/gigabeat-s/system-target.h
View File

@ -57,34 +57,12 @@ void imx31_regclr32(volatile uint32_t *reg_p, uint32_t mask);
#define KDEV_INIT
#define HAVE_INVALIDATE_ICACHE
static inline void invalidate_icache(void)
{
asm volatile(
/* Clean and invalidate entire data cache */
"mcr p15, 0, %0, c7, c14, 0 \n"
/* Invalidate entire instruction cache
* Also flushes the branch target cache */
"mcr p15, 0, %0, c7, c5, 0 \n"
/* Data synchronization barrier */
"mcr p15, 0, %0, c7, c10, 4 \n"
/* Flush prefetch buffer */
"mcr p15, 0, %0, c7, c5, 4 \n"
: : "r"(0)
);
}
#define HAVE_CPUCACHE_INVALIDATE
#define HAVE_CPUCACHE_FLUSH
#define HAVE_FLUSH_ICACHE
static inline void flush_icache(void)
{
asm volatile (
/* Clean entire data cache */
"mcr p15, 0, %0, c7, c10, 0 \n"
/* Data synchronization barrier */
"mcr p15, 0, %0, c7, c10, 4 \n"
: : "r"(0)
);
}
/* Different internal names */
#define cpucache_flush clean_dcache
#define cpucache_invalidate invalidate_idcache
struct ARM_REGS {
int r0;

30
firmware/target/arm/mmu-arm.c
View File

@ -265,6 +265,8 @@ void __attribute__((naked)) clean_dcache(void)
/* Clean entire data cache */
"mov r0, #0 \n"
"mcr p15, 0, r0, c7, c10, 0 \n"
/* Data synchronization barrier */
"mcr p15, 0, r0, c7, c10, 4 \n"
"bx lr \n"
);
}
@ -290,3 +292,31 @@ void clean_dcache(void)
}
#endif
#if CONFIG_CPU == IMX31L
void invalidate_idcache(void)
{
asm volatile(
/* Clean and invalidate entire data cache */
"mcr p15, 0, %0, c7, c14, 0 \n"
/* Invalidate entire instruction cache
* Also flushes the branch target cache */
"mcr p15, 0, %0, c7, c5, 0 \n"
/* Data synchronization barrier */
"mcr p15, 0, %0, c7, c10, 4 \n"
/* Flush prefetch buffer */
"mcr p15, 0, %0, c7, c5, 4 \n"
: : "r"(0)
);
}
#else
void invalidate_idcache(void)
{
clean_dcache();
asm volatile(
"mov r0, #0 \n"
"mcr p15, 0, r0, c7, c5, 0 \n"
: : : "r0"
);
}
#endif

14
firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
View File

@ -41,15 +41,9 @@ void s3c_regset32(volatile unsigned long *reg, unsigned long bits);
/* Clear register bits */
void s3c_regclr32(volatile unsigned long *reg, unsigned long bits);
#define HAVE_INVALIDATE_ICACHE
static inline void invalidate_icache(void)
{
clean_dcache();
asm volatile(
"mov r0, #0 \n"
"mcr p15, 0, r0, c7, c5, 0 \n"
: : : "r0"
);
}
#define HAVE_CPUCACHE_FLUSH
#define HAVE_CPUCACHE_INVALIDATE
#define cpucache_flush clean_dcache
#define cpucache_invalidate invalidate_idcache
#endif /* SYSTEM_TARGET_H */

6
firmware/target/arm/system-pp5002.c
View File

@ -62,8 +62,7 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void)
some other CPU frequency scaling. */
#ifndef BOOTLOADER
void flush_icache(void) ICODE_ATTR;
void flush_icache(void)
void ICODE_ATTR cpucache_flush(void)
{
intptr_t b, e;
@ -73,8 +72,7 @@ void flush_icache(void)
}
}
void invalidate_icache(void) ICODE_ATTR;
void invalidate_icache(void)
void ICODE_ATTR cpucache_invalidate(void)
{
intptr_t b, e;

6
firmware/target/arm/system-pp502x.c
View File

@ -163,8 +163,7 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void)
to extend the funtions to do alternate cache configurations. */
#ifndef BOOTLOADER
void flush_icache(void) ICODE_ATTR;
void flush_icache(void)
void ICODE_ATTR cpucache_flush(void)
{
if (CACHE_CTL & CACHE_CTL_ENABLE)
{
@ -173,8 +172,7 @@ void flush_icache(void)
}
}
void invalidate_icache(void) ICODE_ATTR;
void invalidate_icache(void)
void ICODE_ATTR cpucache_invalidate(void)
{
if (CACHE_CTL & CACHE_CTL_ENABLE)
{

9
firmware/target/arm/system-target.h
View File

@ -168,13 +168,8 @@ static inline void wake_core(int core)
/** cache functions **/
#ifndef BOOTLOADER
#define CACHE_FUNCTIONS_AS_CALL
#define HAVE_INVALIDATE_ICACHE
void invalidate_icache(void);
#define HAVE_FLUSH_ICACHE
void flush_icache(void);
#define HAVE_CPUCACHE_INVALIDATE
#define HAVE_CPUCACHE_FLUSH
#endif
#endif /* CPU_PP */

8
firmware/target/coldfire/system-coldfire.c
View File

@ -358,3 +358,11 @@ void coldfire_set_dataincontrol(unsigned long value)
DATAINCONTROL = (DATAINCONTROL & (1 << 9)) | value;
restore_irq(level);
}
void cpucache_invalidate(void)
{
asm volatile ("move.l #0x01000000,%d0\n"
"movec.l %d0,%cacr\n"
"move.l #0x80000000,%d0\n"
"movec.l %d0,%cacr");
}

9
firmware/target/coldfire/system-target.h
View File

@ -194,14 +194,7 @@ static inline uint32_t swap_odd_even32(uint32_t value)
return value;
}
#define HAVE_INVALIDATE_ICACHE
static inline void invalidate_icache(void)
{
asm volatile ("move.l #0x01000000,%d0\n"
"movec.l %d0,%cacr\n"
"move.l #0x80000000,%d0\n"
"movec.l %d0,%cacr");
}
#define HAVE_CPUCACHE_INVALIDATE
#define DEFAULT_PLLCR_AUDIO_BITS 0x10400000
void coldfire_set_pllcr_audio_bits(long bits);

2
firmware/target/sh/system-target.h
View File

@ -126,6 +126,4 @@ static inline uint32_t swap_odd_even32(uint32_t value)
return value;
}
#define invalidate_icache()
#endif /* SYSTEM_TARGET_H */

60
firmware/thread.c
View File

@ -179,17 +179,17 @@ static void __attribute__((naked,used)) start_thread(void)
{
/* r0 = context */
asm volatile (
"ldr sp, [r0, #32] \n" /* Load initial sp */
"ldr r4, [r0, #40] \n" /* start in r4 since it's non-volatile */
"mov r1, #0 \n" /* Mark thread as running */
"str r1, [r0, #40] \n"
"ldr sp, [r0, #32] \n" /* Load initial sp */
"ldr r4, [r0, #40] \n" /* start in r4 since it's non-volatile */
"mov r1, #0 \n" /* Mark thread as running */
"str r1, [r0, #40] \n"
#if NUM_CORES > 1
"ldr r0, =invalidate_icache \n" /* Invalidate this core's cache. */
"mov lr, pc \n" /* This could be the first entry into */
"bx r0 \n" /* plugin or codec code for this core. */
"ldr r0, =cpucache_invalidate \n" /* Invalidate this core's cache. */
"mov lr, pc \n" /* This could be the first entry into */
"bx r0 \n" /* plugin or codec code for this core. */
#endif
"mov lr, pc \n" /* Call thread function */
"bx r4 \n"
"mov lr, pc \n" /* Call thread function */
"bx r4 \n"
); /* No clobber list - new thread doesn't care */
thread_exit();
//asm volatile (".ltorg"); /* Dump constant pool */
@ -668,7 +668,7 @@ static inline void switch_to_idle_stack(const unsigned int core)
static void core_switch_blk_op(unsigned int core, struct thread_entry *thread)
{
/* Flush our data to ram */
flush_icache();
cpucache_flush();
/* Stash thread in r4 slot */
thread->context.r[0] = (uint32_t)thread;
/* Stash restart address in r5 slot */
@ -696,24 +696,24 @@ static void __attribute__((naked))
* Stack access also isn't permitted until restoring the original stack and
* context. */
asm volatile (
"stmfd sp!, { r4-r12, lr } \n" /* Stack all non-volatile context on current core */
"ldr r2, =idle_stacks \n" /* r2 = &idle_stacks[core][IDLE_STACK_WORDS] */
"ldr r2, [r2, r0, lsl #2] \n"
"add r2, r2, %0*4 \n"
"stmfd r2!, { sp } \n" /* save original stack pointer on idle stack */
"mov sp, r2 \n" /* switch stacks */
"adr r2, 1f \n" /* r2 = new core restart address */
"str r2, [r1, #40] \n" /* thread->context.start = r2 */
"ldr pc, =switch_thread \n" /* r0 = thread after call - see load_context */
"1: \n"
"ldr sp, [r0, #32] \n" /* Reload original sp from context structure */
"mov r1, #0 \n" /* Clear start address */
"str r1, [r0, #40] \n"
"ldr r0, =invalidate_icache \n" /* Invalidate new core's cache */
"mov lr, pc \n"
"bx r0 \n"
"ldmfd sp!, { r4-r12, pc } \n" /* Restore non-volatile context to new core and return */
".ltorg \n" /* Dump constant pool */
"stmfd sp!, { r4-r12, lr } \n" /* Stack all non-volatile context on current core */
"ldr r2, =idle_stacks \n" /* r2 = &idle_stacks[core][IDLE_STACK_WORDS] */
"ldr r2, [r2, r0, lsl #2] \n"
"add r2, r2, %0*4 \n"
"stmfd r2!, { sp } \n" /* save original stack pointer on idle stack */
"mov sp, r2 \n" /* switch stacks */
"adr r2, 1f \n" /* r2 = new core restart address */
"str r2, [r1, #40] \n" /* thread->context.start = r2 */
"ldr pc, =switch_thread \n" /* r0 = thread after call - see load_context */
"1: \n"
"ldr sp, [r0, #32] \n" /* Reload original sp from context structure */
"mov r1, #0 \n" /* Clear start address */
"str r1, [r0, #40] \n"
"ldr r0, =cpucache_invalidate \n" /* Invalidate new core's cache */
"mov lr, pc \n"
"bx r0 \n"
"ldmfd sp!, { r4-r12, pc } \n" /* Restore non-volatile context to new core and return */
".ltorg \n" /* Dump constant pool */
: : "i"(IDLE_STACK_WORDS)
);
(void)core; (void)thread;
@ -2457,7 +2457,7 @@ unsigned int create_thread(void (*function)(void),
/* Writeback stack munging or anything else before starting */
if (core != CURRENT_CORE)
{
flush_icache();
cpucache_flush();
}
#endif
@ -2597,7 +2597,7 @@ void thread_exit(void)
switch_to_idle_stack(core);
}
flush_icache();
cpucache_flush();
/* At this point, this thread isn't using resources allocated for
* execution except the slot itself. */

2
firmware/usbstack/usb_storage.c
View File

@ -415,7 +415,7 @@ void usb_storage_init_connection(void)
audio_buffer = audio_get_buffer(false,&bufsize);
tb.transfer_buffer =
(void *)UNCACHED_ADDR((unsigned int)(audio_buffer + 31) & 0xffffffe0);
invalidate_icache();
cpucache_invalidate();
#ifdef USB_USE_RAMDISK
ramdisk_buffer = tb.transfer_buffer + BUFFER_SIZE*2;
#endif