From a51879dd01f2cb4da5001084166fc1788669d936 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C3=ABl=20Carr=C3=A9?= Date: Sat, 31 Dec 2011 18:44:32 +0000 Subject: [PATCH] creative zvm isp1583 defines: move to isp1583.h zvm is the only user of this file git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31495 a1c6a512-1295-4272-9138-f99709370657 --- firmware/drivers/isp1583.c | 9 +++ firmware/export/isp1583.h | 72 +++++++++--------- .../arm/tms320dm320/creative-zvm/usb-target.h | 76 ------------------- 3 files changed, 46 insertions(+), 111 deletions(-) diff --git a/firmware/drivers/isp1583.c b/firmware/drivers/isp1583.c index f45ff6eb5e..80dce59731 100644 --- a/firmware/drivers/isp1583.c +++ b/firmware/drivers/isp1583.c @@ -54,6 +54,15 @@ struct usb_endpoint static unsigned char setup_pkt_buf[8]; static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS]; +#if 0 +#define ZVM_SPECIFIC asm volatile( \ + "LDR R12, =0x50FFC000\n" \ + "LDRH R12, [R12]\n" \ + : : : "r12"); +#else +#define ZVM_SPECIFIC +#endif + static bool high_speed_mode = false; static inline void or_int_value(volatile unsigned short *a, volatile unsigned short *b, unsigned long r, unsigned long value) diff --git a/firmware/export/isp1583.h b/firmware/export/isp1583.h index 61ea4b83cc..fb150fb704 100644 --- a/firmware/export/isp1583.h +++ b/firmware/export/isp1583.h @@ -21,40 +21,46 @@ #ifndef ISP1583_H #define ISP1583_H -#include "usb-target.h" +#include "dm320.h" -#ifndef ISP1583_H_OVERRIDE -/* Initialization registers */ -#define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0))) -#define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC))) -#define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10))) -#define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12))) -#define ISP1583_INIT_INTEN_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x14))) -#define ISP1583_INIT_INTEN_B -#define ISP1583_INIT_INTEN_READ ISP1583_INIT_INTEN_A -/* Data Flow registers */ -#define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2))) -#define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28))) -#define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20))) -#define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C))) -#define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E))) -#define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04))) -#define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08))) +/* General purpose memory region #2 */ +#define ISP1583_IOBASE 0x60FFC000 + +#define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0))) //char +#define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC*2))) +#define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10*2))) //char +#define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12*2))) //char +#define ISP1583_INIT_INTEN_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2))) +#define ISP1583_INIT_INTEN_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2+4))) +#define ISP1583_INIT_INTEN_READ (unsigned long)( (ISP1583_INIT_INTEN_A & 0xFFFF) | ((ISP1583_INIT_INTEN_B & 0xFFFF) << 16) ) +/* Data flow registers */ +#define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2*2))) //char +#define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28*2))) //char +#define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20*2))) +#define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C*2))) +#define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E*2))) //char +#define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04*2))) +#define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08*2))) /* DMA registers */ -#define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58))) +#define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58*2))) /* General registers */ -#define ISP1583_GEN_INT_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x18))) -#define ISP1583_GEN_INT_B -#define ISP1583_GEN_INT_READ ISP1583_GEN_INT_A -#define ISP1583_GEN_CHIPID (*((volatile unsigned long*)(ISP1583_IOBASE+0x70))) /* Size=3 bytes */ -#define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74))) -#define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78))) -#define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C))) -#define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84))) - -#define set_int_value(a,b,value) (a) = (value); -#endif +#define ISP1583_GEN_INT_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2))) +#define ISP1583_GEN_INT_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2+4))) +#define ISP1583_GEN_INT_READ (unsigned long)( (ISP1583_GEN_INT_A & 0xFFFF) | ((ISP1583_GEN_INT_B & 0xFFFF) << 16)) +#define ISP1583_GEN_CHIPID_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x70*2))) +#define ISP1583_GEN_CHIPID_B (*((volatile unsigned char*)(ISP1583_IOBASE+0x70*2+4))) //char +#define ISP1583_GEN_CHIPID (unsigned long)( (ISP1583_GEN_CHIPID_A & 0xFFFF) | ((ISP1583_GEN_CHIPID_B & 0xFFFF) << 16) ) +#define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74*2))) +#define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78*2))) +#define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C*2))) +#define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84*2))) //char +#define EN_INT_CPU_TARGET IO_INTC_EINT1 |= INTR_EINT1_EXT7 +#define DIS_INT_CPU_TARGET IO_INTC_EINT1 &= ~INTR_EINT1_EXT7 +#define INT_CONF_TARGET 0 +//#define INT_CONF_TARGET 2 +#define set_int_value(a,b,value) a = value & 0xFFFF; \ + b = value >> 16; #define ISP1583_UNLOCK_CODE ((unsigned short)0xAA37) /* Initialization registers' bits */ @@ -170,11 +176,7 @@ #define STANDARD_INTEN ( INIT_INTEN_IEBRST | INIT_INTEN_IEHS_STA | INT_IESUSP | INT_IERESM | INIT_INTEN_IEVBUS | INIT_INTEN_IEP0SETUP | INIT_INTEN_IEP0RX | INIT_INTEN_IEP0TX ) #define STANDARD_INIT_MODE ( INIT_MODE_CLKAON | INIT_MODE_GLINTENA ) -#ifdef USE_IRAM - #define IRAM_ATTR __attribute__ ((section(".icode"))) -#else - #define IRAM_ATTR -#endif +#define IRAM_ATTR __attribute__ ((section(".icode"))) #include "usb_drv.h" diff --git a/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h b/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h index 58c5e5e6da..e69de29bb2 100644 --- a/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h +++ b/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h @@ -1,76 +0,0 @@ -/*************************************************************************** - * __________ __ ___. - * Open \______ \ ____ ____ | | _\_ |__ _______ ___ - * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / - * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < - * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ - * \/ \/ \/ \/ \/ - * $Id$ - * - * Copyright (C) 2008 by Maurus Cuelenaere - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY - * KIND, either express or implied. - * - ****************************************************************************/ - -#ifndef USB_TARGET_H -#define USB_TARGET_H - -#include "dm320.h" - -/* General purpose memory region #2 */ -#define ISP1583_IOBASE 0x60FFC000 -#define ISP1583_H_OVERRIDE - -#define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0))) //char -#define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC*2))) -#define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10*2))) //char -#define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12*2))) //char -#define ISP1583_INIT_INTEN_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2))) -#define ISP1583_INIT_INTEN_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2+4))) -#define ISP1583_INIT_INTEN_READ (unsigned long)( (ISP1583_INIT_INTEN_A & 0xFFFF) | ((ISP1583_INIT_INTEN_B & 0xFFFF) << 16) ) -/* Data flow registers */ -#define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2*2))) //char -#define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28*2))) //char -#define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20*2))) -#define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C*2))) -#define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E*2))) //char -#define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04*2))) -#define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08*2))) -/* DMA registers */ -#define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58*2))) -/* General registers */ -#define ISP1583_GEN_INT_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2))) -#define ISP1583_GEN_INT_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2+4))) -#define ISP1583_GEN_INT_READ (unsigned long)( (ISP1583_GEN_INT_A & 0xFFFF) | ((ISP1583_GEN_INT_B & 0xFFFF) << 16)) -#define ISP1583_GEN_CHIPID_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x70*2))) -#define ISP1583_GEN_CHIPID_B (*((volatile unsigned char*)(ISP1583_IOBASE+0x70*2+4))) //char -#define ISP1583_GEN_CHIPID (unsigned long)( (ISP1583_GEN_CHIPID_A & 0xFFFF) | ((ISP1583_GEN_CHIPID_B & 0xFFFF) << 16) ) -#define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74*2))) -#define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78*2))) -#define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C*2))) -#define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84*2))) //char - -#define EN_INT_CPU_TARGET IO_INTC_EINT1 |= INTR_EINT1_EXT7 -#define DIS_INT_CPU_TARGET IO_INTC_EINT1 &= ~INTR_EINT1_EXT7 -#define INT_CONF_TARGET 0 -//#define INT_CONF_TARGET 2 -#define set_int_value(a,b,value) a = value & 0xFFFF; \ - b = value >> 16; - - -/*#define ZVM_SPECIFIC asm volatile( \ - "LDR R12, =0x50FFC000\n" \ - "LDRH R12, [R12]\n" \ - : : : "r12");*/ -#define ZVM_SPECIFIC - -#define USE_IRAM - -#endif