Build: Bump all toolchains to GCC 4.9.4 + Binutils 2.26.1

GCC 4.9.4 was already used for MIPS and all hosted targets; this enables
it across the board for everything (ie m68k and arm native)

Other changes:

 * Use '-Os' as the default optiomization for all targets
   (was only disabled for arm native)
 * Enable -funit-at-a-time and -Wextra
 * Drop all obsolete toolchain patches
 * Update ARM multilib/exception patch
 * Bump toolchain libs (gmp, mpfr, mpc) to recommended versions, and
   add 'isl' to enable better optimization & vectorization opportunities.

   (Will revisit optimization for the codecs and plugins at a later date)

Confirmed working:

 * armv4t     (ipodmini2g and many other PP502x targets)
 * arm >= v5  (sansaclipplus, ipod6g, ipodnano2g, sansafuzeplus)
 * m68k (ihp100)

Change-Id: If9ed405ae0f289d9adea46d4cf46bfefc2f4250d
This commit is contained in:
Solomon Peachy 2020-03-27 15:31:30 -04:00
parent e91f89a410
commit b4865b05b0
8 changed files with 92 additions and 722 deletions

View File

@ -124,6 +124,7 @@ else ifeq ($(ARCH),arch_m68k)
$(ATRACLIB) : CODECFLAGS += -O2
$(COOKLIB): CODECFLAGS += -O2
$(DEMACLIB) : CODECFLAGS += -O2
$(FFMPEGFLACLIB) : CODECFLAGS += -Os
$(SPCLIB) : CODECFLAGS += -O3
$(WMAPROLIB) : CODECFLAGS += -O3
$(WMAVOICELIB) : CODECFLAGS += -O2

20
tools/configure vendored
View File

@ -8,7 +8,7 @@
#
# global CC options for all platforms
CCOPTS="-W -Wall -Wundef -O -nostdlib -ffreestanding -Wstrict-prototypes -pipe -std=gnu99"
CCOPTS="-W -Wall -Wextra -Wundef -Os -nostdlib -ffreestanding -Wstrict-prototypes -pipe -std=gnu99 -funit-at-a-time"
# LD options for the core
LDOPTS=""
@ -136,7 +136,7 @@ app_set_lcd_size () {
findarmgcc() {
prefixtools arm-elf-eabi-
gccchoice="4.4.4"
gccchoice="4.9.4"
}
# scan the $PATH for the given command
@ -502,6 +502,7 @@ calmrisccc () {
GCCOPTS="-Wl\,--no-check-sections $CCOPTS"
GCCOPTIMIZE="-fomit-frame-pointer"
endian="big"
gccchoice="4.9.4"
}
coldfirecc () {
@ -509,7 +510,7 @@ coldfirecc () {
GCCOPTS="$CCOPTS -mcpu=5249 -malign-int -mstrict-align"
GCCOPTIMIZE="-fomit-frame-pointer"
endian="big"
gccchoice="4.5.2"
gccchoice="4.9.4"
}
arm7tdmicc () {
@ -2588,7 +2589,6 @@ fi
sysfont="08-Rockfont"
if [ "$ARG_ARM_THUMB" != 0 ]; then ARG_ARM_THUMB=1; fi
arm9tdmicc
GCCOPTS=`echo $GCCOPTS | sed 's/ -O / -Os /'`
;;
@ -2631,7 +2631,6 @@ fi
sysfont="08-Rockfont"
if [ "$ARG_ARM_THUMB" != 0 ]; then ARG_ARM_THUMB=1; fi
arm9tdmicc
GCCOPTS=`echo $GCCOPTS | sed 's/ -O / -Os /'`
;;
@ -2676,7 +2675,6 @@ fi
t_model="sansa-c200v2"
if [ "$ARG_ARM_THUMB" != 0 ]; then ARG_ARM_THUMB=1; fi
arm9tdmicc
GCCOPTS=`echo $GCCOPTS | sed 's/ -O / -Os /'`
;;
60|sansaclipv2)
@ -4519,16 +4517,6 @@ echo "Using $LD $ldver"
makever=`make --version | head -1`
echo "Detected make $makever"
if test "$CC" = "m68k-elf-gcc"; then
# convert -O to -Os to get smaller binaries!
GCCOPTS=`echo $GCCOPTS | sed 's/ -O / -Os /'`
fi
if test "$CC" = "mipsel-elf-gcc"; then
# convert -O to -Os to get smaller binaries!
GCCOPTS=`echo $GCCOPTS | sed 's/ -O / -Os /'`
fi
if [ "$ARG_CCACHE" = "1" ]; then
echo "Enable ccache for building"
ccache="ccache"

View File

@ -391,9 +391,9 @@ build() {
fi
done
# kludge to avoid having to install GMP, MPFR and MPC, for new gcc
# kludge to avoid having to install GMP, MPFR, MPC and ISL
if test -n "$needs_libs"; then
cd "gcc-$version"
cd "$toolname-$version"
if (echo $needs_libs | grep -q gmp && test ! -d gmp); then
echo "ROCKBOXDEV: Getting GMP"
getfile "gmp-4.3.2.tar.bz2" "$GNU_MIRROR/gmp"
@ -403,16 +403,23 @@ build() {
if (echo $needs_libs | grep -q mpfr && test ! -d mpfr); then
echo "ROCKBOXDEV: Getting MPFR"
getfile "mpfr-2.4.2.tar.bz2" "$GNU_MIRROR/mpfr"
tar xjf $dlwhere/mpfr-2.4.2.tar.bz2
ln -s mpfr-2.4.2 mpfr
getfile "mpfr-3.1.0.tar.bz2" "$GNU_MIRROR/mpfr"
tar xjf $dlwhere/mpfr-3.1.0.tar.bz2
ln -s mpfr-3.1.0 mpfr
fi
if (echo $needs_libs | grep -q mpc && test ! -d mpc); then
echo "ROCKBOXDEV: Getting MPC"
getfile "mpc-0.8.1.tar.gz" "http://www.multiprecision.org/downloads"
tar xzf $dlwhere/mpc-0.8.1.tar.gz
ln -s mpc-0.8.1 mpc
getfile "mpc-1.0.1.tar.gz" "http://www.multiprecision.org/downloads"
tar xzf $dlwhere/mpc-1.0.1.tar.gz
ln -s mpc-1.0.1 mpc
fi
if (echo $needs_libs | grep -q isl && test ! -d isl); then
echo "ROCKBOXDEV: Getting ISL"
getfile "isl-0.15.tar.bz2" "https://gcc.gnu.org/pub/gcc/infrastructure"
tar xjf $dlwhere/isl-0.15.tar.bz2
ln -s isl-0.15 isl
fi
cd $builddir
fi
@ -708,11 +715,10 @@ if [ -z "$RBDEV_TARGET" ]; then
echo "m - m68k (iriver h1x0/h3x0, iaudio m3/m5/x5 and mpio hd200)"
echo "a - arm (ipods, iriver H10, Sansa, D2, Gigabeat, etc)"
echo "i - mips (Jz47xx and ATJ-based players)"
# echo "r - arm-app (Samsung ypr0)"
echo "x - arm-linux (Generic Linux ARM: Samsung ypr0, Linux-based Sony NWZ)"
echo "y - mips-linux (Generic Linux MIPS: AGPTek Rocker)"
echo "separate multiple targets with spaces"
echo "(Example: \"s m a\" will build sh, m68k and arm)"
echo "(Example: \"m a i\" will build m68k, arm, and mips)"
echo ""
selarch=`input`
else
@ -729,13 +735,13 @@ do
echo ""
case $arch in
[Ii])
build "binutils" "mipsel-elf" "2.26.1" "" "--disable-werror"
build "gcc" "mipsel-elf" "4.9.4" "" "" "gmp mpfr mpc"
build "binutils" "mipsel-elf" "2.26.1" "" "--disable-werror" "isl"
build "gcc" "mipsel-elf" "4.9.4" "" "" "gmp mpfr mpc isl"
;;
[Mm])
build "binutils" "m68k-elf" "2.20.1" "binutils-2.20.1-texinfo-fix.diff" "--disable-werror"
build "gcc" "m68k-elf" "4.5.2" "" "--with-arch=cf MAKEINFO=missing" "gmp mpfr mpc"
build "binutils" "m68k-elf" "2.26.1" "" "--disable-werror" "isl"
build "gcc" "m68k-elf" "4.9.4" "" "--with-arch=cf MAKEINFO=missing" "gmp mpfr mpc isl"
;;
[Aa])
@ -747,12 +753,9 @@ do
gccopts="--disable-nls"
;;
esac
build "binutils" "arm-elf-eabi" "2.20.1" "binutils-2.20.1-ld-thumb-interwork-long-call.diff binutils-2.20.1-texinfo-fix.diff" "$binopts --disable-werror"
build "gcc" "arm-elf-eabi" "4.4.4" "rockbox-multilibs-noexceptions-arm-elf-eabi-gcc-4.4.2_1.diff" "$gccopts MAKEINFO=missing" "gmp mpfr"
build "binutils" "arm-elf-eabi" "2.26.1" "" "$binopts --disable-werror" "isl"
build "gcc" "arm-elf-eabi" "4.9.4" "rockbox-multilibs-noexceptions-arm-elf-eabi-gcc-4.9.4.diff" "$gccopts MAKEINFO=missing" "gmp mpfr mpc isl"
;;
# [Rr])
# build_ctng "ypr0" "alsalib.tar.gz" "arm" "linux-gnueabi"
# ;;
[Xx])
# IMPORTANT NOTE
# This toolchain must support several targets and thus must support
@ -804,20 +807,26 @@ do
# compiles with GCC >6
# kernel: 3.10.14
# glibc: 2.16
# alsa: 1.0.29
#
# FiiO M3K:
# kernel: 3.10.14
# glibc: 2.16
# alsa: 1.0.26
#
# To maximize compatibility, we use kernel 3.2.85 which is the lastest
# longterm 3.2 kernel and is supported by the latest glibc, and we
# require support for up to glibc 2.4
# require support for up to glibc 2.16
# We use a recent 2.26.1 binutils to avoid any build problems and
# avoid patches/bugs.
glibcopts="--enable-kernel=3.2 --enable-oldest-abi=2.4"
glibcopts="--enable-kernel=3.2 --enable-oldest-abi=2.16"
# FIXME: maybe add -mhard-float
build_linux_toolchain "mipsel-rockbox-linux-gnu" "2.26.1" "" "4.9.4" \
"$gccopts" "3.2.85" "2.25" "$glibcopts"
# build alsa-lib
# we need to set the prefix to how it is on device (/usr) and then
# tweak install dir at make install step
alsalib_ver="1.0.19"
alsalib_ver="1.0.26"
gettool "alsa-lib" "$alsalib_ver"
extract "alsa-lib-$alsalib_ver"
prefix="/usr" buildtool "alsa-lib" "$alsalib_ver" \

View File

@ -1,30 +0,0 @@
diff -ru binutils-2.16.1-orig/ld/ld.texinfo binutils-2.16.1/ld/ld.texinfo
--- binutils-2.16.1-orig/ld/ld.texinfo 2005-06-12 20:35:45.000000000 +0200
+++ binutils-2.16.1/ld/ld.texinfo 2013-06-04 22:31:37.833372351 +0200
@@ -1589,7 +1589,7 @@
@kindex --version-script=@var{version-scriptfile}
@cindex version script, symbol versions
-@itemx --version-script=@var{version-scriptfile}
+@item --version-script=@var{version-scriptfile}
Specify the name of a version script to the linker. This is typically
used when creating shared libraries to specify additional information
about the version hierarchy for the library being created. This option
@@ -6256,7 +6256,7 @@
@printindex cp
@tex
-% I think something like @colophon should be in texinfo. In the
+% I think something like @@colophon should be in texinfo. In the
% meantime:
\long\def\colophon{\hbox to0pt{}\vfill
\centerline{The body of this manual is set in}
@@ -6267,7 +6267,7 @@
\centerline{{\sl\fontname\tensl\/}}
\centerline{are used for emphasis.}\vfill}
\page\colophon
-% Blame: doc@cygnus.com, 28mar91.
+% Blame: doc@@cygnus.com, 28mar91.
@end tex

View File

@ -1,569 +0,0 @@
http://sourceware.org/ml/binutils/2010-02/msg00460.html
Drop this patch when binutils 2.21 is out
diff -ur binutils-2.20.1.orig/bfd/elf32-arm.c binutils-2.20.1/bfd/elf32-arm.c
--- binutils-2.20.1.orig/bfd/elf32-arm.c 2010-06-11 18:48:06.000000000 +0200
+++ binutils-2.20.1/bfd/elf32-arm.c 2010-06-11 18:51:00.000000000 +0200
@@ -2401,6 +2401,7 @@
unsigned long orig_insn;
char *stub_name;
enum elf32_arm_stub_type stub_type;
+ int st_type;
};
/* A table of relocs applied to branches which might trigger Cortex-A8
@@ -2647,6 +2648,9 @@
asection *stub_sec;
} *stub_group;
+ /* Number of elements in stub_group. */
+ int top_id;
+
/* Assorted information used by elf32_arm_size_stubs. */
unsigned int bfd_count;
int top_index;
@@ -2933,6 +2937,7 @@
ret->add_stub_section = NULL;
ret->layout_sections_again = NULL;
ret->stub_group = NULL;
+ ret->top_id = 0;
ret->bfd_count = 0;
ret->top_index = 0;
ret->input_list = NULL;
@@ -3033,7 +3038,7 @@
arm_type_of_stub (struct bfd_link_info *info,
asection *input_sec,
const Elf_Internal_Rela *rel,
- unsigned char st_type,
+ int *actual_st_type,
struct elf32_arm_link_hash_entry *hash,
bfd_vma destination,
asection *sym_sec,
@@ -3048,6 +3053,7 @@
int thumb_only;
enum elf32_arm_stub_type stub_type = arm_stub_none;
int use_plt = 0;
+ int st_type = *actual_st_type;
/* We don't know the actual type of destination in case it is of
type STT_SECTION: give up. */
@@ -3065,14 +3071,15 @@
+ input_sec->output_section->vma
+ rel->r_offset);
- branch_offset = (bfd_signed_vma)(destination - location);
-
r_type = ELF32_R_TYPE (rel->r_info);
/* Keep a simpler condition, for the sake of clarity. */
- if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
+ if (globals->splt != NULL
+ && hash != NULL
+ && hash->root.plt.offset != (bfd_vma) -1)
{
use_plt = 1;
+
/* Note when dealing with PLT entries: the main PLT stub is in
ARM mode, so if the branch is in Thumb mode, another
Thumb->ARM stub will be inserted later just before the ARM
@@ -3081,8 +3088,15 @@
Thumb->Arm one and branch directly to the ARM PLT entry
because it avoids spreading offset corrections in several
places. */
+
+ destination = (globals->splt->output_section->vma
+ + globals->splt->output_offset
+ + hash->root.plt.offset);
+ st_type = STT_FUNC;
}
+ branch_offset = (bfd_signed_vma)(destination - location);
+
if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
{
/* Handle cases where:
@@ -3176,7 +3190,9 @@
}
}
}
- else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
+ else if (r_type == R_ARM_CALL
+ || r_type == R_ARM_JUMP24
+ || r_type == R_ARM_PLT32)
{
if (st_type == STT_ARM_TFUNC)
{
@@ -3231,6 +3247,12 @@
}
}
+ /* If a stub is needed, record the actual destination type. */
+ if (stub_type != arm_stub_none)
+ {
+ *actual_st_type = st_type;
+ }
+
return stub_type;
}
@@ -3240,31 +3262,35 @@
elf32_arm_stub_name (const asection *input_section,
const asection *sym_sec,
const struct elf32_arm_link_hash_entry *hash,
- const Elf_Internal_Rela *rel)
+ const Elf_Internal_Rela *rel,
+ enum elf32_arm_stub_type stub_type)
+
{
char *stub_name;
bfd_size_type len;
if (hash)
{
- len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
+ len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
stub_name = bfd_malloc (len);
if (stub_name != NULL)
- sprintf (stub_name, "%08x_%s+%x",
+ sprintf (stub_name, "%08x_%s+%x_%d",
input_section->id & 0xffffffff,
hash->root.root.root.string,
- (int) rel->r_addend & 0xffffffff);
+ (int) rel->r_addend & 0xffffffff,
+ (int) stub_type);
}
else
{
- len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
+ len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
stub_name = bfd_malloc (len);
if (stub_name != NULL)
- sprintf (stub_name, "%08x_%x:%x+%x",
+ sprintf (stub_name, "%08x_%x:%x+%x_%d",
input_section->id & 0xffffffff,
sym_sec->id & 0xffffffff,
(int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
- (int) rel->r_addend & 0xffffffff);
+ (int) rel->r_addend & 0xffffffff,
+ (int) stub_type);
}
return stub_name;
@@ -3278,7 +3304,8 @@
const asection *sym_sec,
struct elf_link_hash_entry *hash,
const Elf_Internal_Rela *rel,
- struct elf32_arm_link_hash_table *htab)
+ struct elf32_arm_link_hash_table *htab,
+ enum elf32_arm_stub_type stub_type)
{
struct elf32_arm_stub_hash_entry *stub_entry;
struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
@@ -3296,7 +3323,8 @@
if (h != NULL && h->stub_cache != NULL
&& h->stub_cache->h == h
- && h->stub_cache->id_sec == id_sec)
+ && h->stub_cache->id_sec == id_sec
+ && h->stub_cache->stub_type == stub_type)
{
stub_entry = h->stub_cache;
}
@@ -3304,7 +3332,7 @@
{
char *stub_name;
- stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
+ stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
if (stub_name == NULL)
return NULL;
@@ -3464,7 +3492,7 @@
/* We have to do the a8 fixes last, as they are less aligned than
the other veneers. */
return TRUE;
-
+
/* Make a note of the offset within the stubs for this entry. */
stub_entry->stub_offset = stub_sec->size;
loc = stub_sec->contents + stub_entry->stub_offset;
@@ -3499,17 +3527,17 @@
BFD_ASSERT ((data & 0xff00) == 0xd000);
data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
}
- put_thumb_insn (globals, stub_bfd, data, loc + size);
+ bfd_put_16 (stub_bfd, data, loc + size);
size += 2;
}
break;
case THUMB32_TYPE:
- put_thumb_insn (globals, stub_bfd,
- (template_sequence[i].data >> 16) & 0xffff,
- loc + size);
- put_thumb_insn (globals, stub_bfd, template_sequence[i].data & 0xffff,
- loc + size + 2);
+ bfd_put_16 (stub_bfd,
+ (template_sequence[i].data >> 16) & 0xffff,
+ loc + size);
+ bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
+ loc + size + 2);
if (template_sequence[i].r_type != R_ARM_NONE)
{
stub_reloc_idx[nrelocs] = i;
@@ -3519,8 +3547,8 @@
break;
case ARM_TYPE:
- put_arm_insn (globals, stub_bfd, template_sequence[i].data,
- loc + size);
+ bfd_put_32 (stub_bfd, template_sequence[i].data,
+ loc + size);
/* Handle cases where the target is encoded within the
instruction. */
if (template_sequence[i].r_type == R_ARM_JUMP24)
@@ -3599,11 +3627,23 @@
}
else
{
- _bfd_final_link_relocate (elf32_arm_howto_from_type
- (template_sequence[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
- stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
- sym_value + stub_entry->target_addend,
- template_sequence[stub_reloc_idx[i]].reloc_addend);
+ Elf_Internal_Rela rel;
+ bfd_boolean unresolved_reloc;
+ char *error_message;
+ bfd_vma points_to = sym_value + stub_entry->target_addend
+ + template_sequence[stub_reloc_idx[i]].reloc_addend;
+
+ rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
+ rel.r_info = ELF32_R_INFO (0,
+ template_sequence[stub_reloc_idx[i]].r_type);
+ rel.r_addend = 0;
+
+ elf32_arm_final_link_relocate (elf32_arm_howto_from_type
+ (template_sequence[stub_reloc_idx[i]].r_type),
+ stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
+ points_to, info, stub_entry->target_section, "", stub_entry->st_type,
+ (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
+ &error_message);
}
return TRUE;
@@ -3728,6 +3768,7 @@
htab->stub_group = bfd_zmalloc (amt);
if (htab->stub_group == NULL)
return -1;
+ htab->top_id = top_id;
/* We can't use output_bfd->section_count here to find the top output
section index as some sections may have been removed, and
@@ -4009,7 +4050,7 @@
}
is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
-
+
if (((base_vma + i) & 0xfff) == 0xffe
&& insn_32bit
&& is_32bit_branch
@@ -4178,6 +4219,8 @@
a8_fixes[num_a8_fixes].orig_insn = insn;
a8_fixes[num_a8_fixes].stub_name = stub_name;
a8_fixes[num_a8_fixes].stub_type = stub_type;
+ a8_fixes[num_a8_fixes].st_type =
+ is_blx ? STT_FUNC : STT_ARM_TFUNC;
num_a8_fixes++;
}
@@ -4193,11 +4236,11 @@
if (elf_section_data (section)->this_hdr.contents == NULL)
free (contents);
}
-
+
*a8_fixes_p = a8_fixes;
*num_a8_fixes_p = num_a8_fixes;
*a8_fix_table_size_p = a8_fix_table_size;
-
+
return FALSE;
}
@@ -4345,7 +4388,7 @@
const char *sym_name;
char *stub_name;
const asection *id_sec;
- unsigned char st_type;
+ int st_type;
bfd_boolean created_stub = FALSE;
r_type = ELF32_R_TYPE (irela->r_info);
@@ -4403,7 +4446,7 @@
/* This is an undefined symbol. It can never
be resolved. */
continue;
-
+
if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
sym_value = sym->st_value;
destination = (sym_value + irela->r_addend
@@ -4493,7 +4536,7 @@
{
/* Determine what (if any) linker stub is needed. */
stub_type = arm_type_of_stub (info, section, irela,
- st_type, hash,
+ &st_type, hash,
destination, sym_sec,
input_bfd, sym_name);
if (stub_type == arm_stub_none)
@@ -4504,7 +4547,7 @@
/* Get the name of this stub. */
stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
- irela);
+ irela, stub_type);
if (!stub_name)
goto error_ret_free_internal;
@@ -4703,7 +4746,7 @@
stub_entry->target_value = a8_fixes[i].offset;
stub_entry->target_addend = a8_fixes[i].addend;
stub_entry->orig_insn = a8_fixes[i].orig_insn;
- stub_entry->st_type = STT_ARM_TFUNC;
+ stub_entry->st_type = a8_fixes[i].st_type;
size = find_stub_size_and_template (a8_fixes[i].stub_type,
&template_sequence,
@@ -6866,6 +6909,7 @@
".tls_vars") == 0)
&& ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
|| !SYMBOL_CALLS_LOCAL (info, h))
+ && (!strstr (input_section->name, STUB_SUFFIX))
&& (h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak)
@@ -6990,7 +7034,6 @@
case R_ARM_PC24: /* Arm B/BL instruction. */
case R_ARM_PLT32:
{
- bfd_signed_vma branch_offset;
struct elf32_arm_stub_hash_entry *stub_entry = NULL;
if (r_type == R_ARM_XPC25)
@@ -7026,45 +7069,46 @@
|| r_type == R_ARM_JUMP24
|| r_type == R_ARM_PLT32)
{
- bfd_vma from;
-
- /* If the call goes through a PLT entry, make sure to
- check distance to the right destination address. */
- if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
- {
- value = (splt->output_section->vma
- + splt->output_offset
- + h->plt.offset);
- *unresolved_reloc_p = FALSE;
- /* The PLT entry is in ARM mode, regardless of the
- target function. */
- sym_flags = STT_FUNC;
- }
+ enum elf32_arm_stub_type stub_type = arm_stub_none;
+ struct elf32_arm_link_hash_entry *hash;
- from = (input_section->output_section->vma
- + input_section->output_offset
- + rel->r_offset);
- branch_offset = (bfd_signed_vma)(value - from);
-
- if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
- || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
- || ((sym_flags == STT_ARM_TFUNC)
- && (((r_type == R_ARM_CALL) && !globals->use_blx)
- || (r_type == R_ARM_JUMP24)
- || (r_type == R_ARM_PLT32) ))
- )
+ hash = (struct elf32_arm_link_hash_entry *) h;
+ stub_type = arm_type_of_stub (info, input_section, rel,
+ &sym_flags, hash,
+ value, sym_sec,
+ input_bfd, sym_name);
+
+ if (stub_type != arm_stub_none)
{
/* The target is out of reach, so redirect the
branch to the local stub for this function. */
stub_entry = elf32_arm_get_stub_entry (input_section,
sym_sec, h,
- rel, globals);
+ rel, globals,
+ stub_type);
if (stub_entry != NULL)
value = (stub_entry->stub_offset
+ stub_entry->stub_sec->output_offset
+ stub_entry->stub_sec->output_section->vma);
}
+ else
+ {
+ /* If the call goes through a PLT entry, make sure to
+ check distance to the right destination address. */
+ if (h != NULL
+ && splt != NULL
+ && h->plt.offset != (bfd_vma) -1)
+ {
+ value = (splt->output_section->vma
+ + splt->output_offset
+ + h->plt.offset);
+ *unresolved_reloc_p = FALSE;
+ /* The PLT entry is in ARM mode, regardless of the
+ target function. */
+ sym_flags = STT_FUNC;
+ }
+ }
}
/* The ARM ELF ABI says that this reloc is computed as: S - P + A
@@ -7444,58 +7488,29 @@
}
}
- /* Handle calls via the PLT. */
- if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
- {
- value = (splt->output_section->vma
- + splt->output_offset
- + h->plt.offset);
- if (globals->use_blx && r_type == R_ARM_THM_CALL)
- {
- /* If the Thumb BLX instruction is available, convert the
- BL to a BLX instruction to call the ARM-mode PLT entry. */
- lower_insn = (lower_insn & ~0x1000) | 0x0800;
- sym_flags = STT_FUNC;
- }
- else
- {
- /* Target the Thumb stub before the ARM PLT entry. */
- value -= PLT_THUMB_STUB_SIZE;
- sym_flags = STT_ARM_TFUNC;
- }
- *unresolved_reloc_p = FALSE;
- }
-
+ enum elf32_arm_stub_type stub_type = arm_stub_none;
if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
{
/* Check if a stub has to be inserted because the destination
is too far. */
- bfd_vma from;
- bfd_signed_vma branch_offset;
- struct elf32_arm_stub_hash_entry *stub_entry = NULL;
-
- from = (input_section->output_section->vma
- + input_section->output_offset
- + rel->r_offset);
- branch_offset = (bfd_signed_vma)(value - from);
-
- if ((!thumb2
- && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
- || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
- ||
- (thumb2
- && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
- || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
- || ((sym_flags != STT_ARM_TFUNC)
- && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
- || r_type == R_ARM_THM_JUMP24)))
+ struct elf32_arm_stub_hash_entry *stub_entry;
+ struct elf32_arm_link_hash_entry *hash;
+
+ hash = (struct elf32_arm_link_hash_entry *) h;
+
+ stub_type = arm_type_of_stub (info, input_section, rel,
+ &sym_flags, hash, value, sym_sec,
+ input_bfd, sym_name);
+
+ if (stub_type != arm_stub_none)
{
/* The target is out of reach or we are changing modes, so
redirect the branch to the local stub for this
function. */
stub_entry = elf32_arm_get_stub_entry (input_section,
sym_sec, h,
- rel, globals);
+ rel, globals,
+ stub_type);
if (stub_entry != NULL)
value = (stub_entry->stub_offset
+ stub_entry->stub_sec->output_offset
@@ -7512,6 +7527,33 @@
}
}
+ /* Handle calls via the PLT. */
+ if (stub_type == arm_stub_none
+ && h != NULL
+ && splt != NULL
+ && h->plt.offset != (bfd_vma) -1)
+ {
+ value = (splt->output_section->vma
+ + splt->output_offset
+ + h->plt.offset);
+
+ if (globals->use_blx && r_type == R_ARM_THM_CALL)
+ {
+ /* If the Thumb BLX instruction is available, convert
+ the BL to a BLX instruction to call the ARM-mode
+ PLT entry. */
+ lower_insn = (lower_insn & ~0x1000) | 0x0800;
+ sym_flags = STT_FUNC;
+ }
+ else
+ {
+ /* Target the Thumb stub before the ARM PLT entry. */
+ value -= PLT_THUMB_STUB_SIZE;
+ sym_flags = STT_ARM_TFUNC;
+ }
+ *unresolved_reloc_p = FALSE;
+ }
+
relocation = value + signed_addend;
relocation -= (input_section->output_section->vma
@@ -9298,11 +9340,26 @@
elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
{
struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
+ asection *sec, *osec;
/* Invoke the regular ELF backend linker to do all the work. */
if (!bfd_elf_final_link (abfd, info))
return FALSE;
+ /* Process stub sections (eg BE8 encoding, ...). */
+ struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
+ int i;
+ for(i=0; i<htab->top_id; i++) {
+ sec = htab->stub_group[i].stub_sec;
+ if (sec) {
+ osec = sec->output_section;
+ elf32_arm_write_section (abfd, info, sec, sec->contents);
+ if (! bfd_set_section_contents (abfd, osec, sec->contents,
+ sec->output_offset, sec->size))
+ return FALSE;
+ }
+ }
+
/* Write out any glue sections now that we have created all the
stubs. */
if (globals->bfd_of_glue_owner != NULL)
@@ -12875,6 +12932,7 @@
sym.st_other = 0;
sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
sym.st_shndx = osi->sec_shndx;
+ elf32_arm_section_map_add (osi->sec, names[type][1], offset);
return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
}

View File

@ -1,21 +0,0 @@
diff -ru binutils-2.20.1-orig/bfd/doc/bfd.texinfo binutils-2.20.1/bfd/doc/bfd.texinfo
--- binutils-2.20.1-orig/bfd/doc/bfd.texinfo 2013-05-12 17:28:30.461074959 +0200
+++ binutils-2.20.1/bfd/doc/bfd.texinfo 2013-05-12 17:26:54.175902524 +0200
@@ -323,7 +323,7 @@
@printindex cp
@tex
-% I think something like @colophon should be in texinfo. In the
+% I think something like @@colophon should be in texinfo. In the
% meantime:
\long\def\colophon{\hbox to0pt{}\vfill
\centerline{The body of this manual is set in}
@@ -334,7 +334,7 @@
\centerline{{\sl\fontname\tensl\/}}
\centerline{are used for emphasis.}\vfill}
\page\colophon
-% Blame: doc@cygnus.com, 28mar91.
+% Blame: doc@@cygnus.com, 28mar91.
@end tex
@bye

View File

@ -1,64 +0,0 @@
diff -ur gcc-4.4.2-orig/gcc/config/arm/t-arm-elf gcc-4.4.2/gcc/config/arm/t-arm-elf
--- gcc-4.4.2-orig/gcc/config/arm/t-arm-elf 2008-06-12 13:29:47.000000000 -0400
+++ gcc-4.4.2/gcc/config/arm/t-arm-elf 2009-11-05 20:14:57.000000000 -0500
@@ -28,6 +28,11 @@
#MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4
#MULTILIB_MATCHES += march?armv7=mcpu?cortex-m3
+# We build a lib for each specific CPU Rockbox targets. If anyone knows a better
+# way to do this, please let us know.
+MULTILIB_OPTIONS += mcpu=arm7tdmi/mcpu=arm9tdmi/mcpu=arm9e/mcpu=arm926ej-s/mcpu=arm1136jf-s
+MULTILIB_DIRNAMES += arm7tdmi arm9tdmi arm9e arm926ej-s arm1136jf-s
+
# MULTILIB_OPTIONS += mcpu=ep9312
# MULTILIB_DIRNAMES += ep9312
# MULTILIB_EXCEPTIONS += *mthumb/*mcpu=ep9312*
@@ -40,8 +50,8 @@
# MULTILIB_DIRNAMES += fpu soft
# MULTILIB_EXCEPTIONS += *mthumb/*mhard-float*
#
-# MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork
-# MULTILIB_DIRNAMES += normal interwork
+MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork
+MULTILIB_DIRNAMES += normal interwork
#
# MULTILIB_OPTIONS += fno-leading-underscore/fleading-underscore
# MULTILIB_DIRNAMES += elf under
diff -ur gcc-4.4.2-orig/libgcc/Makefile.in gcc-4.4.2/libgcc/Makefile.in
--- gcc-4.4.2-orig/libgcc/Makefile.in 2009-04-09 19:23:07.000000000 -0400
+++ gcc-4.4.2/libgcc/Makefile.in 2009-11-05 03:59:37.000000000 -0500
@@ -393,14 +393,14 @@
lib2-divmod-o = $(patsubst %,%$(objext),$(LIB2_DIVMOD_FUNCS))
$(lib2-divmod-o): %$(objext): $(gcc_srcdir)/libgcc2.c
$(gcc_compile) -DL$* -c $(gcc_srcdir)/libgcc2.c \
- -fexceptions -fnon-call-exceptions $(vis_hide)
+ -fno-exceptions -fno-non-call-exceptions $(vis_hide)
libgcc-objects += $(lib2-divmod-o)
ifeq ($(enable_shared),yes)
lib2-divmod-s-o = $(patsubst %,%_s$(objext),$(LIB2_DIVMOD_FUNCS))
$(lib2-divmod-s-o): %_s$(objext): $(gcc_srcdir)/libgcc2.c
$(gcc_s_compile) -DL$* -c $(gcc_srcdir)/libgcc2.c \
- -fexceptions -fnon-call-exceptions
+ -fno-exceptions -fno-non-call-exceptions
libgcc-s-objects += $(lib2-divmod-s-o)
endif
@@ -688,7 +688,7 @@
# libgcc_eh.a, only LIB2ADDEH matters. If we do, only LIB2ADDEHSTATIC and
# LIB2ADDEHSHARED matter. (Usually all three are identical.)
-c_flags := -fexceptions
+c_flags := -fno-exceptions
ifeq ($(enable_shared),yes)
@@ -710,7 +710,7 @@
# Build LIBUNWIND.
-c_flags := -fexceptions
+c_flags := -fno-exceptions
libunwind-objects += $(addsuffix $(objext),$(basename $(notdir $(LIBUNWIND))))

View File

@ -0,0 +1,56 @@
diff -Naur gcc-4.9.4/gcc/config/arm/t-arm-elf gcc-4.9.4-fixed/gcc/config/arm/t-arm-elf
--- gcc-4.9.4/gcc/config/arm/t-arm-elf 2014-01-02 17:23:26.000000000 -0500
+++ gcc-4.9.4-fixed/gcc/config/arm/t-arm-elf 2020-07-01 22:11:01.198403110 -0400
@@ -44,6 +44,11 @@
#MULTILIB_EXCEPTIONS += *mcpu=fa526/*mfloat-abi=hard*
#MULTILIB_EXCEPTIONS += *mcpu=fa626/*mfloat-abi=hard*
+# We build a lib for each specific CPU Rockbox targets. If anyone knows a better
+# way to do this, please let us know.
+MULTILIB_OPTIONS += mcpu=arm7tdmi/mcpu=arm9tdmi/mcpu=arm9e/mcpu=arm926ej-s/mcpu=arm1136jf-s
+MULTILIB_DIRNAMES += arm7tdmi arm9tdmi arm9e arm926ej-s arm1136jf-s
+
# MULTILIB_OPTIONS += mcpu=ep9312
# MULTILIB_DIRNAMES += ep9312
# MULTILIB_EXCEPTIONS += *mthumb/*mcpu=ep9312*
@@ -56,8 +61,8 @@
# MULTILIB_DIRNAMES += fpu soft
# MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard*
#
-# MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork
-# MULTILIB_DIRNAMES += normal interwork
+MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork
+MULTILIB_DIRNAMES += normal interwork
#
# MULTILIB_OPTIONS += fno-leading-underscore/fleading-underscore
# MULTILIB_DIRNAMES += elf under
diff -Naur gcc-4.9.4/libgcc/config/arm/t-bpabi gcc-4.9.4-fixed/libgcc/config/arm/t-bpabi
--- gcc-4.9.4/libgcc/config/arm/t-bpabi 2012-08-17 11:06:06.000000000 -0400
+++ gcc-4.9.4-fixed/libgcc/config/arm/t-bpabi 2020-07-01 22:13:39.103762818 -0400
@@ -17,4 +17,4 @@
# On ARM, specifying -fnon-call-exceptions will needlessly pull in
# the unwinder in simple programs which use 64-bit division. Omitting
# the option is safe.
-LIB2_DIVMOD_EXCEPTION_FLAGS := -fexceptions
+LIB2_DIVMOD_EXCEPTION_FLAGS := -fno-exceptions -fno-non-call-exceptions
diff -Naur gcc-4.9.4/libgcc/Makefile.in gcc-4.9.4-fixed/libgcc/Makefile.in
--- gcc-4.9.4/libgcc/Makefile.in 2014-01-08 11:37:08.000000000 -0500
+++ gcc-4.9.4-fixed/libgcc/Makefile.in 2020-07-01 22:11:01.199403087 -0400
@@ -495,7 +495,7 @@
ifeq ($(LIB2_DIVMOD_EXCEPTION_FLAGS),)
# Provide default flags for compiling divmod functions, if they haven't been
# set already by a target-specific Makefile fragment.
-LIB2_DIVMOD_EXCEPTION_FLAGS := -fexceptions -fnon-call-exceptions
+LIB2_DIVMOD_EXCEPTION_FLAGS := -fno-exceptions -fno-non-call-exceptions
endif
# Build LIB2_DIVMOD_FUNCS.
@@ -816,7 +816,7 @@
# libgcc_eh.a, only LIB2ADDEH matters. If we do, only LIB2ADDEHSTATIC and
# LIB2ADDEHSHARED matter. (Usually all three are identical.)
-c_flags := -fexceptions
+c_flags := -fno-exceptions
ifeq ($(enable_shared),yes)