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mips: Revert to commiting the cache when we're told to discard an unaligned block. 

The filesystem API often passes in unaligned receive buffers, and some
code (eg BMP reader) processes data in-place, leading to data loss when
we dropped the cache.

(And document exactly what we're doing, so we don't go through this again
 at $future_date)

Change-Id: If47a7f2148a5a1a43777f0bd3be1bdfe8239e91e
This commit is contained in:
Solomon Peachy 2021-03-04 11:32:06 -05:00
parent bcee955169
commit cbace906c6
1 changed files with 16 additions and 0 deletions
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16
firmware/target/mips/mmu-mips.c
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@ -222,6 +222,22 @@ void discard_dcache_range(const void *base, unsigned int size)
char *ptr = CACHEALIGN_DOWN((char*)base);
char *end = CACHEALIGN_UP((char*)base + size);
/* If the start of the buffer is unaligned, write
back that cacheline and shrink up the region
to discard. */
if (base != ptr) {
__CACHE_OP(DCHitWBInv, ptr);
ptr += CACHEALIGN_SIZE;
}
/* If the end of the buffer is unaligned, write back that
cacheline and shrink down the region to discard. */
if (ptr != end && (end !=((char*)base + size))) {
end -= CACHEALIGN_SIZE;
__CACHE_OP(DCHitWBInv, ptr);
}
/* Finally, discard whatever is left */
for(; ptr != end; ptr += CACHEALIGN_SIZE)
__CACHE_OP(DCHitInv, ptr);