nihilazo
/
rockbox
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

jz4760: Prioritize Audio DMA and TCU0 (systick) above all others 

(And loop in the IRQ handler to make sure we catch everything!)

Change-Id: I813272c69e981fdc214ec28448ced403ad366ea0
This commit is contained in:
Solomon Peachy 2020-08-29 23:38:56 -04:00
parent b01e9295e4
commit cc5b0439a8
2 changed files with 21 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
firmware/target/mips/ingenic_jz47xx/system-jz4760.c
View File

@ -244,41 +244,20 @@ static int get_irq_number(void)
if (UNLIKELY(irq0 < 0) && UNLIKELY(irq1 < 0))
return -1;
#if 1
// Prioritze AIC and SADC, then everything on ipl1 (ie MSC mostly)
if (ipl1 & 1<<(IRQ_AIC-32)) {
irq = IRQ_AIC;
ipl1 &= ~(1<<(IRQ_AIC-32));
} else if (ipl0 & 1<<IRQ_SADC) {
irq = IRQ_SADC;
ipl0 &= ~(1<<IRQ_SADC);
// Prioritze DMA0 (audio) and TCU0 (systick), then everything on ipl1 (ie MSC mostly)
if (ipl0 & 1<<IRQ_DMAC0) {
irq = IRQ_DMAC0;
ipl0 &= ~(1<<IRQ_DMAC0);
} else if (ipl0 & 1<<IRQ_TCU0) {
irq = IRQ_TCU0;
ipl0 &= ~(1<<IRQ_TCU0);
} else if (ipl1) {
irq = irq1 + 32;
ipl1 &= ~(1<<irq1);
ipl1 &= ~(1<<irq1);
} else {
irq = irq0;
ipl0 &= ~(1<<irq0);
ipl0 &= ~(1<<irq0);
}
#else
// Prioritize I2C0, I2C1, IPL0, and finally IPL1
if (!(ipl0 & 3)) {
if (ipl0) {
irq = irq0;
ipl0 &= ~(1<<irq0);
} else {
irq = irq1 + 32;
ipl1 &= ~(1<<irq1);
}
} else {
if (ipl0 & 2) {
irq = 1;
ipl0 &= ~(1<<irq);
} else {
irq = 0;
ipl0 &= ~(1<<irq);
}
}
#endif
switch (irq)
{
@ -307,13 +286,16 @@ static int get_irq_number(void)
void intr_handler(void)
{
register int irq = get_irq_number();
register int irq;
top:
irq = get_irq_number();
if(UNLIKELY(irq < 0))
return;
ack_irq(irq);
if(LIKELY(irq >= 0))
irqvector[irq]();
goto top;
}
#define EXC(x,y) case (x): return (y);

16
firmware/target/mips/ingenic_jz47xx/system-target.h
View File

@ -95,15 +95,15 @@ void dma_disable(void);
#define DMA_LCD_CHANNEL 3
#elif CONFIG_CPU == JZ4760B
#define DMA_AIC_TX_CHANNEL 0
#define DMA_NAND_CHANNEL 1
#define DMA_USB_CHANNEL 2
#define DMA_SD_RX_CHANNEL0 3
#define DMA_SD_RX_CHANNEL1 4
#define DMA_USB_CHANNEL 1
// Note: channel 5 and 11 cannot be used!
#define DMA_SD_TX_CHANNEL0 6
#define DMA_SD_TX_CHANNEL1 7
#define DMA_SD_RX_CHANNEL(n) 3+n
#define DMA_SD_TX_CHANNEL(n) 6+n
#define DMA_SD_RX_CHANNEL0 6
#define DMA_SD_RX_CHANNEL1 7
#define DMA_SD_TX_CHANNEL0 8
#define DMA_SD_TX_CHANNEL1 9
#define DMA_NAND_CHANNEL 10
#define DMA_SD_RX_CHANNEL(n) 6+n
#define DMA_SD_TX_CHANNEL(n) 8+n
#endif
#define XDMA_CALLBACK(n) DMA ## n