6a67707b5e
Wouldn't surprise me a bit to get some non-green. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31339 a1c6a512-1295-4272-9138-f99709370657
77 lines
2.6 KiB
C
77 lines
2.6 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006,2007 by Greg White
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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/* This file MUST be included in your system-target.h file if you want arm
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* cache coherence functions to be called (I.E. during codec load, etc).
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*/
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#ifndef MMU_ARM_H
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#define MMU_ARM_H
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#define CACHE_ALL 0x0C
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#define CACHE_NONE 0
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#define BUFFERED 0x04
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void memory_init(void);
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void ttb_init(void);
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void enable_mmu(void);
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void map_section(unsigned int pa, unsigned int va, int mb, int flags);
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/* Note for the function names
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*
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* ARM refers to the cache coherency functions as (in the CPU manuals):
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* clean (write-back)
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* clean and invalidate (write-back and removing the line from cache)
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* invalidate (removing from cache without write-back)
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*
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* The deprecated functions below don't follow the above (which is why
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* they're deprecated).
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*
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* This names have been proven to cause confusion, therefore we use:
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* commit
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* commit and discard
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* discard
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*/
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/* Commits entire DCache */
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void commit_dcache(void);
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/* Commit and discard entire DCache, will do writeback */
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void commit_discard_dcache(void);
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/* Write DCache back to RAM for the given range and remove cache lines
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* from DCache afterwards */
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void commit_discard_dcache_range(const void *base, unsigned int size);
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/* Write DCache back to RAM for the given range */
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void commit_dcache_range(const void *base, unsigned int size);
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/*
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* Remove cache lines for the given range from DCache
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* will *NOT* do write back except for buffer edges not on a line boundary
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*/
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void discard_dcache_range(const void *base, unsigned int size);
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/* Discards the entire ICache, and commit+discards the entire DCache */
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void commit_discard_idcache(void);
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#endif /* MMU_ARM_H */
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