979 lines
27 KiB
C
979 lines
27 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2004 by Jens Arnold
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "ata_mmc.h"
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#include "sdmmc.h"
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#include "kernel.h"
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#include "led.h"
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#include "sh7034.h"
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#include "system.h"
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#include "debug.h"
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#include "panic.h"
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#include "power.h"
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#include "string.h"
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#include "hwcompat.h"
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#include "adc.h"
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#include "bitswap.h"
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#include "storage.h"
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#ifdef HAVE_MULTIDRIVE
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#define MMC_NUM_DRIVES 2
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#else
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#define MMC_NUM_DRIVES 1
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#endif
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#define BLOCK_SIZE 512 /* fixed */
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/* Command definitions */
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#define CMD_GO_IDLE_STATE 0x40 /* R1 */
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#define CMD_SEND_OP_COND 0x41 /* R1 */
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#define CMD_SEND_CSD 0x49 /* R1 */
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#define CMD_SEND_CID 0x4a /* R1 */
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#define CMD_STOP_TRANSMISSION 0x4c /* R1 */
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#define CMD_SEND_STATUS 0x4d /* R2 */
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#define CMD_SET_BLOCKLEN 0x50 /* R1 */
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#define CMD_READ_SINGLE_BLOCK 0x51 /* R1 */
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#define CMD_READ_MULTIPLE_BLOCK 0x52 /* R1 */
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#define CMD_WRITE_BLOCK 0x58 /* R1b */
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#define CMD_WRITE_MULTIPLE_BLOCK 0x59 /* R1b */
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#define CMD_READ_OCR 0x7a /* R3 */
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/* Response formats:
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R1 = single byte, msb=0, various error flags
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R1b = R1 + busy token(s)
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R2 = 2 bytes (1st byte identical to R1), additional flags
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R3 = 5 bytes (R1 + OCR register)
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*/
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#define R1_PARAMETER_ERR 0x40
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#define R1_ADDRESS_ERR 0x20
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#define R1_ERASE_SEQ_ERR 0x10
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#define R1_COM_CRC_ERR 0x08
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#define R1_ILLEGAL_CMD 0x04
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#define R1_ERASE_RESET 0x02
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#define R1_IN_IDLE_STATE 0x01
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#define R2_OUT_OF_RANGE 0x80
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#define R2_ERASE_PARAM 0x40
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#define R2_WP_VIOLATION 0x20
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#define R2_CARD_ECC_FAIL 0x10
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#define R2_CC_ERROR 0x08
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#define R2_ERROR 0x04
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#define R2_ERASE_SKIP 0x02
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#define R2_CARD_LOCKED 0x01
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/* Data start tokens */
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#define DT_START_BLOCK 0xfe
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#define DT_START_WRITE_MULTIPLE 0xfc
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#define DT_STOP_TRAN 0xfd
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/* for compatibility */
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static long last_disk_activity = -1;
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/* private variables */
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#ifdef CONFIG_STORAGE_MULTI
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static int mmc_first_drive = 0;
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#else
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#define mmc_first_drive 0
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#endif
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static struct mutex mmc_mutex SHAREDBSS_ATTR;
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static bool initialized = false;
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static bool new_mmc_circuit;
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static enum {
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MMC_UNKNOWN,
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MMC_UNTOUCHED,
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MMC_TOUCHED
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} mmc_status = MMC_UNKNOWN;
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static enum {
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SER_POLL_WRITE,
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SER_POLL_READ,
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SER_DISABLED
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} serial_mode;
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static const unsigned char dummy[] = {
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0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
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};
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/* 2 buffers used alternatively for writing, including start token,
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* dummy CRC and an extra byte to keep word alignment. */
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static unsigned char write_buffer[2][BLOCK_SIZE+4];
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static int current_buffer = 0;
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static const unsigned char *send_block_addr = NULL;
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static tCardInfo card_info[2];
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#ifndef HAVE_MULTIDRIVE
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static int current_card = 0;
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#endif
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static bool last_mmc_status = false;
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static int countdown = -1; /* for mmc switch debouncing. -1 because the
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countdown should not happen if the card
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is inserted at boot */
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static bool usb_activity; /* monitoring the USB bridge */
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static long last_usb_activity;
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/* private function declarations */
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static int select_card(int card_no);
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static void deselect_card(void);
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static void setup_sci1(int bitrate_register);
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static void set_sci1_poll_read(void);
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static void write_transfer(const unsigned char *buf, int len)
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__attribute__ ((section(".icode")));
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static void read_transfer(unsigned char *buf, int len)
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__attribute__ ((section(".icode")));
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static unsigned char poll_byte(long timeout);
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static unsigned char poll_busy(long timeout);
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static unsigned char send_cmd(int cmd, unsigned long parameter, void *data);
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static int receive_cxd(unsigned char *buf);
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static int initialize_card(int card_no);
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static int receive_block(unsigned char *inbuf, long timeout);
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static void send_block_prepare(void);
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static int send_block_send(unsigned char start_token, long timeout,
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bool prepare_next);
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static void mmc_tick(void);
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/* implementation */
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static void enable_controller(bool on)
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{
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PBCR1 &= ~0x0CF0; /* PB13, PB11 and PB10 become GPIO,
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* if not modified below */
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if (on)
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PBCR1 |= 0x08A0; /* as SCK1, TxD1, RxD1 */
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and_b(~0x80, &PADRL); /* assert flash reset */
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sleep(HZ/100);
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or_b(0x80, &PADRL); /* de-assert flash reset */
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sleep(HZ/100);
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card_info[0].initialized = false;
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card_info[1].initialized = false;
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}
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void mmc_enable_int_flash_clock(bool on)
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{
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/* Internal flash clock is enabled by setting PA12 high with the new
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* clock circuit, and by setting it low with the old clock circuit */
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if (on ^ new_mmc_circuit)
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and_b(~0x10, &PADRH); /* clear clock gate PA12 */
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else
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or_b(0x10, &PADRH); /* set clock gate PA12 */
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}
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static int select_card(int card_no)
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{
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mutex_lock(&mmc_mutex);
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led(true);
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last_disk_activity = current_tick;
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mmc_enable_int_flash_clock(card_no == 0);
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if (!card_info[card_no].initialized)
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{
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setup_sci1(7); /* Initial rate: 375 kbps (need <= 400 per mmc specs) */
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write_transfer(dummy, 10); /* allow the card to synchronize */
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while (!(SSR1 & SCI_TEND));
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}
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if (card_no == 0) /* internal */
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and_b(~0x04, &PADRH); /* assert CS */
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else /* external */
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and_b(~0x02, &PADRH); /* assert CS */
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if (card_info[card_no].initialized)
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{
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setup_sci1(card_info[card_no].bitrate_register);
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return 0;
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}
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else
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{
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return initialize_card(card_no);
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}
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}
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static void deselect_card(void)
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{
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while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
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or_b(0x06, &PADRH); /* deassert CS (both cards) */
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led(false);
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mutex_unlock(&mmc_mutex);
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last_disk_activity = current_tick;
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}
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static void setup_sci1(int bitrate_register)
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{
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while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
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SCR1 = 0; /* disable serial port */
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SMR1 = SYNC_MODE; /* no prescale */
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BRR1 = bitrate_register;
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SSR1 = 0;
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SCR1 = SCI_TE; /* enable transmitter */
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serial_mode = SER_POLL_WRITE;
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}
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static void set_sci1_poll_read(void)
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{
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while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
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SCR1 = 0; /* disable transmitter (& receiver) */
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SCR1 = (SCI_TE|SCI_RE); /* re-enable transmitter & receiver */
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while (!(SSR1 & SCI_TEND)); /* wait for SCI init completion (!) */
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serial_mode = SER_POLL_READ;
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TDR1 = 0xFF; /* send do-nothing while reading */
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}
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static void write_transfer(const unsigned char *buf, int len)
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{
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const unsigned char *buf_end = buf + len;
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register unsigned char data;
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if (serial_mode != SER_POLL_WRITE)
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{
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while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
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SCR1 = 0; /* disable transmitter & receiver */
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SSR1 = 0; /* clear all flags */
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SCR1 = SCI_TE; /* enable transmitter only */
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serial_mode = SER_POLL_WRITE;
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}
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while (buf < buf_end)
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{
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data = fliptable[(signed char)(*buf++)]; /* bitswap */
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while (!(SSR1 & SCI_TDRE)); /* wait for end of transfer */
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TDR1 = data; /* write byte */
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SSR1 = 0; /* start transmitting */
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}
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}
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/* don't call this with len == 0 */
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static void read_transfer(unsigned char *buf, int len)
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{
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unsigned char *buf_end = buf + len - 1;
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register signed char data;
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if (serial_mode != SER_POLL_READ)
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set_sci1_poll_read();
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SSR1 = 0; /* start receiving first byte */
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while (buf < buf_end)
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{
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while (!(SSR1 & SCI_RDRF)); /* wait for data */
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data = RDR1; /* read byte */
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SSR1 = 0; /* start receiving */
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*buf++ = fliptable[data]; /* bitswap */
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}
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while (!(SSR1 & SCI_RDRF)); /* wait for last byte */
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*buf = fliptable[(signed char)(RDR1)]; /* read & bitswap */
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}
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/* returns 0xFF on timeout, timeout is in bytes */
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static unsigned char poll_byte(long timeout)
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{
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long i;
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unsigned char data = 0; /* stop the compiler complaining */
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if (serial_mode != SER_POLL_READ)
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set_sci1_poll_read();
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i = 0;
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do {
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SSR1 = 0; /* start receiving */
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while (!(SSR1 & SCI_RDRF)); /* wait for data */
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data = RDR1; /* read byte */
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} while ((data == 0xFF) && (++i < timeout));
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return fliptable[(signed char)data];
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}
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/* returns 0 on timeout, timeout is in bytes */
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static unsigned char poll_busy(long timeout)
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{
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long i;
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unsigned char data, dummy;
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if (serial_mode != SER_POLL_READ)
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set_sci1_poll_read();
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/* get data response */
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SSR1 = 0; /* start receiving */
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while (!(SSR1 & SCI_RDRF)); /* wait for data */
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data = fliptable[(signed char)(RDR1)]; /* read byte */
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/* wait until the card is ready again */
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i = 0;
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do {
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SSR1 = 0; /* start receiving */
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while (!(SSR1 & SCI_RDRF)); /* wait for data */
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dummy = RDR1; /* read byte */
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} while ((dummy != 0xFF) && (++i < timeout));
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return (dummy == 0xFF) ? data : 0;
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}
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/* Send MMC command and get response. Returns R1 byte directly.
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* Returns further R2 or R3 bytes in *data (can be NULL for other commands) */
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static unsigned char send_cmd(int cmd, unsigned long parameter, void *data)
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{
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static struct {
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unsigned char cmd;
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unsigned long parameter;
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const unsigned char crc7; /* fixed, valid for CMD0 only */
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const unsigned char trailer;
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} __attribute__((packed)) command = {0x40, 0, 0x95, 0xFF};
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unsigned char ret;
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command.cmd = cmd;
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command.parameter = htobe32(parameter);
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write_transfer((unsigned char *)&command, sizeof(command));
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ret = poll_byte(20);
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switch (cmd)
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{
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case CMD_SEND_CSD: /* R1 response, leave open */
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case CMD_SEND_CID:
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case CMD_READ_SINGLE_BLOCK:
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case CMD_READ_MULTIPLE_BLOCK:
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return ret;
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case CMD_SEND_STATUS: /* R2 response, close with dummy */
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read_transfer(data, 1);
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break;
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case CMD_READ_OCR: /* R3 response, close with dummy */
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read_transfer(data, 4);
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break;
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default: /* R1 response, close with dummy */
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break; /* also catches block writes */
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}
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write_transfer(dummy, 1);
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return ret;
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}
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/* Receive CID/ CSD data (16 bytes) */
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static int receive_cxd(unsigned char *buf)
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{
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if (poll_byte(20) != DT_START_BLOCK)
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{
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write_transfer(dummy, 1);
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return -1; /* not start of data */
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}
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read_transfer(buf, 16);
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write_transfer(dummy, 3); /* 2 bytes dontcare crc + 1 byte trailer */
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return 0;
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}
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static int initialize_card(int card_no)
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{
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int rc, i;
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int blk_exp, ts_exp, taac_exp;
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tCardInfo *card = &card_info[card_no];
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static const char mantissa[] = { /* *10 */
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0, 10, 12, 13, 15, 20, 25, 30,
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35, 40, 45, 50, 55, 60, 70, 80
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};
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static const int exponent[] = { /* use varies */
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1, 10, 100, 1000, 10000, 100000, 1000000,
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10000000, 100000000, 1000000000
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};
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if (card_no == 1)
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mmc_status = MMC_TOUCHED;
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/* switch to SPI mode */
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if (send_cmd(CMD_GO_IDLE_STATE, 0, NULL) != 0x01)
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return -1; /* error or no response */
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/* initialize card */
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for (i = HZ;;) /* try for 1 second*/
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{
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sleep(1);
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if (send_cmd(CMD_SEND_OP_COND, 0, NULL) == 0)
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break;
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if (--i <= 0)
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return -2; /* timeout */
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}
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/* get OCR register */
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if (send_cmd(CMD_READ_OCR, 0, &card->ocr))
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return -3;
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card->ocr = betoh32(card->ocr); /* no-op on big endian */
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/* check voltage */
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if (!(card->ocr & 0x00100000)) /* 3.2 .. 3.3 V */
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return -4;
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/* get CSD register */
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if (send_cmd(CMD_SEND_CSD, 0, NULL))
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return -5;
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rc = receive_cxd((unsigned char*)card->csd);
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if (rc)
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return rc * 10 - 5;
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blk_exp = card_extract_bits(card->csd, 83, 4);
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if (blk_exp < 9) /* block size < 512 bytes not supported */
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return -6;
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card->numblocks = (card_extract_bits(card->csd, 73, 12) + 1)
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<< (card_extract_bits(card->csd, 49, 3) + 2 + blk_exp - 9);
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card->blocksize = BLOCK_SIZE;
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/* max transmission speed, clock divider */
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ts_exp = card_extract_bits(card->csd, 98, 3);
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ts_exp = (ts_exp > 3) ? 3 : ts_exp;
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card->speed = mantissa[card_extract_bits(card->csd, 102, 4)]
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* exponent[ts_exp + 4];
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card->bitrate_register = (FREQ/4-1) / card->speed;
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/* NSAC, TAAC, read timeout */
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card->nsac = 100 * card_extract_bits(card->csd, 111, 8);
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card->taac = mantissa[card_extract_bits(card->csd, 118, 4)];
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taac_exp = card_extract_bits(card->csd, 114, 3);
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card->read_timeout = ((FREQ/4) / (card->bitrate_register + 1)
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* card->taac / exponent[9 - taac_exp]
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+ (10 * card->nsac));
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card->read_timeout /= 8; /* clocks -> bytes */
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card->taac = card->taac * exponent[taac_exp] / 10;
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/* r2w_factor, write timeout */
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card->r2w_factor = BIT_N(card_extract_bits(card->csd, 28, 3));
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card->write_timeout = card->read_timeout * card->r2w_factor;
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if (card->r2w_factor > 32) /* Such cards often need extra read delay */
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card->read_timeout *= 4;
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/* switch to full speed */
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setup_sci1(card->bitrate_register);
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/* always use 512 byte blocks */
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if (send_cmd(CMD_SET_BLOCKLEN, BLOCK_SIZE, NULL))
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return -7;
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/* get CID register */
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if (send_cmd(CMD_SEND_CID, 0, NULL))
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return -8;
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rc = receive_cxd((unsigned char*)card->cid);
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if (rc)
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return rc * 10 - 8;
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card->initialized = true;
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return 0;
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}
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tCardInfo *mmc_card_info(int card_no)
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{
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tCardInfo *card = &card_info[card_no];
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if (!card->initialized && ((card_no == 0) || mmc_detect()))
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{
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select_card(card_no);
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deselect_card();
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}
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return card;
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}
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|
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/* Receive one block with DMA and bitswap it (chasing bitswap). */
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static int receive_block(unsigned char *inbuf, long timeout)
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{
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unsigned long buf_end;
|
|
|
|
if (poll_byte(timeout) != DT_START_BLOCK)
|
|
{
|
|
write_transfer(dummy, 1);
|
|
return -1; /* not start of data */
|
|
}
|
|
|
|
while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
|
|
|
|
SCR1 = 0; /* disable serial */
|
|
SSR1 = 0; /* clear all flags */
|
|
|
|
/* setup DMA channel 0 */
|
|
CHCR0 = 0; /* disable */
|
|
SAR0 = RDR1_ADDR;
|
|
DAR0 = (unsigned long) inbuf;
|
|
DTCR0 = BLOCK_SIZE;
|
|
CHCR0 = 0x4601; /* fixed source address, RXI1, enable */
|
|
DMAOR = 0x0001;
|
|
SCR1 = (SCI_RE|SCI_RIE); /* kick off DMA */
|
|
|
|
/* DMA receives 2 bytes more than DTCR2, but the last 2 bytes are not
|
|
* stored. The first extra byte is available from RDR1 after the DMA ends,
|
|
* the second one is lost because of the SCI overrun. However, this
|
|
* behaviour conveniently discards the crc. */
|
|
|
|
yield(); /* be nice */
|
|
|
|
/* Bitswap received data, chasing the DMA pointer */
|
|
buf_end = (unsigned long)inbuf + BLOCK_SIZE;
|
|
do
|
|
{
|
|
/* Call bitswap whenever (a multiple of) 8 bytes are
|
|
* available (value optimised by experimentation). */
|
|
int swap_now = (DAR0 - (unsigned long)inbuf) & ~0x00000007;
|
|
if (swap_now)
|
|
{
|
|
bitswap(inbuf, swap_now);
|
|
inbuf += swap_now;
|
|
}
|
|
}
|
|
while ((unsigned long)inbuf < buf_end);
|
|
|
|
while (!(CHCR0 & 0x0002)); /* wait for end of DMA */
|
|
while (!(SSR1 & SCI_ORER)); /* wait for the trailing bytes */
|
|
SCR1 = 0;
|
|
serial_mode = SER_DISABLED;
|
|
|
|
write_transfer(dummy, 1); /* send trailer */
|
|
last_disk_activity = current_tick;
|
|
return 0;
|
|
}
|
|
|
|
/* Prepare a block for sending by copying it to the next write buffer
|
|
* and bitswapping it. */
|
|
static void send_block_prepare(void)
|
|
{
|
|
unsigned char *dest;
|
|
|
|
current_buffer ^= 1; /* toggle buffer */
|
|
dest = write_buffer[current_buffer] + 2;
|
|
|
|
memcpy(dest, send_block_addr, BLOCK_SIZE);
|
|
bitswap(dest, BLOCK_SIZE);
|
|
|
|
send_block_addr += BLOCK_SIZE;
|
|
}
|
|
|
|
/* Send one block with DMA from the current write buffer, possibly preparing
|
|
* the next block within the next write buffer in the background. */
|
|
static int send_block_send(unsigned char start_token, long timeout,
|
|
bool prepare_next)
|
|
{
|
|
int rc = 0;
|
|
unsigned char *curbuf = write_buffer[current_buffer];
|
|
|
|
curbuf[1] = fliptable[(signed char)start_token];
|
|
*(unsigned short *)(curbuf + BLOCK_SIZE + 2) = 0xFFFF;
|
|
|
|
while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
|
|
|
|
SCR1 = 0; /* disable serial */
|
|
SSR1 = 0; /* clear all flags */
|
|
|
|
/* setup DMA channel 0 */
|
|
CHCR0 = 0; /* disable */
|
|
SAR0 = (unsigned long)(curbuf + 1);
|
|
DAR0 = TDR1_ADDR;
|
|
DTCR0 = BLOCK_SIZE + 3; /* start token + block + dummy crc */
|
|
CHCR0 = 0x1701; /* fixed dest. address, TXI1, enable */
|
|
DMAOR = 0x0001;
|
|
SCR1 = (SCI_TE|SCI_TIE); /* kick off DMA */
|
|
|
|
if (prepare_next)
|
|
send_block_prepare();
|
|
yield(); /* be nice */
|
|
|
|
while (!(CHCR0 & 0x0002)); /* wait for end of DMA */
|
|
while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
|
|
SCR1 = 0;
|
|
serial_mode = SER_DISABLED;
|
|
|
|
if ((poll_busy(timeout) & 0x1F) != 0x05) /* something went wrong */
|
|
rc = -1;
|
|
|
|
write_transfer(dummy, 1);
|
|
last_disk_activity = current_tick;
|
|
|
|
return rc;
|
|
}
|
|
|
|
int mmc_read_sectors(IF_MD(int drive,)
|
|
unsigned long start,
|
|
int incount,
|
|
void* inbuf)
|
|
{
|
|
int rc = 0;
|
|
int lastblock = 0;
|
|
unsigned long end_block;
|
|
tCardInfo *card;
|
|
#ifndef HAVE_MULTIDRIVE
|
|
int drive = current_card;
|
|
#endif
|
|
|
|
card = &card_info[drive];
|
|
rc = select_card(drive);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 1;
|
|
goto error;
|
|
}
|
|
|
|
end_block = start + incount;
|
|
if (end_block > card->numblocks)
|
|
{
|
|
rc = -2;
|
|
goto error;
|
|
}
|
|
|
|
/* Some cards don't like reading the very last block with
|
|
* CMD_READ_MULTIPLE_BLOCK, so make sure this block is always
|
|
* read with CMD_READ_SINGLE_BLOCK. */
|
|
if (end_block == card->numblocks)
|
|
lastblock = 1;
|
|
|
|
if (incount > 1)
|
|
{
|
|
/* MMC4.2: make multiplication conditional */
|
|
if (send_cmd(CMD_READ_MULTIPLE_BLOCK, start * BLOCK_SIZE, NULL))
|
|
{
|
|
rc = -3;
|
|
goto error;
|
|
}
|
|
while (--incount >= lastblock)
|
|
{
|
|
rc = receive_block(inbuf, card->read_timeout);
|
|
if (rc)
|
|
{
|
|
/* If an error occurs during multiple block reading, the
|
|
* host still needs to send CMD_STOP_TRANSMISSION */
|
|
send_cmd(CMD_STOP_TRANSMISSION, 0, NULL);
|
|
rc = rc * 10 - 4;
|
|
goto error;
|
|
}
|
|
inbuf += BLOCK_SIZE;
|
|
start++;
|
|
/* ^^ necessary for the abovementioned last block special case */
|
|
}
|
|
if (send_cmd(CMD_STOP_TRANSMISSION, 0, NULL))
|
|
{
|
|
rc = -5;
|
|
goto error;
|
|
}
|
|
}
|
|
if (incount > 0)
|
|
{
|
|
/* MMC4.2: make multiplication conditional */
|
|
if (send_cmd(CMD_READ_SINGLE_BLOCK, start * BLOCK_SIZE, NULL))
|
|
{
|
|
rc = -6;
|
|
goto error;
|
|
}
|
|
rc = receive_block(inbuf, card->read_timeout);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 7;
|
|
goto error;
|
|
}
|
|
}
|
|
|
|
error:
|
|
|
|
deselect_card();
|
|
|
|
return rc;
|
|
}
|
|
|
|
int mmc_write_sectors(IF_MD(int drive,)
|
|
unsigned long start,
|
|
int count,
|
|
const void* buf)
|
|
{
|
|
int rc = 0;
|
|
int write_cmd;
|
|
unsigned char start_token;
|
|
tCardInfo *card;
|
|
#ifndef HAVE_MULTIDRIVE
|
|
int drive = current_card;
|
|
#endif
|
|
|
|
card = &card_info[drive];
|
|
rc = select_card(drive);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 1;
|
|
goto error;
|
|
}
|
|
|
|
if (start + count > card->numblocks)
|
|
panicf("Writing past end of card");
|
|
|
|
send_block_addr = buf;
|
|
send_block_prepare();
|
|
|
|
if (count > 1)
|
|
{
|
|
write_cmd = CMD_WRITE_MULTIPLE_BLOCK;
|
|
start_token = DT_START_WRITE_MULTIPLE;
|
|
}
|
|
else
|
|
{
|
|
write_cmd = CMD_WRITE_BLOCK;
|
|
start_token = DT_START_BLOCK;
|
|
}
|
|
/* MMC4.2: make multiplication conditional */
|
|
if (send_cmd(write_cmd, start * BLOCK_SIZE, NULL))
|
|
{
|
|
rc = -2;
|
|
goto error;
|
|
}
|
|
while (--count >= 0)
|
|
{
|
|
rc = send_block_send(start_token, card->write_timeout, count > 0);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 3;
|
|
break;
|
|
/* If an error occurs during multiple block writing,
|
|
* the STOP_TRAN token still needs to be sent. */
|
|
}
|
|
}
|
|
if (write_cmd == CMD_WRITE_MULTIPLE_BLOCK)
|
|
{
|
|
static const unsigned char stop_tran = DT_STOP_TRAN;
|
|
write_transfer(&stop_tran, 1);
|
|
poll_busy(card->write_timeout);
|
|
}
|
|
|
|
error:
|
|
|
|
deselect_card();
|
|
|
|
return rc;
|
|
}
|
|
|
|
bool mmc_disk_is_active(void)
|
|
{
|
|
/* this is correct unless early return from write gets implemented */
|
|
return mutex_test(&mmc_mutex);
|
|
}
|
|
|
|
bool mmc_detect(void)
|
|
{
|
|
return (adc_read(ADC_MMC_SWITCH) < 0x200);
|
|
}
|
|
|
|
bool mmc_touched(void)
|
|
{
|
|
if (mmc_status == MMC_UNKNOWN) /* try to detect */
|
|
{
|
|
mutex_lock(&mmc_mutex);
|
|
setup_sci1(7); /* safe value */
|
|
and_b(~0x02, &PADRH); /* assert CS */
|
|
if (send_cmd(CMD_SEND_OP_COND, 0, NULL) == 0xFF)
|
|
mmc_status = MMC_UNTOUCHED;
|
|
else
|
|
mmc_status = MMC_TOUCHED;
|
|
|
|
deselect_card();
|
|
}
|
|
return mmc_status == MMC_TOUCHED;
|
|
}
|
|
|
|
bool mmc_usb_active(int delayticks)
|
|
{
|
|
/* reading "inactive" is delayed by user-supplied monoflop value */
|
|
return (usb_activity ||
|
|
TIME_BEFORE(current_tick, last_usb_activity + delayticks));
|
|
}
|
|
|
|
static void mmc_tick(void)
|
|
{
|
|
bool current_status;
|
|
|
|
if (new_mmc_circuit)
|
|
/* USB bridge activity is 0 on idle, ~527 on active */
|
|
current_status = adc_read(ADC_USB_ACTIVE) > 0x100;
|
|
else
|
|
current_status = adc_read(ADC_USB_ACTIVE) < 0x190;
|
|
|
|
if (!current_status && usb_activity)
|
|
last_usb_activity = current_tick;
|
|
usb_activity = current_status;
|
|
|
|
current_status = mmc_detect();
|
|
/* Only report when the status has changed */
|
|
if (current_status != last_mmc_status)
|
|
{
|
|
last_mmc_status = current_status;
|
|
countdown = HZ/3;
|
|
}
|
|
else
|
|
{
|
|
/* Count down until it gets negative */
|
|
if (countdown >= 0)
|
|
countdown--;
|
|
|
|
if (countdown == 0)
|
|
{
|
|
if (current_status)
|
|
{
|
|
queue_broadcast(SYS_HOTSWAP_INSERTED, mmc_first_drive + 1);
|
|
}
|
|
else
|
|
{
|
|
queue_broadcast(SYS_HOTSWAP_EXTRACTED, mmc_first_drive + 1);
|
|
mmc_status = MMC_UNTOUCHED;
|
|
card_info[1].initialized = false;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
void mmc_enable(bool on)
|
|
{
|
|
mutex_lock(&mmc_mutex);
|
|
enable_controller(on);
|
|
mutex_unlock(&mmc_mutex);
|
|
}
|
|
|
|
int mmc_init(void)
|
|
{
|
|
int rc = 0;
|
|
|
|
if (!initialized)
|
|
mutex_init(&mmc_mutex);
|
|
|
|
mutex_lock(&mmc_mutex);
|
|
led(false);
|
|
|
|
last_mmc_status = mmc_detect();
|
|
#ifndef HAVE_MULTIDRIVE
|
|
/* Use MMC if inserted, internal flash otherwise */
|
|
current_card = last_mmc_status ? 1 : 0;
|
|
#endif
|
|
|
|
if (!initialized)
|
|
{
|
|
if (!last_mmc_status)
|
|
mmc_status = MMC_UNTOUCHED;
|
|
|
|
/* Port setup */
|
|
PACR1 &= ~0x0F3C; /* GPIO function for PA13 (flash busy), PA12
|
|
* (clk gate), PA10 (flash CS), PA9 (MMC CS) */
|
|
PACR2 &= ~0x4000; /* GPIO for PA7 (flash reset) */
|
|
PADR |= 0x0680; /* set all the selects + reset high (=inactive) */
|
|
PAIOR |= 0x1680; /* make outputs for them and the PA12 clock gate */
|
|
|
|
PBCR1 &= ~0x0CF0; /* GPIO function for PB13, PB11 and PB10 */
|
|
PBDR |= 0x2C00; /* SCK1, TxD1 and RxD1 high in GPIO */
|
|
PBIOR |= 0x2000; /* SCK1 output */
|
|
PBIOR &= ~0x0C00; /* TxD1, RxD1 input */
|
|
|
|
IPRE &= 0x0FFF; /* disable SCI1 interrupts for the CPU */
|
|
|
|
new_mmc_circuit = ((HW_MASK & MMC_CLOCK_POLARITY) != 0);
|
|
tick_add_task(mmc_tick);
|
|
initialized = true;
|
|
}
|
|
enable_controller(true);
|
|
|
|
mutex_unlock(&mmc_mutex);
|
|
return rc;
|
|
}
|
|
|
|
long mmc_last_disk_activity(void)
|
|
{
|
|
return last_disk_activity;
|
|
}
|
|
|
|
#ifdef STORAGE_GET_INFO
|
|
void mmc_get_info(IF_MD(int drive,) struct storage_info *info)
|
|
{
|
|
#ifndef HAVE_MULTIDRIVE
|
|
const int drive=0;
|
|
#endif
|
|
info->sector_size=card_info[drive].blocksize;
|
|
info->num_sectors=card_info[drive].numblocks;
|
|
info->vendor="Rockbox";
|
|
if(drive==0)
|
|
{
|
|
info->product="Internal Storage";
|
|
}
|
|
else
|
|
{
|
|
info->product="MMC Card Slot";
|
|
}
|
|
info->revision="0.00";
|
|
}
|
|
#endif
|
|
|
|
#ifdef HAVE_HOTSWAP
|
|
bool mmc_removable(IF_MD_NONVOID(int drive))
|
|
{
|
|
#ifndef HAVE_MULTIDRIVE
|
|
const int drive=0;
|
|
#endif
|
|
return (drive==1);
|
|
}
|
|
|
|
bool mmc_present(IF_MD_NONVOID(int drive))
|
|
{
|
|
#ifndef HAVE_MULTIDRIVE
|
|
const int drive=0;
|
|
#endif
|
|
if(drive==0)
|
|
{
|
|
return true;
|
|
}
|
|
else
|
|
{
|
|
return mmc_detect();
|
|
}
|
|
}
|
|
#endif
|
|
|
|
void mmc_spin(void)
|
|
{
|
|
}
|
|
|
|
void mmc_spindown(int seconds)
|
|
{
|
|
(void)seconds;
|
|
}
|
|
|
|
#ifdef CONFIG_STORAGE_MULTI
|
|
int mmc_num_drives(int first_drive)
|
|
{
|
|
mmc_first_drive = first_drive;
|
|
return MMC_NUM_DRIVES;
|
|
}
|
|
#endif /* CONFIG_STORAGE_MULTI */
|
|
|
|
int mmc_event(long id, intptr_t data)
|
|
{
|
|
return storage_event_default_handler(id, data, last_disk_activity,
|
|
STORAGE_MMC);
|
|
}
|