231 lines
8.3 KiB
C
231 lines
8.3 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2021 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __ES9218_H__
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#define __ES9218_H__
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#include <stdbool.h>
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#include <stdint.h>
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#define AUDIOHW_CAPS (FILTER_ROLL_OFF_CAP|POWER_MODE_CAP)
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#define AUDIOHW_HAVE_ES9218_ROLL_OFF
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#define ES9218_DIG_VOLUME_MIN (-1275)
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#define ES9218_DIG_VOLUME_MAX 0
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#define ES9218_DIG_VOLUME_STEP 5
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#define ES9218_AMP_VOLUME_MIN (-240)
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#define ES9218_AMP_VOLUME_MAX 0
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#define ES9218_AMP_VOLUME_STEP 10
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AUDIOHW_SETTING(VOLUME, "dB", 1, ES9218_DIG_VOLUME_STEP,
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ES9218_DIG_VOLUME_MIN, ES9218_DIG_VOLUME_MAX, -200)
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AUDIOHW_SETTING(FILTER_ROLL_OFF, "", 0, 1, 0, 7, 0)
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AUDIOHW_SETTING(POWER_MODE, "", 0, 1, 0, 1, 0)
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/* Register addresses */
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#define ES9218_REG_SYSTEM 0x00
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#define ES9218_REG_INPUT_SEL 0x01
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#define ES9218_REG_MIX_AUTOMUTE 0x02
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#define ES9218_REG_ANALOG_VOL 0x03
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#define ES9218_REG_AUTOMUTE_TIME 0x04
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#define ES9218_REG_AUTOMUTE_LEVEL 0x05
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#define ES9218_REG_DOP_VOLUME_RAMP 0x06
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#define ES9218_REG_FILTER_SYS_MUTE 0x07
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#define ES9218_REG_GPIO1_2_CONFIG 0x08
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#define ES9218_REG_RESERVED_1 0x09
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#define ES9218_REG_MASTER_MODE_CONFIG 0x0a
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#define ES9218_REG_OVERCURRENT_PROT 0x0b
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#define ES9218_REG_ASRC_DPLL_BANDWIDTH 0x0c
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#define ES9218_REG_THD_COMP_BYPASS 0x0d
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#define ES9218_REG_SOFT_START_CONFIG 0x0e
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#define ES9218_REG_VOLUME_LEFT 0x0f
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#define ES9218_REG_VOLUME_RIGHT 0x10
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#define ES9218_REG_MASTER_TRIM_BIT0_7 0x11
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#define ES9218_REG_MASTER_TRIM_BIT8_15 0x12
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#define ES9218_REG_MASTER_TRIM_BIT16_23 0x13
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#define ES9218_REG_MASTER_TRIM_BIT24_31 0x14
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#define ES9218_REG_GPIO_INPUT_SEL 0x15
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#define ES9218_REG_THD_COMP_C2_LO 0x16
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#define ES9218_REG_THD_COMP_C2_HI 0x17
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#define ES9218_REG_THD_COMP_C3_LO 0x18
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#define ES9218_REG_THD_COMP_C3_HI 0x19
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#define ES9218_REG_CHARGE_PUMP_SS_DELAY 0x1a
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#define ES9218_REG_GENERAL_CONFIG 0x1b
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#define ES9218_REG_RESERVED_2 0x1c
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#define ES9218_REG_GPIO_INV_CLOCK_GEAR 0x1d
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#define ES9218_REG_CHARGE_PUMP_CLK_LO 0x1e
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#define ES9218_REG_CHARGE_PUMP_CLK_HI 0x1f
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#define ES9218_REG_AMP_CONFIG 0x20
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#define ES9218_REG_INTERRUPT_MASK 0x21
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#define ES9218_REG_PROG_NCO_BIT0_7 0x22
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#define ES9218_REG_PROG_NCO_BIT8_15 0x23
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#define ES9218_REG_PROG_NCO_BIT16_23 0x24
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#define ES9218_REG_PROG_NCO_BIT24_31 0x25
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#define ES9218_REG_RESERVED_3 0x27
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#define ES9218_REG_FIR_RAM_ADDR 0x28
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#define ES9218_REG_FIR_DATA_BIT0_7 0x29
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#define ES9218_REG_FIR_DATA_BIT8_15 0x2a
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#define ES9218_REG_FIR_DATA_BIT16_23 0x2b
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#define ES9218_REG_PROG_FIR_CONFIG 0x2c
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#define ES9218_REG_ANALOG_OVERRIDE_1 0x2d
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#define ES9218_REG_ANALOG_OVERRIDE_2 0x2e
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#define ES9218_REG_ANALOG_OVERRIDE_3 0x2f
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#define ES9218_REG_ANALOG_CTRL 0x30
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#define ES9218_REG_CLKGEAR_CFG_BIT0_7 0x31
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#define ES9218_REG_CLKGEAR_CFG_BIT8_15 0x32
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#define ES9218_REG_CLKGEAR_CFG_BIT16_23 0x33
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#define ES9218_REG_RESERVED_4 0x34
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#define ES9218_REG_THD_COMP_C2_CH2_LO 0x35
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#define ES9218_REG_THD_COMP_C2_CH2_HI 0x36
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#define ES9218_REG_THD_COMP_C3_CH2_LO 0x37
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#define ES9218_REG_THD_COMP_C3_CH2_HI 0x38
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#define ES9218_REG_RESERVED_5 0x39
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#define ES9218_REG_RESERVED_6 0x3a
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#define ES9218_REG_RESERVED_7 0x3b
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#define ES9218_REG_RESERVED_8 0x3c
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#define ES9218_REG_CHIP_ID_AND_STATUS 0x40
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#define ES9218_REG_GPIO_AND_CLOCK_GEAR 0x41
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#define ES9218_REG_DPLL_NUMBER_BIT0_7 0x42
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#define ES9218_REG_DPLL_NUMBER_BIT8_15 0x43
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#define ES9218_REG_DPLL_NUMBER_BIT16_23 0x44
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#define ES9218_REG_DPLL_NUMBER_BIT24_31 0x45
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#define ES9218_REG_INPUT_MUTE_STATUS 0x48
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#define ES9218_REG_FIR_READ_BIT0_7 0x49
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#define ES9218_REG_FIR_READ_BIT8_15 0x4a
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#define ES9218_REG_FIR_READ_BIT16_23 0x4b
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enum es9218_clock_gear {
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ES9218_CLK_GEAR_1 = 0, /* CLK = XI/1 */
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ES9218_CLK_GEAR_2 = 1, /* CLK = XI/2 */
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ES9218_CLK_GEAR_4 = 2, /* CLK = XI/4 */
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ES9218_CLK_GEAR_8 = 3, /* CLK = XI/8 */
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};
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enum es9218_amp_mode {
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ES9218_AMP_MODE_CORE_ON = 0,
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ES9218_AMP_MODE_LOWFI = 1,
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ES9218_AMP_MODE_1VRMS = 2,
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ES9218_AMP_MODE_2VRMS = 3,
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};
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enum es9218_iface_role {
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ES9218_IFACE_ROLE_SLAVE = 0,
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ES9218_IFACE_ROLE_MASTER = 1,
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};
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enum es9218_iface_format {
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ES9218_IFACE_FORMAT_I2S = 0,
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ES9218_IFACE_FORMAT_LJUST = 1,
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ES9218_IFACE_FORMAT_RJUST = 2,
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};
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enum es9218_iface_bits {
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ES9218_IFACE_BITS_16 = 0,
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ES9218_IFACE_BITS_24 = 1,
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ES9218_IFACE_BITS_32 = 2,
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};
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enum es9218_filter_type {
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ES9218_FILTER_LINEAR_FAST = 0,
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ES9218_FILTER_LINEAR_SLOW = 1,
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ES9218_FILTER_MINIMUM_FAST = 2,
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ES9218_FILTER_MINIMUM_SLOW = 3,
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ES9218_FILTER_APODIZING_1 = 4,
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ES9218_FILTER_APODIZING_2 = 5,
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ES9218_FILTER_HYBRID_FAST = 6,
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ES9218_FILTER_BRICK_WALL = 7,
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};
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/* Power DAC on or off */
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extern void es9218_open(void);
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extern void es9218_close(void);
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/* Clock controls
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*
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* - Clock gear divides the input master clock to produce the DAC's clock.
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* Frequency can be lowered to save power when using lower sample rates.
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*
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* - NCO (numerically controller oscillator), according to the datasheet,
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* defines the ratio between the DAC's clock and the FSR (for PCM modes,
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* this is I2S frame clock = sample rate). In master mode it effectively
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* controls the sampling frequency by setting the I2S frame clock output.
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* It can also be used in slave mode, but other parts of the datasheet
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* say contradictory things about synchronous operation in slave mode.
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*
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* - If using NCO mode and a varying MCLK input (eg. input from the SoC) then
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* you will need to call es9218_recompute_nco() when changing MCLK in order
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* to refresh the NCO setting.
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*/
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extern void es9218_set_clock_gear(enum es9218_clock_gear gear);
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extern void es9218_set_nco_frequency(uint32_t fsr);
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extern void es9218_recompute_nco(void);
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/* Amplifier controls */
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extern void es9218_set_amp_mode(enum es9218_amp_mode mode);
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extern void es9218_set_amp_powered(bool en);
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/* Interface selection */
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extern void es9218_set_iface_role(enum es9218_iface_role role);
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extern void es9218_set_iface_format(enum es9218_iface_format fmt,
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enum es9218_iface_bits bits);
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/* Volume controls, all volumes given in units of dB/10 */
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extern void es9218_set_dig_volume(int vol_l, int vol_r);
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extern void es9218_set_amp_volume(int vol);
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/* System mute */
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extern void es9218_mute(bool muted);
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/* Oversampling filter */
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extern void es9218_set_filter(enum es9218_filter_type filt);
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/* Automute settings */
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extern void es9218_set_automute_time(int time);
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extern void es9218_set_automute_level(int dB);
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extern void es9218_set_automute_fast_mode(bool en);
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/* DPLL bandwidth setting (knob = 0-15) */
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extern void es9218_set_dpll_bandwidth(int knob);
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/* THD compensation */
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extern void es9218_set_thd_compensation(bool en);
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extern void es9218_set_thd_coeffs(uint16_t c2, uint16_t c3);
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/* Direct register read/write/update operations */
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extern int es9218_read(int reg);
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extern void es9218_write(int reg, uint8_t val);
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extern void es9218_update(int reg, uint8_t msk, uint8_t val);
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/* GPIO pin setting callbacks */
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extern void es9218_set_power_pin(int level);
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extern void es9218_set_reset_pin(int level);
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/* XI(MCLK) getter -- supplied by the target.
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*
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* Note: when changing the supplied MCLK frequency, the NCO will need to be
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* reprogrammed for the new master clock. Call es9218_recompute_nco() to
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* force this. Not necessary if you're not using NCO mode.
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*/
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extern uint32_t es9218_get_mclk(void);
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#endif /* __ES9218_H__ */
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