146 lines
4.4 KiB
C
146 lines
4.4 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 by Maurus Cuelenaere
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __SYSTEM_TARGET_H_
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#define __SYSTEM_TARGET_H_
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#include <inttypes.h>
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#include "config.h"
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#include "cpu.h"
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#include "mipsregs.h"
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#define CACHE_SIZE 16*1024
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#define CACHE_LINE_SIZE 32
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#include "mmu-mips.h"
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#define CFG_UART_BASE UART1_BASE /* Base of the UART channel */
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/* no optimized byteswap functions implemented for mips, yet */
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#define NEED_GENERIC_BYTESWAPS
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#define STORAGE_WANTS_ALIGN
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/* This one returns the old status */
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static inline int set_interrupt_status(int status, int mask)
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{
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unsigned int res, oldstatus;
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res = oldstatus = read_c0_status();
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res &= ~mask;
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res |= (status & mask);
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write_c0_status(res);
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return oldstatus;
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}
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static inline void enable_interrupt(void)
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{
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/* Set IE bit */
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set_c0_status(ST0_IE);
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}
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static inline void disable_interrupt(void)
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{
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/* Clear IE bit */
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clear_c0_status(ST0_IE);
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}
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static inline int disable_interrupt_save(int mask)
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{
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return set_interrupt_status(0, mask);
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}
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static inline void restore_interrupt(int status)
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{
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write_c0_status(status);
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}
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#define disable_irq() disable_interrupt()
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#define enable_irq() enable_interrupt()
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#define HIGHEST_IRQ_LEVEL 0
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#define set_irq_level(status) set_interrupt_status((status), ST0_IE)
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#define disable_irq_save() disable_interrupt_save(ST0_IE)
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#define restore_irq(c0_status) restore_interrupt(c0_status)
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#define UNCACHED_ADDRESS(addr) ((unsigned int)(addr) | 0xA0000000)
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#define UNCACHED_ADDR(x) UNCACHED_ADDRESS((x))
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#define PHYSADDR(x) ((x) & 0x1fffffff)
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#define VIRTADDR(x) ((x) | 0xA0000000)
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void system_enable_irq(unsigned int irq);
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void udelay(unsigned int usec);
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void mdelay(unsigned int msec);
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void dma_enable(void);
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void dma_disable(void);
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#if CONFIG_CPU == JZ4732
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#define DMA_AIC_TX_CHANNEL 0
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#define DMA_NAND_CHANNEL 1
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#define DMA_USB_CHANNEL 2
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#define DMA_LCD_CHANNEL 3
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#elif CONFIG_CPU == JZ4760B
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#define DMA_AIC_TX_CHANNEL 0
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#define DMA_USB_CHANNEL 1
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// Note: channel 5 and 11 cannot be used!
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#define DMA_SD_RX_CHANNEL0 6
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#define DMA_SD_RX_CHANNEL1 7
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#define DMA_SD_TX_CHANNEL0 8
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#define DMA_SD_TX_CHANNEL1 9
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#define DMA_NAND_CHANNEL 10
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#define DMA_SD_RX_CHANNEL(n) 6+n
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#define DMA_SD_TX_CHANNEL(n) 8+n
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#endif
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#define XDMA_CALLBACK(n) DMA ## n
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#define DMA_CALLBACK(n) XDMA_CALLBACK(n)
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#define DMA_IRQ(n) (IRQ_DMA_0 + (n))
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#define GPIO_IRQ(n) (IRQ_GPIO_0 + (n))
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/*---------------------------------------------------------------------------
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* Put core in a power-saving state.
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*---------------------------------------------------------------------------
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*/
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static inline void core_sleep(void)
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{
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#if CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B
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__cpm_idle_mode();
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#endif
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asm volatile(
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".set push \n"
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".set mips32r2 \n"
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".set noreorder \n"
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"mfc0 $8, $12 \n" /* mfc t0, $12 */
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"move $9, $8 \n" /* move t1, t0 */
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"la $10, 0x8000000 \n" /* la t2, 0x8000000 */
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"or $8, $8, $10 \n" /* Enable reduced power mode */
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"mtc0 $8, $12 \n" /* mtc t0, $12 */
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"wait \n"
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"mtc0 $9, $12 \n" /* mtc t1, $12 */
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".set pop \n"
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::: "t0", "t1", "t2"
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);
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enable_irq();
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}
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#endif /* __SYSTEM_TARGET_H_ */
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