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@ -37,6 +37,10 @@ Conversely, registers that are just read from must not be passed as inputs.
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The following chart shows all the instruction forms supported by Mu, along with
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the SubX instruction they're translated to.
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<span class="muComment">## Integer instructions</span>
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These instructions use the general-purpose registers.
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var/<span class="Constant">eax</span> <span class="SpecialChar"><-</span> increment => <span class="Constant">"40/increment-eax"</span>
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var/<span class="Constant">ecx</span> <span class="SpecialChar"><-</span> increment => <span class="Constant">"41/increment-ecx"</span>
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var/<span class="Constant">edx</span> <span class="SpecialChar"><-</span> increment => <span class="Constant">"42/increment-edx"</span>
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@ -150,11 +154,10 @@ compare *var/reg, n => <span class="Constant">"81 7/subop/
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var/reg <span class="SpecialChar"><-</span> multiply var2 => <span class="Constant">"0f af/multiply *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span>
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var/reg <span class="SpecialChar"><-</span> multiply *var2/reg2 => <span class="Constant">"0f af/multiply *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span>
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<span class="muComment"># Floating-point operations</span>
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<span class="muComment">## Floating-point operations</span>
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All the instructions so far use Intel's general-purpose integer registers.
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However, some of them translate to different SubX if their arguments are in
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floating-point registers.
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These instructions operate on either floating-point registers (xreg) or
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general-purpose registers (reg) in indirect mode.
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var/xreg <span class="SpecialChar"><-</span> add var2/xreg2 => <span class="Constant">"f3 0f 58/add %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span>
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var/xreg <span class="SpecialChar"><-</span> add var2 => <span class="Constant">"f3 0f 58/add *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span>
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@ -13,6 +13,10 @@ Conversely, registers that are just read from must not be passed as inputs.
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The following chart shows all the instruction forms supported by Mu, along with
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the SubX instruction they're translated to.
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## Integer instructions
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These instructions use the general-purpose registers.
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var/eax <- increment => "40/increment-eax"
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var/ecx <- increment => "41/increment-ecx"
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var/edx <- increment => "42/increment-edx"
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@ -126,11 +130,10 @@ compare *var/reg, n => "81 7/subop/compare *" reg " " n "/imm32"
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var/reg <- multiply var2 => "0f af/multiply *(ebp+" var2.stack-offset ") " reg "/r32"
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var/reg <- multiply *var2/reg2 => "0f af/multiply *" reg2 " " reg "/r32"
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# Floating-point operations
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## Floating-point operations
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All the instructions so far use Intel's general-purpose integer registers.
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However, some of them translate to different SubX if their arguments are in
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floating-point registers.
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These instructions operate on either floating-point registers (xreg) or
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general-purpose registers (reg) in indirect mode.
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var/xreg <- add var2/xreg2 => "f3 0f 58/add %" xreg2 " " xreg1 "/x32"
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var/xreg <- add var2 => "f3 0f 58/add *(ebp+" var2.stack-offset ") " xreg "/x32"
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