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This commit is contained in:
Kartik K. Agaram 2017-10-13 01:13:33 -07:00
parent ce31518788
commit 8745e7456a
3 changed files with 111 additions and 0 deletions
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21
subx/011direct_addressing.cc
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@ -104,3 +104,24 @@ case 0x09: { // or r32 with r/m32
BINARY_BITWISE_OP(|, *arg1, Reg[arg2].u);
break;
}
//:: xor
:(scenario xor_r32_with_r32)
% Reg[0].i = 0x0a0b0c0d;
% Reg[3].i = 0xaabbc0d0;
# op ModR/M SIB displacement immediate
31 d8 # xor EBX (reg 3) with destination EAX (reg 0)
+run: xor reg 3 with effective address
+run: effective address is reg 0
+run: storing 0xa0b0ccdd
:(before "End Single-Byte Opcodes")
case 0x31: { // xor r32 with r/m32
uint8_t modrm = next();
uint8_t arg2 = (modrm>>3)&0x7;
trace(2, "run") << "xor reg " << NUM(arg2) << " with effective address" << end();
int32_t* arg1 = effective_address(modrm);
BINARY_BITWISE_OP(^, *arg1, Reg[arg2].u);
break;
}

40
subx/012indirect_addressing.cc
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@ -156,3 +156,43 @@ case 0x0b: { // or r/m32 with r32
BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
break;
}
//:: xor
:(scenario xor_r32_with_mem_at_r32)
% Reg[0].i = 0x60;
% Mem.at(0x60) = 0x0d;
% Mem.at(0x61) = 0x0c;
% Mem.at(0x62) = 0xbb;
% Mem.at(0x63) = 0xaa;
% Reg[3].i = 0xa0b0c0d0;
# op ModRM SIB displacement immediate
31 18 # xor EBX (reg 3) with *EAX (reg 0)
+run: xor reg 3 with effective address
+run: effective address is mem at address 0x60 (reg 0)
+run: storing 0x0a0bccdd
//:
:(scenario xor_mem_at_r32_with_r32)
% Reg[0].i = 0x60;
% Mem.at(0x60) = 0x0d;
% Mem.at(0x61) = 0x0c;
% Mem.at(0x62) = 0x0b;
% Mem.at(0x63) = 0x0a;
% Reg[3].i = 0xa0b0c0d0;
# op ModRM SIB displacement immediate
33 18 # xor *EAX (reg 0) with EBX (reg 3)
+run: xor effective address with reg 3
+run: effective address is mem at address 0x60 (reg 0)
+run: storing 0xaabbccdd
:(before "End Single-Byte Opcodes")
case 0x33: { // xor r/m32 with r32
uint8_t modrm = next();
uint8_t arg1 = (modrm>>3)&0x7;
trace(2, "run") << "xor effective address with reg " << NUM(arg1) << end();
const int32_t* arg2 = effective_address(modrm);
BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
break;
}

50
subx/013immediate_addressing.cc
View File

@ -184,3 +184,53 @@ case 1: {
BINARY_BITWISE_OP(|, *arg1, arg2);
break;
}
//:: xor
:(scenario xor_imm32_with_eax)
% Reg[EAX].i = 0xddccb0a0;
# op ModR/M SIB displacement immediate
35 0a 0b 0c 0d # xor 0x0d0c0b0a with EAX (reg 0)
+run: xor imm32 0x0d0c0b0a with reg EAX
+run: storing 0xd0c0bbaa
:(before "End Single-Byte Opcodes")
case 0x35: { // xor imm32 with EAX
int32_t arg2 = imm32();
trace(2, "run") << "xor imm32 0x" << HEXWORD << arg2 << " with reg EAX" << end();
BINARY_BITWISE_OP(^, Reg[EAX].i, arg2);
break;
}
//:
:(scenario xor_imm32_with_mem_at_r32)
% Reg[3].i = 0x60;
% Mem.at(0x60) = 0xa0;
% Mem.at(0x61) = 0xb0;
% Mem.at(0x62) = 0xc0;
% Mem.at(0x63) = 0xd0;
# op ModRM SIB displacement immediate
81 33 0a 0b 0c 0d # xor 0x0d0c0b0a with *EBX (reg 3)
+run: combine imm32 0x0d0c0b0a with effective address
+run: effective address is mem at address 0x60 (reg 3)
+run: subop xor
+run: storing 0xddccbbaa
//:
:(scenario xor_imm32_with_r32)
% Reg[3].i = 0xd0c0b0a0;
# op ModRM SIB displacement immediate
81 f3 0a 0b 0c 0d # xor 0x0d0c0b0a with EBX (reg 3)
+run: combine imm32 0x0d0c0b0a with effective address
+run: effective address is reg 3
+run: subop xor
+run: storing 0xddccbbaa
:(before "End Op 81 Subops")
case 6: {
trace(2, "run") << "subop xor" << end();
BINARY_BITWISE_OP(^, *arg1, arg2);
break;
}