mirror of https://github.com/vinc/moros.git
Update x86_64 crate from 0.14.12 to 0.15.0 (#590)
* Bump x86_64 crate from 0.14.12 to 0.15.0 * Update VirtAddr offset type * Replace GDT add_entry by append * Update IDT index type * Update CR2 read type * Use Option<InterruptStackFrameValue> for process stack frame
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@ -317,7 +317,7 @@ dependencies = [
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"time",
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"uart_16550",
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"vte",
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"x86_64",
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"x86_64 0.15.0",
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]
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[[package]]
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@ -397,7 +397,7 @@ version = "0.10.4"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "cb844b5b01db1e0b17938685738f113bfc903846f18932b378bc0eabfa40e194"
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dependencies = [
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"x86_64",
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"x86_64 0.14.12",
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]
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[[package]]
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@ -805,3 +805,15 @@ dependencies = [
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"rustversion",
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"volatile",
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]
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[[package]]
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name = "x86_64"
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version = "0.15.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "cd9b58dbbd61248db1d7d5b7068fbe91b042e889361fe79fb4fd16a12daa66d3"
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dependencies = [
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"bit_field",
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"bitflags 2.4.1",
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"rustversion",
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"volatile",
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]
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@ -41,7 +41,7 @@ spin = "0.9.8"
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time = { version = "0.2.27", default-features = false }
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uart_16550 = "0.3.0"
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vte = "0.13.0"
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x86_64 = "0.14.12"
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x86_64 = "0.15.0"
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[package.metadata.bootloader]
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physical-memory-offset = "0xFFFF800000000000"
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@ -17,19 +17,19 @@ lazy_static! {
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let mut tss = TaskStateSegment::new();
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tss.privilege_stack_table[0] = {
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static mut STACK: [u8; STACK_SIZE] = [0; STACK_SIZE];
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VirtAddr::from_ptr(unsafe { &STACK }) + STACK_SIZE
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VirtAddr::from_ptr(unsafe { &STACK }) + STACK_SIZE as u64
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};
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tss.interrupt_stack_table[DOUBLE_FAULT_IST as usize] = {
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static mut STACK: [u8; STACK_SIZE] = [0; STACK_SIZE];
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VirtAddr::from_ptr(unsafe { &STACK }) + STACK_SIZE
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VirtAddr::from_ptr(unsafe { &STACK }) + STACK_SIZE as u64
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};
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tss.interrupt_stack_table[PAGE_FAULT_IST as usize] = {
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static mut STACK: [u8; STACK_SIZE] = [0; STACK_SIZE];
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VirtAddr::from_ptr(unsafe { &STACK }) + STACK_SIZE
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VirtAddr::from_ptr(unsafe { &STACK }) + STACK_SIZE as u64
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};
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tss.interrupt_stack_table[GENERAL_PROTECTION_FAULT_IST as usize] = {
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static mut STACK: [u8; STACK_SIZE] = [0; STACK_SIZE];
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VirtAddr::from_ptr(unsafe { &STACK }) + STACK_SIZE
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VirtAddr::from_ptr(unsafe { &STACK }) + STACK_SIZE as u64
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};
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tss
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};
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@ -39,11 +39,11 @@ lazy_static! {
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pub static ref GDT: (GlobalDescriptorTable, Selectors) = {
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let mut gdt = GlobalDescriptorTable::new();
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let tss = gdt.add_entry(Descriptor::tss_segment(&TSS));
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let code = gdt.add_entry(Descriptor::kernel_code_segment());
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let data = gdt.add_entry(Descriptor::kernel_data_segment());
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let user_code = gdt.add_entry(Descriptor::user_code_segment());
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let user_data = gdt.add_entry(Descriptor::user_data_segment());
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let tss = gdt.append(Descriptor::tss_segment(&TSS));
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let code = gdt.append(Descriptor::kernel_code_segment());
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let data = gdt.append(Descriptor::kernel_data_segment());
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let user_code = gdt.append(Descriptor::user_code_segment());
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let user_data = gdt.append(Descriptor::user_data_segment());
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(
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gdt,
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@ -55,22 +55,22 @@ lazy_static! {
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set_handler_fn(core::mem::transmute(f)).
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set_privilege_level(x86_64::PrivilegeLevel::Ring3);
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}
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idt[interrupt_index(0) as usize].set_handler_fn(irq0_handler);
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idt[interrupt_index(1) as usize].set_handler_fn(irq1_handler);
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idt[interrupt_index(2) as usize].set_handler_fn(irq2_handler);
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idt[interrupt_index(3) as usize].set_handler_fn(irq3_handler);
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idt[interrupt_index(4) as usize].set_handler_fn(irq4_handler);
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idt[interrupt_index(5) as usize].set_handler_fn(irq5_handler);
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idt[interrupt_index(6) as usize].set_handler_fn(irq6_handler);
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idt[interrupt_index(7) as usize].set_handler_fn(irq7_handler);
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idt[interrupt_index(8) as usize].set_handler_fn(irq8_handler);
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idt[interrupt_index(9) as usize].set_handler_fn(irq9_handler);
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idt[interrupt_index(10) as usize].set_handler_fn(irq10_handler);
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idt[interrupt_index(11) as usize].set_handler_fn(irq11_handler);
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idt[interrupt_index(12) as usize].set_handler_fn(irq12_handler);
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idt[interrupt_index(13) as usize].set_handler_fn(irq13_handler);
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idt[interrupt_index(14) as usize].set_handler_fn(irq14_handler);
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idt[interrupt_index(15) as usize].set_handler_fn(irq15_handler);
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idt[interrupt_index(0)].set_handler_fn(irq0_handler);
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idt[interrupt_index(1)].set_handler_fn(irq1_handler);
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idt[interrupt_index(2)].set_handler_fn(irq2_handler);
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idt[interrupt_index(3)].set_handler_fn(irq3_handler);
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idt[interrupt_index(4)].set_handler_fn(irq4_handler);
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idt[interrupt_index(5)].set_handler_fn(irq5_handler);
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idt[interrupt_index(6)].set_handler_fn(irq6_handler);
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idt[interrupt_index(7)].set_handler_fn(irq7_handler);
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idt[interrupt_index(8)].set_handler_fn(irq8_handler);
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idt[interrupt_index(9)].set_handler_fn(irq9_handler);
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idt[interrupt_index(10)].set_handler_fn(irq10_handler);
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idt[interrupt_index(11)].set_handler_fn(irq11_handler);
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idt[interrupt_index(12)].set_handler_fn(irq12_handler);
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idt[interrupt_index(13)].set_handler_fn(irq13_handler);
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idt[interrupt_index(14)].set_handler_fn(irq14_handler);
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idt[interrupt_index(15)].set_handler_fn(irq15_handler);
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idt
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};
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}
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@ -127,7 +127,7 @@ extern "x86-interrupt" fn page_fault_handler(
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error_code: PageFaultErrorCode,
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) {
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//debug!("EXCEPTION: PAGE FAULT ({:?})", error_code);
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let addr = Cr2::read().as_u64();
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let addr = Cr2::read().unwrap().as_u64();
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let page_table = unsafe { sys::process::page_table() };
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let phys_mem_offset = unsafe { sys::mem::PHYS_MEM_OFFSET.unwrap() };
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@ -213,13 +213,13 @@ pub fn set_registers(regs: Registers) {
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pub fn stack_frame() -> InterruptStackFrameValue {
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let table = PROCESS_TABLE.read();
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let proc = &table[id()];
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proc.stack_frame
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proc.stack_frame.unwrap()
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}
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pub fn set_stack_frame(stack_frame: InterruptStackFrameValue) {
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let mut table = PROCESS_TABLE.write();
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let proc = &mut table[id()];
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proc.stack_frame = stack_frame;
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proc.stack_frame = Some(stack_frame);
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}
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pub fn exit() {
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@ -286,7 +286,7 @@ pub struct Process {
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stack_addr: u64,
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entry_point_addr: u64,
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page_table_frame: PhysFrame,
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stack_frame: InterruptStackFrameValue,
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stack_frame: Option<InterruptStackFrameValue>,
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registers: Registers,
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data: ProcessData,
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allocator: Arc<LockedHeap>,
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@ -294,20 +294,13 @@ pub struct Process {
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impl Process {
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pub fn new() -> Self {
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let isf = InterruptStackFrameValue {
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instruction_pointer: VirtAddr::new(0),
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code_segment: 0,
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cpu_flags: 0,
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stack_pointer: VirtAddr::new(0),
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stack_segment: 0,
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};
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Self {
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id: 0,
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parent_id: 0,
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code_addr: 0,
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stack_addr: 0,
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entry_point_addr: 0,
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stack_frame: isf,
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stack_frame: None,
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page_table_frame: Cr3::read().0,
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registers: Registers::default(),
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data: ProcessData::new("/", None),
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