2017-10-13 06:38:02 +00:00
|
|
|
//: operating directly on a register
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "01", "add r32 to rm32");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-13 06:38:02 +00:00
|
|
|
:(scenario add_r32_to_r32)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EAX].i = 0x10;
|
|
|
|
% Reg[EBX].i = 1;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2017-10-13 06:38:02 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
01 d8 # add EBX to EAX
|
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: add EBX to r/m32
|
|
|
|
+run: r/m32 is EAX
|
2017-10-13 06:38:02 +00:00
|
|
|
+run: storing 0x00000011
|
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
|
|
|
case 0x01: { // add r32 to r/m32
|
|
|
|
uint8_t modrm = next();
|
|
|
|
uint8_t arg2 = (modrm>>3)&0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "add " << rname(arg2) << " to r/m32" << end();
|
2017-10-13 06:38:02 +00:00
|
|
|
int32_t* arg1 = effective_address(modrm);
|
|
|
|
BINARY_ARITHMETIC_OP(+, *arg1, Reg[arg2].i);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
:(code)
|
|
|
|
// Implement tables 2-2 and 2-3 in the Intel manual, Volume 2.
|
|
|
|
// We return a pointer so that instructions can write to multiple bytes in
|
|
|
|
// 'Mem' at once.
|
|
|
|
int32_t* effective_address(uint8_t modrm) {
|
|
|
|
uint8_t mod = (modrm>>6);
|
|
|
|
// ignore middle 3 'reg opcode' bits
|
|
|
|
uint8_t rm = modrm & 0x7;
|
2018-01-25 06:43:05 +00:00
|
|
|
uint32_t addr = 0;
|
2017-10-13 06:38:02 +00:00
|
|
|
switch (mod) {
|
|
|
|
case 3:
|
|
|
|
// mod 3 is just register direct addressing
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "r/m32 is " << rname(rm) << end();
|
2018-01-25 06:43:05 +00:00
|
|
|
return &Reg[rm].i;
|
|
|
|
// End Mod Special-cases(addr)
|
2017-10-13 06:38:02 +00:00
|
|
|
default:
|
|
|
|
cerr << "unrecognized mod bits: " << NUM(mod) << '\n';
|
|
|
|
exit(1);
|
|
|
|
}
|
2018-01-25 06:43:05 +00:00
|
|
|
//: other mods are indirect, and they'll set addr appropriately
|
2018-07-09 05:33:15 +00:00
|
|
|
return mem_addr_i32(addr);
|
2017-10-13 06:38:02 +00:00
|
|
|
}
|
|
|
|
|
2018-07-16 05:59:02 +00:00
|
|
|
string rname(uint8_t r) {
|
|
|
|
switch (r) {
|
|
|
|
case 0: return "EAX";
|
|
|
|
case 1: return "ECX";
|
|
|
|
case 2: return "EDX";
|
|
|
|
case 3: return "EBX";
|
|
|
|
case 4: return "ESP";
|
|
|
|
case 5: return "EBP";
|
|
|
|
case 6: return "ESI";
|
|
|
|
case 7: return "EDI";
|
|
|
|
default: raise << "invalid register " << r << '\n' << end(); return "";
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-10-13 06:38:02 +00:00
|
|
|
//:: subtract
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "29", "subtract r32 from rm32");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-13 06:38:02 +00:00
|
|
|
:(scenario subtract_r32_from_r32)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EAX].i = 10;
|
|
|
|
% Reg[EBX].i = 1;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2017-10-13 06:38:02 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
29 d8 # subtract EBX from EAX
|
2018-01-24 20:59:14 +00:00
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: subtract EBX from r/m32
|
|
|
|
+run: r/m32 is EAX
|
2017-10-13 06:38:02 +00:00
|
|
|
+run: storing 0x00000009
|
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
|
|
|
case 0x29: { // subtract r32 from r/m32
|
|
|
|
uint8_t modrm = next();
|
|
|
|
uint8_t arg2 = (modrm>>3)&0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "subtract " << rname(arg2) << " from r/m32" << end();
|
2017-10-13 06:38:02 +00:00
|
|
|
int32_t* arg1 = effective_address(modrm);
|
|
|
|
BINARY_ARITHMETIC_OP(-, *arg1, Reg[arg2].i);
|
|
|
|
break;
|
|
|
|
}
|
2017-10-13 07:54:59 +00:00
|
|
|
|
2018-07-30 16:56:53 +00:00
|
|
|
//:: multiply
|
|
|
|
|
2018-09-08 05:13:10 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
|
|
|
put(name, "f7", "test/negate/mul/div rm32 (with EAX if necessary) depending on subop");
|
|
|
|
|
|
|
|
:(scenario multiply_eax_by_r32)
|
|
|
|
% Reg[EAX].i = 4;
|
|
|
|
% Reg[ECX].i = 3;
|
|
|
|
== 0x1
|
|
|
|
# op ModR/M SIB displacement immediate
|
|
|
|
f7 e1 # multiply EAX by ECX
|
|
|
|
# ModR/M in binary: 11 (direct mode) 100 (subop mul) 001 (src ECX)
|
|
|
|
+run: operate on r/m32
|
|
|
|
+run: r/m32 is ECX
|
|
|
|
+run: subop: multiply EAX by r/m32
|
|
|
|
+run: storing 0x0000000c
|
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
|
|
|
case 0xf7: { // xor r32 with r/m32
|
|
|
|
uint8_t modrm = next();
|
|
|
|
trace(90, "run") << "operate on r/m32" << end();
|
|
|
|
int32_t* arg1 = effective_address(modrm);
|
|
|
|
uint8_t subop = (modrm>>3)&0x7; // middle 3 'reg opcode' bits
|
|
|
|
switch (subop) {
|
|
|
|
case 4: { // mul unsigned EAX by r/m32
|
|
|
|
trace(90, "run") << "subop: multiply EAX by r/m32" << end();
|
|
|
|
uint64_t result = Reg[EAX].u * static_cast<uint32_t>(*arg1);
|
|
|
|
Reg[EAX].u = result & 0xffffffff;
|
|
|
|
Reg[EDX].u = result >> 32;
|
|
|
|
OF = (Reg[EDX].u != 0);
|
|
|
|
trace(90, "run") << "storing 0x" << HEXWORD << Reg[EAX].u << end();
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
// End Op f7 Subops
|
|
|
|
default:
|
|
|
|
cerr << "unrecognized sub-opcode after f7: " << NUM(subop) << '\n';
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
//:
|
|
|
|
|
2018-07-30 16:56:53 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-30 18:41:00 +00:00
|
|
|
put(name_0f, "af", "multiply rm32 into r32");
|
2018-07-30 16:56:53 +00:00
|
|
|
|
|
|
|
:(scenario multiply_r32_into_r32)
|
|
|
|
% Reg[EAX].i = 4;
|
|
|
|
% Reg[EBX].i = 2;
|
|
|
|
== 0x1
|
|
|
|
# op ModR/M SIB displacement immediate
|
|
|
|
0f af d8 # subtract EBX into EAX
|
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-07-30 18:41:00 +00:00
|
|
|
+run: multiply r/m32 into EBX
|
2018-07-30 16:56:53 +00:00
|
|
|
+run: r/m32 is EAX
|
|
|
|
+run: storing 0x00000008
|
|
|
|
|
|
|
|
:(before "End Two-Byte Opcodes Starting With 0f")
|
|
|
|
case 0xaf: { // multiply r32 into r/m32
|
|
|
|
uint8_t modrm = next();
|
|
|
|
uint8_t arg2 = (modrm>>3)&0x7;
|
2018-07-30 18:41:00 +00:00
|
|
|
trace(90, "run") << "multiply r/m32 into " << rname(arg2) << end();
|
2018-07-30 16:56:53 +00:00
|
|
|
int32_t* arg1 = effective_address(modrm);
|
2018-07-30 18:23:23 +00:00
|
|
|
BINARY_ARITHMETIC_OP(*, Reg[arg2].i, *arg1);
|
2018-07-30 16:56:53 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2017-10-13 07:54:59 +00:00
|
|
|
//:: and
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "21", "rm32 = bitwise AND of r32 with rm32");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-13 07:54:59 +00:00
|
|
|
:(scenario and_r32_with_r32)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EAX].i = 0x0a0b0c0d;
|
|
|
|
% Reg[EBX].i = 0x000000ff;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2017-10-13 07:54:59 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
21 d8 # and EBX with destination EAX
|
2018-01-24 20:59:14 +00:00
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: and EBX with r/m32
|
|
|
|
+run: r/m32 is EAX
|
2017-10-13 07:54:59 +00:00
|
|
|
+run: storing 0x0000000d
|
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
|
|
|
case 0x21: { // and r32 with r/m32
|
|
|
|
uint8_t modrm = next();
|
|
|
|
uint8_t arg2 = (modrm>>3)&0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "and " << rname(arg2) << " with r/m32" << end();
|
2017-10-13 07:54:59 +00:00
|
|
|
int32_t* arg1 = effective_address(modrm);
|
|
|
|
BINARY_BITWISE_OP(&, *arg1, Reg[arg2].u);
|
|
|
|
break;
|
|
|
|
}
|
2017-10-13 08:05:53 +00:00
|
|
|
|
|
|
|
//:: or
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "09", "rm32 = bitwise OR of r32 with rm32");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-13 08:05:53 +00:00
|
|
|
:(scenario or_r32_with_r32)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EAX].i = 0x0a0b0c0d;
|
|
|
|
% Reg[EBX].i = 0xa0b0c0d0;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2017-10-13 08:05:53 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
09 d8 # or EBX with destination EAX
|
2018-01-24 20:59:14 +00:00
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: or EBX with r/m32
|
|
|
|
+run: r/m32 is EAX
|
2017-10-13 08:05:53 +00:00
|
|
|
+run: storing 0xaabbccdd
|
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
|
|
|
case 0x09: { // or r32 with r/m32
|
|
|
|
uint8_t modrm = next();
|
|
|
|
uint8_t arg2 = (modrm>>3)&0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "or " << rname(arg2) << " with r/m32" << end();
|
2017-10-13 08:05:53 +00:00
|
|
|
int32_t* arg1 = effective_address(modrm);
|
|
|
|
BINARY_BITWISE_OP(|, *arg1, Reg[arg2].u);
|
|
|
|
break;
|
|
|
|
}
|
2017-10-13 08:13:33 +00:00
|
|
|
|
|
|
|
//:: xor
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "31", "rm32 = bitwise XOR of r32 with rm32");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-13 08:13:33 +00:00
|
|
|
:(scenario xor_r32_with_r32)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EAX].i = 0x0a0b0c0d;
|
|
|
|
% Reg[EBX].i = 0xaabbc0d0;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2017-10-13 08:13:33 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
31 d8 # xor EBX with destination EAX
|
2018-01-24 20:59:14 +00:00
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: xor EBX with r/m32
|
|
|
|
+run: r/m32 is EAX
|
2017-10-13 08:13:33 +00:00
|
|
|
+run: storing 0xa0b0ccdd
|
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
|
|
|
case 0x31: { // xor r32 with r/m32
|
|
|
|
uint8_t modrm = next();
|
|
|
|
uint8_t arg2 = (modrm>>3)&0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "xor " << rname(arg2) << " with r/m32" << end();
|
2017-10-13 08:13:33 +00:00
|
|
|
int32_t* arg1 = effective_address(modrm);
|
|
|
|
BINARY_BITWISE_OP(^, *arg1, Reg[arg2].u);
|
|
|
|
break;
|
|
|
|
}
|
2017-10-13 08:23:55 +00:00
|
|
|
|
|
|
|
//:: not
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "f7", "bitwise complement of rm32");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-13 08:23:55 +00:00
|
|
|
:(scenario not_r32)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EBX].i = 0x0f0f00ff;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2017-10-13 08:23:55 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-09-08 05:13:10 +00:00
|
|
|
f7 d3 # not EBX
|
|
|
|
# ModR/M in binary: 11 (direct mode) 010 (subop not) 011 (dest EBX)
|
|
|
|
+run: operate on r/m32
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: r/m32 is EBX
|
2018-09-08 05:13:10 +00:00
|
|
|
+run: subop: not
|
2017-10-13 08:23:55 +00:00
|
|
|
+run: storing 0xf0f0ff00
|
|
|
|
|
2018-09-08 05:13:10 +00:00
|
|
|
:(before "End Op f7 Subops")
|
|
|
|
case 2: { // not r/m32
|
|
|
|
trace(90, "run") << "subop: not" << end();
|
2017-10-13 08:23:55 +00:00
|
|
|
*arg1 = ~(*arg1);
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "storing 0x" << HEXWORD << *arg1 << end();
|
2017-10-13 08:23:55 +00:00
|
|
|
SF = (*arg1 >> 31);
|
|
|
|
ZF = (*arg1 == 0);
|
|
|
|
OF = false;
|
|
|
|
break;
|
|
|
|
}
|
2017-10-15 05:53:18 +00:00
|
|
|
|
2017-10-15 07:06:37 +00:00
|
|
|
//:: compare (cmp)
|
2017-10-15 05:53:18 +00:00
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-09-17 05:02:31 +00:00
|
|
|
put(name, "39", "compare: set SF if rm32 < r32");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-15 05:53:18 +00:00
|
|
|
:(scenario compare_r32_with_r32_greater)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EAX].i = 0x0a0b0c0d;
|
|
|
|
% Reg[EBX].i = 0x0a0b0c07;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2018-01-24 20:59:14 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
39 d8 # compare EBX with EAX
|
2018-01-24 20:59:14 +00:00
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: compare EBX with r/m32
|
|
|
|
+run: r/m32 is EAX
|
2017-10-15 05:53:18 +00:00
|
|
|
+run: SF=0; ZF=0; OF=0
|
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
2017-10-15 06:33:27 +00:00
|
|
|
case 0x39: { // set SF if r/m32 < r32
|
2017-10-15 05:53:18 +00:00
|
|
|
uint8_t modrm = next();
|
|
|
|
uint8_t reg2 = (modrm>>3)&0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "compare " << rname(reg2) << " with r/m32" << end();
|
2017-10-15 05:53:18 +00:00
|
|
|
int32_t* arg1 = effective_address(modrm);
|
|
|
|
int32_t arg2 = Reg[reg2].i;
|
|
|
|
int32_t tmp1 = *arg1 - arg2;
|
|
|
|
SF = (tmp1 < 0);
|
|
|
|
ZF = (tmp1 == 0);
|
|
|
|
int64_t tmp2 = *arg1 - arg2;
|
|
|
|
OF = (tmp1 != tmp2);
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
|
2017-10-15 05:53:18 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
:(scenario compare_r32_with_r32_lesser)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EAX].i = 0x0a0b0c07;
|
|
|
|
% Reg[EBX].i = 0x0a0b0c0d;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2018-01-24 20:59:14 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
39 d8 # compare EBX with EAX
|
2018-01-24 20:59:14 +00:00
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: compare EBX with r/m32
|
|
|
|
+run: r/m32 is EAX
|
2017-10-15 05:53:18 +00:00
|
|
|
+run: SF=1; ZF=0; OF=0
|
|
|
|
|
|
|
|
:(scenario compare_r32_with_r32_equal)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EAX].i = 0x0a0b0c0d;
|
|
|
|
% Reg[EBX].i = 0x0a0b0c0d;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2018-01-24 20:59:14 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
39 d8 # compare EBX with EAX
|
2018-01-24 20:59:14 +00:00
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: compare EBX with r/m32
|
|
|
|
+run: r/m32 is EAX
|
2017-10-15 05:53:18 +00:00
|
|
|
+run: SF=0; ZF=1; OF=0
|
2017-10-15 07:06:37 +00:00
|
|
|
|
|
|
|
//:: copy (mov)
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "89", "copy r32 to rm32");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-15 07:06:37 +00:00
|
|
|
:(scenario copy_r32_to_r32)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EBX].i = 0xaf;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2018-01-24 20:59:14 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
89 d8 # copy EBX to EAX
|
2018-01-24 20:59:14 +00:00
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: copy EBX to r/m32
|
|
|
|
+run: r/m32 is EAX
|
2017-10-15 07:06:37 +00:00
|
|
|
+run: storing 0x000000af
|
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
|
|
|
case 0x89: { // copy r32 to r/m32
|
|
|
|
uint8_t modrm = next();
|
|
|
|
uint8_t reg2 = (modrm>>3)&0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "copy " << rname(reg2) << " to r/m32" << end();
|
2017-10-15 07:06:37 +00:00
|
|
|
int32_t* arg1 = effective_address(modrm);
|
|
|
|
*arg1 = Reg[reg2].i;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "storing 0x" << HEXWORD << *arg1 << end();
|
2017-10-15 07:06:37 +00:00
|
|
|
break;
|
|
|
|
}
|
2017-10-18 07:57:46 +00:00
|
|
|
|
2017-12-31 07:20:15 +00:00
|
|
|
//:: xchg
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "87", "swap the contents of r32 and rm32");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-12-31 07:20:15 +00:00
|
|
|
:(scenario xchg_r32_with_r32)
|
2018-07-11 05:17:11 +00:00
|
|
|
% Reg[EBX].i = 0xaf;
|
|
|
|
% Reg[EAX].i = 0x2e;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2018-01-24 20:59:14 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
87 d8 # exchange EBX with EAX
|
2018-01-24 20:59:14 +00:00
|
|
|
# ModR/M in binary: 11 (direct mode) 011 (src EBX) 000 (dest EAX)
|
2018-01-25 05:01:47 +00:00
|
|
|
+run: exchange EBX with r/m32
|
|
|
|
+run: r/m32 is EAX
|
|
|
|
+run: storing 0x000000af in r/m32
|
2018-01-24 10:47:49 +00:00
|
|
|
+run: storing 0x0000002e in EBX
|
2017-12-31 07:20:15 +00:00
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
|
|
|
case 0x87: { // exchange r32 with r/m32
|
|
|
|
uint8_t modrm = next();
|
|
|
|
uint8_t reg2 = (modrm>>3)&0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "exchange " << rname(reg2) << " with r/m32" << end();
|
2017-12-31 07:20:15 +00:00
|
|
|
int32_t* arg1 = effective_address(modrm);
|
2018-01-04 07:16:30 +00:00
|
|
|
int32_t tmp = *arg1;
|
2017-12-31 07:20:15 +00:00
|
|
|
*arg1 = Reg[reg2].i;
|
2018-01-04 07:16:30 +00:00
|
|
|
Reg[reg2].i = tmp;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "storing 0x" << HEXWORD << *arg1 << " in r/m32" << end();
|
|
|
|
trace(90, "run") << "storing 0x" << HEXWORD << Reg[reg2].i << " in " << rname(reg2) << end();
|
2017-12-31 07:20:15 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2017-10-18 07:57:46 +00:00
|
|
|
//:: push
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "50", "push R0 (EAX) to stack");
|
|
|
|
put(name, "51", "push R1 (ECX) to stack");
|
|
|
|
put(name, "52", "push R2 (EDX) to stack");
|
|
|
|
put(name, "53", "push R3 (EBX) to stack");
|
|
|
|
put(name, "54", "push R4 (ESP) to stack");
|
|
|
|
put(name, "55", "push R5 (EBP) to stack");
|
|
|
|
put(name, "56", "push R6 (ESI) to stack");
|
|
|
|
put(name, "57", "push R7 (EDI) to stack");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-18 07:57:46 +00:00
|
|
|
:(scenario push_r32)
|
|
|
|
% Reg[ESP].u = 0x64;
|
2017-10-18 09:13:34 +00:00
|
|
|
% Reg[EBX].i = 0x0000000a;
|
2018-07-16 05:59:02 +00:00
|
|
|
== 0x1
|
2018-01-24 20:59:14 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
53 # push EBX to stack
|
|
|
|
+run: push EBX
|
2017-10-18 09:27:56 +00:00
|
|
|
+run: decrementing ESP to 0x00000060
|
2017-10-18 07:57:46 +00:00
|
|
|
+run: pushing value 0x0000000a
|
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
2017-10-18 08:42:51 +00:00
|
|
|
case 0x50:
|
|
|
|
case 0x51:
|
|
|
|
case 0x52:
|
|
|
|
case 0x53:
|
|
|
|
case 0x54:
|
|
|
|
case 0x55:
|
|
|
|
case 0x56:
|
2017-10-18 09:00:44 +00:00
|
|
|
case 0x57: { // push r32 to stack
|
2017-10-18 08:42:51 +00:00
|
|
|
uint8_t reg = op & 0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "push " << rname(reg) << end();
|
2018-07-30 18:23:23 +00:00
|
|
|
//? cerr << "push: " << NUM(reg) << ": " << Reg[reg].u << " => " << Reg[ESP].u << '\n';
|
2017-10-18 09:27:56 +00:00
|
|
|
push(Reg[reg].u);
|
|
|
|
break;
|
|
|
|
}
|
2017-10-18 09:13:34 +00:00
|
|
|
|
|
|
|
//:: pop
|
|
|
|
|
2018-07-21 00:08:55 +00:00
|
|
|
:(before "End Initialize Op Names(name)")
|
2018-07-27 17:15:03 +00:00
|
|
|
put(name, "58", "pop top of stack to R0 (EAX)");
|
|
|
|
put(name, "59", "pop top of stack to R1 (ECX)");
|
|
|
|
put(name, "5a", "pop top of stack to R2 (EDX)");
|
|
|
|
put(name, "5b", "pop top of stack to R3 (EBX)");
|
|
|
|
put(name, "5c", "pop top of stack to R4 (ESP)");
|
|
|
|
put(name, "5d", "pop top of stack to R5 (EBP)");
|
|
|
|
put(name, "5e", "pop top of stack to R6 (ESI)");
|
|
|
|
put(name, "5f", "pop top of stack to R7 (EDI)");
|
2018-07-21 00:08:55 +00:00
|
|
|
|
2017-10-18 09:13:34 +00:00
|
|
|
:(scenario pop_r32)
|
|
|
|
% Reg[ESP].u = 0x60;
|
2018-07-09 05:33:15 +00:00
|
|
|
% write_mem_i32(0x60, 0x0000000a);
|
2018-07-11 05:38:28 +00:00
|
|
|
== 0x1 # code segment
|
2018-01-24 20:59:14 +00:00
|
|
|
# op ModR/M SIB displacement immediate
|
2018-01-24 10:47:49 +00:00
|
|
|
5b # pop stack to EBX
|
2018-07-11 05:38:28 +00:00
|
|
|
== 0x60 # data segment
|
|
|
|
0a 00 00 00 # 0x0a
|
2018-01-24 10:47:49 +00:00
|
|
|
+run: pop into EBX
|
2017-10-18 09:13:34 +00:00
|
|
|
+run: popping value 0x0000000a
|
2017-10-18 09:27:56 +00:00
|
|
|
+run: incrementing ESP to 0x00000064
|
2017-10-18 09:13:34 +00:00
|
|
|
|
|
|
|
:(before "End Single-Byte Opcodes")
|
|
|
|
case 0x58:
|
|
|
|
case 0x59:
|
|
|
|
case 0x5a:
|
|
|
|
case 0x5b:
|
|
|
|
case 0x5c:
|
|
|
|
case 0x5d:
|
|
|
|
case 0x5e:
|
|
|
|
case 0x5f: { // pop stack into r32
|
|
|
|
uint8_t reg = op & 0x7;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "pop into " << rname(reg) << end();
|
2018-07-30 18:23:23 +00:00
|
|
|
//? cerr << "pop from " << Reg[ESP].u << '\n';
|
2017-10-18 09:27:56 +00:00
|
|
|
Reg[reg].u = pop();
|
2018-07-30 18:23:23 +00:00
|
|
|
//? cerr << "=> " << NUM(reg) << ": " << Reg[reg].u << '\n';
|
2017-10-18 09:13:34 +00:00
|
|
|
break;
|
|
|
|
}
|
2017-10-18 09:27:56 +00:00
|
|
|
:(code)
|
|
|
|
uint32_t pop() {
|
2018-07-09 05:33:15 +00:00
|
|
|
uint32_t result = read_mem_u32(Reg[ESP].u);
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "popping value 0x" << HEXWORD << result << end();
|
2017-10-18 09:27:56 +00:00
|
|
|
Reg[ESP].u += 4;
|
2018-07-27 18:55:47 +00:00
|
|
|
trace(90, "run") << "incrementing ESP to 0x" << HEXWORD << Reg[ESP].u << end();
|
2017-10-18 09:27:56 +00:00
|
|
|
return result;
|
|
|
|
}
|